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authorDave Airlie <airlied@redhat.com>2009-02-25 19:14:40 -0500
committerDave Airlie <airlied@redhat.com>2009-03-13 00:24:15 -0400
commiteb1d91954ededc00ddcfb51e2626f114ff351524 (patch)
tree817bfb300ddbfd460152b0a36e420b416df42b51 /drivers/gpu
parent6abf66018f7fe231720e50f9a47b142182388869 (diff)
drm/r600: fixup r600 gart table accessor like ati_pcigart.c
This attempts to fixup the r600 GART accessors so they work on other arches. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/radeon/r600_cp.c23
1 files changed, 13 insertions, 10 deletions
diff --git a/drivers/gpu/drm/radeon/r600_cp.c b/drivers/gpu/drm/radeon/r600_cp.c
index 0143a144a294..54ea867c4c66 100644
--- a/drivers/gpu/drm/radeon/r600_cp.c
+++ b/drivers/gpu/drm/radeon/r600_cp.c
@@ -142,23 +142,25 @@ int r600_page_table_init(struct drm_device *dev)
142{ 142{
143 drm_radeon_private_t *dev_priv = dev->dev_private; 143 drm_radeon_private_t *dev_priv = dev->dev_private;
144 struct drm_ati_pcigart_info *gart_info = &dev_priv->gart_info; 144 struct drm_ati_pcigart_info *gart_info = &dev_priv->gart_info;
145 struct drm_local_map *map = &gart_info->mapping;
145 struct drm_sg_mem *entry = dev->sg; 146 struct drm_sg_mem *entry = dev->sg;
146 int ret = 0; 147 int ret = 0;
147 int i, j; 148 int i, j;
148 int max_pages, pages; 149 int pages;
149 u64 *pci_gart, page_base; 150 u64 page_base;
150 dma_addr_t entry_addr; 151 dma_addr_t entry_addr;
152 int max_ati_pages, max_real_pages, gart_idx;
151 153
152 /* okay page table is available - lets rock */ 154 /* okay page table is available - lets rock */
155 max_ati_pages = (gart_info->table_size / sizeof(u64));
156 max_real_pages = max_ati_pages / (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE);
153 157
154 /* PTEs are 64-bits */ 158 pages = (entry->pages <= max_real_pages) ?
155 pci_gart = (u64 *)gart_info->addr; 159 entry->pages : max_real_pages;
156
157 max_pages = (gart_info->table_size / sizeof(u64));
158 pages = (entry->pages <= max_pages) ? entry->pages : max_pages;
159 160
160 memset(pci_gart, 0, max_pages * sizeof(u64)); 161 memset_io((void __iomem *)map->handle, 0, max_ati_pages * sizeof(u64));
161 162
163 gart_idx = 0;
162 for (i = 0; i < pages; i++) { 164 for (i = 0; i < pages; i++) {
163 entry->busaddr[i] = pci_map_single(dev->pdev, 165 entry->busaddr[i] = pci_map_single(dev->pdev,
164 page_address(entry-> 166 page_address(entry->
@@ -176,12 +178,13 @@ int r600_page_table_init(struct drm_device *dev)
176 page_base |= R600_PTE_VALID | R600_PTE_SYSTEM | R600_PTE_SNOOPED; 178 page_base |= R600_PTE_VALID | R600_PTE_SYSTEM | R600_PTE_SNOOPED;
177 page_base |= R600_PTE_READABLE | R600_PTE_WRITEABLE; 179 page_base |= R600_PTE_READABLE | R600_PTE_WRITEABLE;
178 180
179 *pci_gart = page_base; 181 DRM_WRITE64(map, gart_idx * sizeof(u64), page_base);
182
183 gart_idx++;
180 184
181 if ((i % 128) == 0) 185 if ((i % 128) == 0)
182 DRM_DEBUG("page entry %d: 0x%016llx\n", 186 DRM_DEBUG("page entry %d: 0x%016llx\n",
183 i, (unsigned long long)page_base); 187 i, (unsigned long long)page_base);
184 pci_gart++;
185 entry_addr += ATI_PCIGART_PAGE_SIZE; 188 entry_addr += ATI_PCIGART_PAGE_SIZE;
186 } 189 }
187 } 190 }