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authorAdam Jackson <ajax@redhat.com>2011-10-14 12:43:49 -0400
committerKeith Packard <keithp@keithp.com>2011-10-21 02:21:59 -0400
commitcd9dde44f47501394b9f0715b6a36a92aa74c0d0 (patch)
tree548da904c903675f726477e36ff1003384b2df9b /drivers/gpu
parentf52c619a590fa75276c07dfcaf380dee53e4ea4c (diff)
drm/i915/dp: Fix the math in intel_dp_link_required
The previous code was confused about units, which is pretty reasonable given that the units themselves are confusing. Signed-off-by: Adam Jackson <ajax@redhat.com> Signed-off-by: Keith Packard <keithp@keithp.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c26
1 files changed, 21 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 74c835272292..ffe98ad9b640 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -184,9 +184,25 @@ intel_dp_link_clock(uint8_t link_bw)
184 return 162000; 184 return 162000;
185} 185}
186 186
187/* I think this is a fiction */ 187/*
188 * The units on the numbers in the next two are... bizarre. Examples will
189 * make it clearer; this one parallels an example in the eDP spec.
190 *
191 * intel_dp_max_data_rate for one lane of 2.7GHz evaluates as:
192 *
193 * 270000 * 1 * 8 / 10 == 216000
194 *
195 * The actual data capacity of that configuration is 2.16Gbit/s, so the
196 * units are decakilobits. ->clock in a drm_display_mode is in kilohertz -
197 * or equivalently, kilopixels per second - so for 1680x1050R it'd be
198 * 119000. At 18bpp that's 2142000 kilobits per second.
199 *
200 * Thus the strange-looking division by 10 in intel_dp_link_required, to
201 * get the result in decakilobits instead of kilobits.
202 */
203
188static int 204static int
189intel_dp_link_required(struct drm_device *dev, struct intel_dp *intel_dp, int pixel_clock) 205intel_dp_link_required(struct intel_dp *intel_dp, int pixel_clock)
190{ 206{
191 struct drm_crtc *crtc = intel_dp->base.base.crtc; 207 struct drm_crtc *crtc = intel_dp->base.base.crtc;
192 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 208 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
@@ -195,7 +211,7 @@ intel_dp_link_required(struct drm_device *dev, struct intel_dp *intel_dp, int pi
195 if (intel_crtc) 211 if (intel_crtc)
196 bpp = intel_crtc->bpp; 212 bpp = intel_crtc->bpp;
197 213
198 return (pixel_clock * bpp + 7) / 8; 214 return (pixel_clock * bpp + 9) / 10;
199} 215}
200 216
201static int 217static int
@@ -223,7 +239,7 @@ intel_dp_mode_valid(struct drm_connector *connector,
223 /* only refuse the mode on non eDP since we have seen some weird eDP panels 239 /* only refuse the mode on non eDP since we have seen some weird eDP panels
224 which are outside spec tolerances but somehow work by magic */ 240 which are outside spec tolerances but somehow work by magic */
225 if (!is_edp(intel_dp) && 241 if (!is_edp(intel_dp) &&
226 (intel_dp_link_required(connector->dev, intel_dp, mode->clock) 242 (intel_dp_link_required(intel_dp, mode->clock)
227 > intel_dp_max_data_rate(max_link_clock, max_lanes))) 243 > intel_dp_max_data_rate(max_link_clock, max_lanes)))
228 return MODE_CLOCK_HIGH; 244 return MODE_CLOCK_HIGH;
229 245
@@ -670,7 +686,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
670 for (clock = 0; clock <= max_clock; clock++) { 686 for (clock = 0; clock <= max_clock; clock++) {
671 int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count); 687 int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
672 688
673 if (intel_dp_link_required(encoder->dev, intel_dp, mode->clock) 689 if (intel_dp_link_required(intel_dp, mode->clock)
674 <= link_avail) { 690 <= link_avail) {
675 intel_dp->link_bw = bws[clock]; 691 intel_dp->link_bw = bws[clock];
676 intel_dp->lane_count = lane_count; 692 intel_dp->lane_count = lane_count;