diff options
| author | Ben Skeggs <bskeggs@redhat.com> | 2011-01-13 19:27:02 -0500 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2011-01-16 20:28:50 -0500 |
| commit | c906ca0fbf237b77ba2101a2fa9050317137fde8 (patch) | |
| tree | 1251a50df91560beca35ec047a80226b212e59b3 /drivers/gpu | |
| parent | 1380da4979728bdd6af0086a8c8e186da14ae673 (diff) | |
drm/nvc0: enable protection of system-use-only structures in vm
Somehow missed this in the original merge of the nvc0 code.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_drv.h | 1 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nv50_instmem.c | 7 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_graph.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvc0_vm.c | 4 |
4 files changed, 10 insertions, 5 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index 07a7e6ad5e3b..51920321d058 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h | |||
| @@ -160,6 +160,7 @@ enum nouveau_flags { | |||
| 160 | #define NVOBJ_FLAG_ZERO_ALLOC (1 << 1) | 160 | #define NVOBJ_FLAG_ZERO_ALLOC (1 << 1) |
| 161 | #define NVOBJ_FLAG_ZERO_FREE (1 << 2) | 161 | #define NVOBJ_FLAG_ZERO_FREE (1 << 2) |
| 162 | #define NVOBJ_FLAG_VM (1 << 3) | 162 | #define NVOBJ_FLAG_VM (1 << 3) |
| 163 | #define NVOBJ_FLAG_VM_USER (1 << 4) | ||
| 163 | 164 | ||
| 164 | #define NVOBJ_CINST_GLOBAL 0xdeadbeef | 165 | #define NVOBJ_CINST_GLOBAL 0xdeadbeef |
| 165 | 166 | ||
diff --git a/drivers/gpu/drm/nouveau/nv50_instmem.c b/drivers/gpu/drm/nouveau/nv50_instmem.c index 2e1b1cd19a4b..ea0041810ae3 100644 --- a/drivers/gpu/drm/nouveau/nv50_instmem.c +++ b/drivers/gpu/drm/nouveau/nv50_instmem.c | |||
| @@ -332,8 +332,11 @@ nv50_instmem_get(struct nouveau_gpuobj *gpuobj, u32 size, u32 align) | |||
| 332 | gpuobj->vinst = node->vram->offset; | 332 | gpuobj->vinst = node->vram->offset; |
| 333 | 333 | ||
| 334 | if (gpuobj->flags & NVOBJ_FLAG_VM) { | 334 | if (gpuobj->flags & NVOBJ_FLAG_VM) { |
| 335 | ret = nouveau_vm_get(dev_priv->chan_vm, size, 12, | 335 | u32 flags = NV_MEM_ACCESS_RW; |
| 336 | NV_MEM_ACCESS_RW | NV_MEM_ACCESS_SYS, | 336 | if (!(gpuobj->flags & NVOBJ_FLAG_VM_USER)) |
| 337 | flags |= NV_MEM_ACCESS_SYS; | ||
| 338 | |||
| 339 | ret = nouveau_vm_get(dev_priv->chan_vm, size, 12, flags, | ||
| 337 | &node->chan_vma); | 340 | &node->chan_vma); |
| 338 | if (ret) { | 341 | if (ret) { |
| 339 | vram->put(dev, &node->vram); | 342 | vram->put(dev, &node->vram); |
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c b/drivers/gpu/drm/nouveau/nvc0_graph.c index 5feacd5d5fa4..e6ea7d83187f 100644 --- a/drivers/gpu/drm/nouveau/nvc0_graph.c +++ b/drivers/gpu/drm/nouveau/nvc0_graph.c | |||
| @@ -105,7 +105,8 @@ nvc0_graph_create_context_mmio_list(struct nouveau_channel *chan) | |||
| 105 | if (ret) | 105 | if (ret) |
| 106 | return ret; | 106 | return ret; |
| 107 | 107 | ||
| 108 | ret = nouveau_gpuobj_new(dev, NULL, 384 * 1024, 4096, NVOBJ_FLAG_VM, | 108 | ret = nouveau_gpuobj_new(dev, NULL, 384 * 1024, 4096, |
| 109 | NVOBJ_FLAG_VM | NVOBJ_FLAG_VM_USER, | ||
| 109 | &grch->unk418810); | 110 | &grch->unk418810); |
| 110 | if (ret) | 111 | if (ret) |
| 111 | return ret; | 112 | return ret; |
diff --git a/drivers/gpu/drm/nouveau/nvc0_vm.c b/drivers/gpu/drm/nouveau/nvc0_vm.c index 4b9251bb0ff4..e4e83c2caf5b 100644 --- a/drivers/gpu/drm/nouveau/nvc0_vm.c +++ b/drivers/gpu/drm/nouveau/nvc0_vm.c | |||
| @@ -48,8 +48,8 @@ nvc0_vm_addr(struct nouveau_vma *vma, u64 phys, u32 memtype, u32 target) | |||
| 48 | phys >>= 8; | 48 | phys >>= 8; |
| 49 | 49 | ||
| 50 | phys |= 0x00000001; /* present */ | 50 | phys |= 0x00000001; /* present */ |
| 51 | // if (vma->access & NV_MEM_ACCESS_SYS) | 51 | if (vma->access & NV_MEM_ACCESS_SYS) |
| 52 | // phys |= 0x00000002; | 52 | phys |= 0x00000002; |
| 53 | 53 | ||
| 54 | phys |= ((u64)target << 32); | 54 | phys |= ((u64)target << 32); |
| 55 | phys |= ((u64)memtype << 36); | 55 | phys |= ((u64)memtype << 36); |
