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authorThomas Hellstrom <thellstrom@vmware.com>2012-11-21 06:22:35 -0500
committerThomas Hellstrom <thellstrom@vmware.com>2014-01-17 01:52:31 -0500
commitc373d4eac4a29b04ec036a0ead75e4a796c911c2 (patch)
treed216919a0b7ff69ab3a188e7d0254eaa0f560c26 /drivers/gpu
parent7086d0995cef6b9bbd46bd590f43bb9e3a1233e1 (diff)
drm/vmwgfx: Extend the command verifier to handle guest-backed on / off
Make sure we disallow commands if the device doesn't support them. Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Zack Rusin <zackr@vmware.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c315
1 files changed, 208 insertions, 107 deletions
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
index 951f4aeb2688..b14adae6802d 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
@@ -71,6 +71,25 @@ struct vmw_resource_val_node {
71}; 71};
72 72
73/** 73/**
74 * struct vmw_cmd_entry - Describe a command for the verifier
75 *
76 * @user_allow: Whether allowed from the execbuf ioctl.
77 * @gb_disable: Whether disabled if guest-backed objects are available.
78 * @gb_enable: Whether enabled iff guest-backed objects are available.
79 */
80struct vmw_cmd_entry {
81 int (*func) (struct vmw_private *, struct vmw_sw_context *,
82 SVGA3dCmdHeader *);
83 bool user_allow;
84 bool gb_disable;
85 bool gb_enable;
86};
87
88#define VMW_CMD_DEF(_cmd, _func, _user_allow, _gb_disable, _gb_enable) \
89 [(_cmd) - SVGA_3D_CMD_BASE] = {(_func), (_user_allow),\
90 (_gb_disable), (_gb_enable)}
91
92/**
74 * vmw_resource_unreserve - unreserve resources previously reserved for 93 * vmw_resource_unreserve - unreserve resources previously reserved for
75 * command submission. 94 * command submission.
76 * 95 *
@@ -527,11 +546,6 @@ static int vmw_cmd_blt_surf_screen_check(struct vmw_private *dev_priv,
527 546
528 cmd = container_of(header, struct vmw_sid_cmd, header); 547 cmd = container_of(header, struct vmw_sid_cmd, header);
529 548
530 if (unlikely(!sw_context->kernel)) {
531 DRM_ERROR("Kernel only SVGA3d command: %u.\n", cmd->header.id);
532 return -EPERM;
533 }
534
535 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, 549 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
536 user_surface_converter, 550 user_surface_converter,
537 &cmd->body.srcImage.sid, NULL); 551 &cmd->body.srcImage.sid, NULL);
@@ -549,11 +563,6 @@ static int vmw_cmd_present_check(struct vmw_private *dev_priv,
549 563
550 cmd = container_of(header, struct vmw_sid_cmd, header); 564 cmd = container_of(header, struct vmw_sid_cmd, header);
551 565
552 if (unlikely(!sw_context->kernel)) {
553 DRM_ERROR("Kernel only SVGA3d command: %u.\n", cmd->header.id);
554 return -EPERM;
555 }
556
557 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, 566 return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
558 user_surface_converter, &cmd->body.sid, 567 user_surface_converter, &cmd->body.sid,
559 NULL); 568 NULL);
@@ -1536,105 +1545,173 @@ static int vmw_cmd_check_not_3d(struct vmw_private *dev_priv,
1536 return 0; 1545 return 0;
1537} 1546}
1538 1547
1539typedef int (*vmw_cmd_func) (struct vmw_private *, 1548static const struct vmw_cmd_entry const vmw_cmd_entries[SVGA_3D_CMD_MAX] = {
1540 struct vmw_sw_context *, 1549 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE, &vmw_cmd_invalid,
1541 SVGA3dCmdHeader *); 1550 false, false, false),
1542 1551 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DESTROY, &vmw_cmd_invalid,
1543#define VMW_CMD_DEF(cmd, func) \ 1552 false, false, false),
1544 [cmd - SVGA_3D_CMD_BASE] = func 1553 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_COPY, &vmw_cmd_surface_copy_check,
1545 1554 true, false, false),
1546static vmw_cmd_func vmw_cmd_funcs[SVGA_3D_CMD_MAX] = { 1555 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_STRETCHBLT, &vmw_cmd_stretch_blt_check,
1547 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE, &vmw_cmd_invalid), 1556 true, false, false),
1548 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DESTROY, &vmw_cmd_invalid), 1557 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DMA, &vmw_cmd_dma,
1549 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_COPY, &vmw_cmd_surface_copy_check), 1558 true, false, false),
1550 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_STRETCHBLT, &vmw_cmd_stretch_blt_check), 1559 VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DEFINE, &vmw_cmd_invalid,
1551 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DMA, &vmw_cmd_dma), 1560 false, false, false),
1552 VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DEFINE, &vmw_cmd_invalid), 1561 VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DESTROY, &vmw_cmd_invalid,
1553 VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DESTROY, &vmw_cmd_invalid), 1562 false, false, false),
1554 VMW_CMD_DEF(SVGA_3D_CMD_SETTRANSFORM, &vmw_cmd_cid_check), 1563 VMW_CMD_DEF(SVGA_3D_CMD_SETTRANSFORM, &vmw_cmd_cid_check,
1555 VMW_CMD_DEF(SVGA_3D_CMD_SETZRANGE, &vmw_cmd_cid_check), 1564 true, false, false),
1556 VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERSTATE, &vmw_cmd_cid_check), 1565 VMW_CMD_DEF(SVGA_3D_CMD_SETZRANGE, &vmw_cmd_cid_check,
1566 true, false, false),
1567 VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERSTATE, &vmw_cmd_cid_check,
1568 true, false, false),
1557 VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERTARGET, 1569 VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERTARGET,
1558 &vmw_cmd_set_render_target_check), 1570 &vmw_cmd_set_render_target_check, true, false, false),
1559 VMW_CMD_DEF(SVGA_3D_CMD_SETTEXTURESTATE, &vmw_cmd_tex_state), 1571 VMW_CMD_DEF(SVGA_3D_CMD_SETTEXTURESTATE, &vmw_cmd_tex_state,
1560 VMW_CMD_DEF(SVGA_3D_CMD_SETMATERIAL, &vmw_cmd_cid_check), 1572 true, false, false),
1561 VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTDATA, &vmw_cmd_cid_check), 1573 VMW_CMD_DEF(SVGA_3D_CMD_SETMATERIAL, &vmw_cmd_cid_check,
1562 VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTENABLED, &vmw_cmd_cid_check), 1574 true, false, false),
1563 VMW_CMD_DEF(SVGA_3D_CMD_SETVIEWPORT, &vmw_cmd_cid_check), 1575 VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTDATA, &vmw_cmd_cid_check,
1564 VMW_CMD_DEF(SVGA_3D_CMD_SETCLIPPLANE, &vmw_cmd_cid_check), 1576 true, false, false),
1565 VMW_CMD_DEF(SVGA_3D_CMD_CLEAR, &vmw_cmd_cid_check), 1577 VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTENABLED, &vmw_cmd_cid_check,
1566 VMW_CMD_DEF(SVGA_3D_CMD_PRESENT, &vmw_cmd_present_check), 1578 true, false, false),
1567 VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DEFINE, &vmw_cmd_cid_check), 1579 VMW_CMD_DEF(SVGA_3D_CMD_SETVIEWPORT, &vmw_cmd_cid_check,
1568 VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DESTROY, &vmw_cmd_cid_check), 1580 true, false, false),
1569 VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER, &vmw_cmd_set_shader), 1581 VMW_CMD_DEF(SVGA_3D_CMD_SETCLIPPLANE, &vmw_cmd_cid_check,
1570 VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER_CONST, &vmw_cmd_cid_check), 1582 true, false, false),
1571 VMW_CMD_DEF(SVGA_3D_CMD_DRAW_PRIMITIVES, &vmw_cmd_draw), 1583 VMW_CMD_DEF(SVGA_3D_CMD_CLEAR, &vmw_cmd_cid_check,
1572 VMW_CMD_DEF(SVGA_3D_CMD_SETSCISSORRECT, &vmw_cmd_cid_check), 1584 true, false, false),
1573 VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_QUERY, &vmw_cmd_begin_query), 1585 VMW_CMD_DEF(SVGA_3D_CMD_PRESENT, &vmw_cmd_present_check,
1574 VMW_CMD_DEF(SVGA_3D_CMD_END_QUERY, &vmw_cmd_end_query), 1586 false, false, false),
1575 VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_QUERY, &vmw_cmd_wait_query), 1587 VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DEFINE, &vmw_cmd_cid_check,
1576 VMW_CMD_DEF(SVGA_3D_CMD_PRESENT_READBACK, &vmw_cmd_ok), 1588 true, true, false),
1589 VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DESTROY, &vmw_cmd_cid_check,
1590 true, true, false),
1591 VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER, &vmw_cmd_set_shader,
1592 true, false, false),
1593 VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER_CONST, &vmw_cmd_cid_check,
1594 true, true, false),
1595 VMW_CMD_DEF(SVGA_3D_CMD_DRAW_PRIMITIVES, &vmw_cmd_draw,
1596 true, false, false),
1597 VMW_CMD_DEF(SVGA_3D_CMD_SETSCISSORRECT, &vmw_cmd_cid_check,
1598 true, false, false),
1599 VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_QUERY, &vmw_cmd_begin_query,
1600 true, false, false),
1601 VMW_CMD_DEF(SVGA_3D_CMD_END_QUERY, &vmw_cmd_end_query,
1602 true, false, false),
1603 VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_QUERY, &vmw_cmd_wait_query,
1604 true, false, false),
1605 VMW_CMD_DEF(SVGA_3D_CMD_PRESENT_READBACK, &vmw_cmd_ok,
1606 true, false, false),
1577 VMW_CMD_DEF(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN, 1607 VMW_CMD_DEF(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN,
1578 &vmw_cmd_blt_surf_screen_check), 1608 &vmw_cmd_blt_surf_screen_check, false, false, false),
1579 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE_V2, &vmw_cmd_invalid), 1609 VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE_V2, &vmw_cmd_invalid,
1580 VMW_CMD_DEF(SVGA_3D_CMD_GENERATE_MIPMAPS, &vmw_cmd_invalid), 1610 false, false, false),
1581 VMW_CMD_DEF(SVGA_3D_CMD_ACTIVATE_SURFACE, &vmw_cmd_invalid), 1611 VMW_CMD_DEF(SVGA_3D_CMD_GENERATE_MIPMAPS, &vmw_cmd_invalid,
1582 VMW_CMD_DEF(SVGA_3D_CMD_DEACTIVATE_SURFACE, &vmw_cmd_invalid), 1612 false, false, false),
1583 VMW_CMD_DEF(SVGA_3D_CMD_SCREEN_DMA, &vmw_cmd_invalid), 1613 VMW_CMD_DEF(SVGA_3D_CMD_ACTIVATE_SURFACE, &vmw_cmd_invalid,
1584 VMW_CMD_DEF(SVGA_3D_CMD_SET_UNITY_SURFACE_COOKIE, &vmw_cmd_invalid), 1614 false, false, false),
1585 VMW_CMD_DEF(SVGA_3D_CMD_OPEN_CONTEXT_SURFACE, &vmw_cmd_invalid), 1615 VMW_CMD_DEF(SVGA_3D_CMD_DEACTIVATE_SURFACE, &vmw_cmd_invalid,
1586 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_BITBLT, &vmw_cmd_invalid), 1616 false, false, false),
1587 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_TRANSBLT, &vmw_cmd_invalid), 1617 VMW_CMD_DEF(SVGA_3D_CMD_SCREEN_DMA, &vmw_cmd_invalid,
1588 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_STRETCHBLT, &vmw_cmd_invalid), 1618 false, false, false),
1589 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_COLORFILL, &vmw_cmd_invalid), 1619 VMW_CMD_DEF(SVGA_3D_CMD_SET_UNITY_SURFACE_COOKIE, &vmw_cmd_invalid,
1590 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_ALPHABLEND, &vmw_cmd_invalid), 1620 false, false, false),
1591 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND, &vmw_cmd_invalid), 1621 VMW_CMD_DEF(SVGA_3D_CMD_OPEN_CONTEXT_SURFACE, &vmw_cmd_invalid,
1592 VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE, &vmw_cmd_invalid), 1622 false, false, false),
1593 VMW_CMD_DEF(SVGA_3D_CMD_READBACK_OTABLE, &vmw_cmd_invalid), 1623 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_BITBLT, &vmw_cmd_invalid,
1594 VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_MOB, &vmw_cmd_invalid), 1624 false, false, false),
1595 VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_MOB, &vmw_cmd_invalid), 1625 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_TRANSBLT, &vmw_cmd_invalid,
1596 VMW_CMD_DEF(SVGA_3D_CMD_REDEFINE_GB_MOB, &vmw_cmd_invalid), 1626 false, false, false),
1597 VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING, &vmw_cmd_invalid), 1627 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_STRETCHBLT, &vmw_cmd_invalid,
1598 VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE, &vmw_cmd_invalid), 1628 false, false, false),
1599 VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SURFACE, &vmw_cmd_invalid), 1629 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_COLORFILL, &vmw_cmd_invalid,
1600 VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SURFACE, &vmw_cmd_bind_gb_surface), 1630 false, false, false),
1601 VMW_CMD_DEF(SVGA_3D_CMD_COND_BIND_GB_SURFACE, &vmw_cmd_invalid), 1631 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_ALPHABLEND, &vmw_cmd_invalid,
1602 VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_IMAGE, &vmw_cmd_update_gb_image), 1632 false, false, false),
1633 VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND, &vmw_cmd_invalid,
1634 false, false, false),
1635 VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE, &vmw_cmd_invalid,
1636 false, false, true),
1637 VMW_CMD_DEF(SVGA_3D_CMD_READBACK_OTABLE, &vmw_cmd_invalid,
1638 false, false, true),
1639 VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_MOB, &vmw_cmd_invalid,
1640 false, false, true),
1641 VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_MOB, &vmw_cmd_invalid,
1642 false, false, true),
1643 VMW_CMD_DEF(SVGA_3D_CMD_REDEFINE_GB_MOB, &vmw_cmd_invalid,
1644 false, false, true),
1645 VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING, &vmw_cmd_invalid,
1646 false, false, true),
1647 VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE, &vmw_cmd_invalid,
1648 false, false, true),
1649 VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SURFACE, &vmw_cmd_invalid,
1650 false, false, true),
1651 VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SURFACE, &vmw_cmd_bind_gb_surface,
1652 true, false, true),
1653 VMW_CMD_DEF(SVGA_3D_CMD_COND_BIND_GB_SURFACE, &vmw_cmd_invalid,
1654 false, false, true),
1655 VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_IMAGE, &vmw_cmd_update_gb_image,
1656 true, false, true),
1603 VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SURFACE, 1657 VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SURFACE,
1604 &vmw_cmd_update_gb_surface), 1658 &vmw_cmd_update_gb_surface, true, false, true),
1605 VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE, 1659 VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE,
1606 &vmw_cmd_readback_gb_image), 1660 &vmw_cmd_readback_gb_image, true, false, true),
1607 VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_SURFACE, 1661 VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_SURFACE,
1608 &vmw_cmd_readback_gb_surface), 1662 &vmw_cmd_readback_gb_surface, true, false, true),
1609 VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE, 1663 VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE,
1610 &vmw_cmd_invalidate_gb_image), 1664 &vmw_cmd_invalidate_gb_image, true, false, true),
1611 VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_SURFACE, 1665 VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_SURFACE,
1612 &vmw_cmd_invalidate_gb_surface), 1666 &vmw_cmd_invalidate_gb_surface, true, false, true),
1613 VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_CONTEXT, &vmw_cmd_invalid), 1667 VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_CONTEXT, &vmw_cmd_invalid,
1614 VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_CONTEXT, &vmw_cmd_invalid), 1668 false, false, true),
1615 VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_CONTEXT, &vmw_cmd_invalid), 1669 VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_CONTEXT, &vmw_cmd_invalid,
1616 VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_CONTEXT, &vmw_cmd_invalid), 1670 false, false, true),
1617 VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_CONTEXT, &vmw_cmd_invalid), 1671 VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_CONTEXT, &vmw_cmd_invalid,
1618 VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SHADER, &vmw_cmd_invalid), 1672 false, false, true),
1619 VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SHADER, &vmw_cmd_bind_gb_shader), 1673 VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_CONTEXT, &vmw_cmd_invalid,
1620 VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SHADER, &vmw_cmd_invalid), 1674 false, false, true),
1675 VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_CONTEXT, &vmw_cmd_invalid,
1676 false, false, true),
1677 VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SHADER, &vmw_cmd_invalid,
1678 false, false, true),
1679 VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SHADER, &vmw_cmd_bind_gb_shader,
1680 true, false, true),
1681 VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SHADER, &vmw_cmd_invalid,
1682 false, false, true),
1621 VMW_CMD_DEF(SVGA_3D_CMD_BIND_SHADERCONSTS, 1683 VMW_CMD_DEF(SVGA_3D_CMD_BIND_SHADERCONSTS,
1622 &vmw_cmd_bind_gb_shader_consts), 1684 &vmw_cmd_bind_gb_shader_consts, true, false, true),
1623 VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_GB_QUERY, &vmw_cmd_begin_gb_query), 1685 VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_GB_QUERY, &vmw_cmd_begin_gb_query,
1624 VMW_CMD_DEF(SVGA_3D_CMD_END_GB_QUERY, &vmw_cmd_end_gb_query), 1686 true, false, true),
1625 VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_GB_QUERY, &vmw_cmd_wait_gb_query), 1687 VMW_CMD_DEF(SVGA_3D_CMD_END_GB_QUERY, &vmw_cmd_end_gb_query,
1626 VMW_CMD_DEF(SVGA_3D_CMD_NOP, &vmw_cmd_ok), 1688 true, false, true),
1627 VMW_CMD_DEF(SVGA_3D_CMD_ENABLE_GART, &vmw_cmd_invalid), 1689 VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_GB_QUERY, &vmw_cmd_wait_gb_query,
1628 VMW_CMD_DEF(SVGA_3D_CMD_DISABLE_GART, &vmw_cmd_invalid), 1690 true, false, true),
1629 VMW_CMD_DEF(SVGA_3D_CMD_MAP_MOB_INTO_GART, &vmw_cmd_invalid), 1691 VMW_CMD_DEF(SVGA_3D_CMD_NOP, &vmw_cmd_ok,
1630 VMW_CMD_DEF(SVGA_3D_CMD_UNMAP_GART_RANGE, &vmw_cmd_invalid), 1692 true, false, true),
1631 VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SCREENTARGET, &vmw_cmd_invalid), 1693 VMW_CMD_DEF(SVGA_3D_CMD_ENABLE_GART, &vmw_cmd_invalid,
1632 VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SCREENTARGET, &vmw_cmd_invalid), 1694 false, false, true),
1633 VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SCREENTARGET, &vmw_cmd_invalid), 1695 VMW_CMD_DEF(SVGA_3D_CMD_DISABLE_GART, &vmw_cmd_invalid,
1634 VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SCREENTARGET, &vmw_cmd_invalid), 1696 false, false, true),
1635 VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL, &vmw_cmd_invalid), 1697 VMW_CMD_DEF(SVGA_3D_CMD_MAP_MOB_INTO_GART, &vmw_cmd_invalid,
1636 VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL, &vmw_cmd_invalid), 1698 false, false, true),
1637 VMW_CMD_DEF(SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE, &vmw_cmd_cid_check) 1699 VMW_CMD_DEF(SVGA_3D_CMD_UNMAP_GART_RANGE, &vmw_cmd_invalid,
1700 false, false, true),
1701 VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SCREENTARGET, &vmw_cmd_invalid,
1702 false, false, true),
1703 VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SCREENTARGET, &vmw_cmd_invalid,
1704 false, false, true),
1705 VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SCREENTARGET, &vmw_cmd_invalid,
1706 false, false, true),
1707 VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SCREENTARGET, &vmw_cmd_invalid,
1708 false, false, true),
1709 VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
1710 false, false, true),
1711 VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
1712 false, false, true),
1713 VMW_CMD_DEF(SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE, &vmw_cmd_cid_check,
1714 true, false, true)
1638}; 1715};
1639 1716
1640static int vmw_cmd_check(struct vmw_private *dev_priv, 1717static int vmw_cmd_check(struct vmw_private *dev_priv,
@@ -1645,6 +1722,8 @@ static int vmw_cmd_check(struct vmw_private *dev_priv,
1645 uint32_t size_remaining = *size; 1722 uint32_t size_remaining = *size;
1646 SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf; 1723 SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
1647 int ret; 1724 int ret;
1725 const struct vmw_cmd_entry *entry;
1726 bool gb = dev_priv->capabilities & SVGA_CAP_GBOBJECTS;
1648 1727
1649 cmd_id = le32_to_cpu(((uint32_t *)buf)[0]); 1728 cmd_id = le32_to_cpu(((uint32_t *)buf)[0]);
1650 /* Handle any none 3D commands */ 1729 /* Handle any none 3D commands */
@@ -1657,18 +1736,40 @@ static int vmw_cmd_check(struct vmw_private *dev_priv,
1657 1736
1658 cmd_id -= SVGA_3D_CMD_BASE; 1737 cmd_id -= SVGA_3D_CMD_BASE;
1659 if (unlikely(*size > size_remaining)) 1738 if (unlikely(*size > size_remaining))
1660 goto out_err; 1739 goto out_invalid;
1661 1740
1662 if (unlikely(cmd_id >= SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE)) 1741 if (unlikely(cmd_id >= SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE))
1663 goto out_err; 1742 goto out_invalid;
1743
1744 entry = &vmw_cmd_entries[cmd_id];
1745 if (unlikely(!entry->user_allow && !sw_context->kernel))
1746 goto out_privileged;
1664 1747
1665 ret = vmw_cmd_funcs[cmd_id](dev_priv, sw_context, header); 1748 if (unlikely(entry->gb_disable && gb))
1749 goto out_old;
1750
1751 if (unlikely(entry->gb_enable && !gb))
1752 goto out_new;
1753
1754 ret = entry->func(dev_priv, sw_context, header);
1666 if (unlikely(ret != 0)) 1755 if (unlikely(ret != 0))
1667 goto out_err; 1756 goto out_invalid;
1668 1757
1669 return 0; 1758 return 0;
1670out_err: 1759out_invalid:
1671 DRM_ERROR("Illegal / Invalid SVGA3D command: %d\n", 1760 DRM_ERROR("Invalid SVGA3D command: %d\n",
1761 cmd_id + SVGA_3D_CMD_BASE);
1762 return -EINVAL;
1763out_privileged:
1764 DRM_ERROR("Privileged SVGA3D command: %d\n",
1765 cmd_id + SVGA_3D_CMD_BASE);
1766 return -EPERM;
1767out_old:
1768 DRM_ERROR("Deprecated (disallowed) SVGA3D command: %d\n",
1769 cmd_id + SVGA_3D_CMD_BASE);
1770 return -EINVAL;
1771out_new:
1772 DRM_ERROR("SVGA3D command: %d not supported by virtual hardware.\n",
1672 cmd_id + SVGA_3D_CMD_BASE); 1773 cmd_id + SVGA_3D_CMD_BASE);
1673 return -EINVAL; 1774 return -EINVAL;
1674} 1775}
generated by cgit v1.2.2 (git 2.25.0) at 2024-10-13 13:18:54 -0400