diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-11-19 13:28:13 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-11-19 13:28:13 -0500 |
commit | 973d168de251d46605dc00d2c7f83848a5af9fb9 (patch) | |
tree | ac607f4e61347a55f1ce12cc293725f74b9f089b /drivers/gpu | |
parent | 764bc5691765470b486ec70916935c771d7f5bb1 (diff) | |
parent | 16c59ef33b389217c29122235e475557bc1412a1 (diff) |
Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel
* 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/ickle/drm-intel:
drm/i915: Disable FBC on Ironlake to save 1W
drm/i915: Take advantage of auto-polling CRT hotplug detection on PCH hardware
drm/i915/crt: Introduce struct intel_crt
drm/i915: Do not hold mutex when faulting in user addresses
drm: radeon: fix error value sign
drm/radeon/kms: fix and unify tiled buffer alignment checking for r6xx/7xx
drm/i915: Retire any pending operations on the old scanout when switching
drm/i915: Fix I2C adapter registration
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.c | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_gem.c | 77 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_crt.c | 159 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 12 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_i2c.c | 11 |
6 files changed, 157 insertions, 107 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 80745f85902c..f737960712e6 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -150,7 +150,8 @@ static const struct intel_device_info intel_ironlake_d_info = { | |||
150 | 150 | ||
151 | static const struct intel_device_info intel_ironlake_m_info = { | 151 | static const struct intel_device_info intel_ironlake_m_info = { |
152 | .gen = 5, .is_mobile = 1, | 152 | .gen = 5, .is_mobile = 1, |
153 | .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1, .has_hotplug = 1, | 153 | .need_gfx_hws = 1, .has_rc6 = 1, .has_hotplug = 1, |
154 | .has_fbc = 0, /* disabled due to buggy hardware */ | ||
154 | .has_bsd_ring = 1, | 155 | .has_bsd_ring = 1, |
155 | }; | 156 | }; |
156 | 157 | ||
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 90414ae86afc..409826da3099 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -1045,6 +1045,8 @@ void i915_gem_clflush_object(struct drm_gem_object *obj); | |||
1045 | int i915_gem_object_set_domain(struct drm_gem_object *obj, | 1045 | int i915_gem_object_set_domain(struct drm_gem_object *obj, |
1046 | uint32_t read_domains, | 1046 | uint32_t read_domains, |
1047 | uint32_t write_domain); | 1047 | uint32_t write_domain); |
1048 | int i915_gem_object_flush_gpu(struct drm_i915_gem_object *obj, | ||
1049 | bool interruptible); | ||
1048 | int i915_gem_init_ringbuffer(struct drm_device *dev); | 1050 | int i915_gem_init_ringbuffer(struct drm_device *dev); |
1049 | void i915_gem_cleanup_ringbuffer(struct drm_device *dev); | 1051 | void i915_gem_cleanup_ringbuffer(struct drm_device *dev); |
1050 | int i915_gem_do_init(struct drm_device *dev, unsigned long start, | 1052 | int i915_gem_do_init(struct drm_device *dev, unsigned long start, |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index ef188e391406..17b1cba3b5f1 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -547,6 +547,19 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data, | |||
547 | struct drm_i915_gem_object *obj_priv; | 547 | struct drm_i915_gem_object *obj_priv; |
548 | int ret = 0; | 548 | int ret = 0; |
549 | 549 | ||
550 | if (args->size == 0) | ||
551 | return 0; | ||
552 | |||
553 | if (!access_ok(VERIFY_WRITE, | ||
554 | (char __user *)(uintptr_t)args->data_ptr, | ||
555 | args->size)) | ||
556 | return -EFAULT; | ||
557 | |||
558 | ret = fault_in_pages_writeable((char __user *)(uintptr_t)args->data_ptr, | ||
559 | args->size); | ||
560 | if (ret) | ||
561 | return -EFAULT; | ||
562 | |||
550 | ret = i915_mutex_lock_interruptible(dev); | 563 | ret = i915_mutex_lock_interruptible(dev); |
551 | if (ret) | 564 | if (ret) |
552 | return ret; | 565 | return ret; |
@@ -564,23 +577,6 @@ i915_gem_pread_ioctl(struct drm_device *dev, void *data, | |||
564 | goto out; | 577 | goto out; |
565 | } | 578 | } |
566 | 579 | ||
567 | if (args->size == 0) | ||
568 | goto out; | ||
569 | |||
570 | if (!access_ok(VERIFY_WRITE, | ||
571 | (char __user *)(uintptr_t)args->data_ptr, | ||
572 | args->size)) { | ||
573 | ret = -EFAULT; | ||
574 | goto out; | ||
575 | } | ||
576 | |||
577 | ret = fault_in_pages_writeable((char __user *)(uintptr_t)args->data_ptr, | ||
578 | args->size); | ||
579 | if (ret) { | ||
580 | ret = -EFAULT; | ||
581 | goto out; | ||
582 | } | ||
583 | |||
584 | ret = i915_gem_object_get_pages_or_evict(obj); | 580 | ret = i915_gem_object_get_pages_or_evict(obj); |
585 | if (ret) | 581 | if (ret) |
586 | goto out; | 582 | goto out; |
@@ -981,7 +977,20 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data, | |||
981 | struct drm_i915_gem_pwrite *args = data; | 977 | struct drm_i915_gem_pwrite *args = data; |
982 | struct drm_gem_object *obj; | 978 | struct drm_gem_object *obj; |
983 | struct drm_i915_gem_object *obj_priv; | 979 | struct drm_i915_gem_object *obj_priv; |
984 | int ret = 0; | 980 | int ret; |
981 | |||
982 | if (args->size == 0) | ||
983 | return 0; | ||
984 | |||
985 | if (!access_ok(VERIFY_READ, | ||
986 | (char __user *)(uintptr_t)args->data_ptr, | ||
987 | args->size)) | ||
988 | return -EFAULT; | ||
989 | |||
990 | ret = fault_in_pages_readable((char __user *)(uintptr_t)args->data_ptr, | ||
991 | args->size); | ||
992 | if (ret) | ||
993 | return -EFAULT; | ||
985 | 994 | ||
986 | ret = i915_mutex_lock_interruptible(dev); | 995 | ret = i915_mutex_lock_interruptible(dev); |
987 | if (ret) | 996 | if (ret) |
@@ -994,30 +1003,12 @@ i915_gem_pwrite_ioctl(struct drm_device *dev, void *data, | |||
994 | } | 1003 | } |
995 | obj_priv = to_intel_bo(obj); | 1004 | obj_priv = to_intel_bo(obj); |
996 | 1005 | ||
997 | |||
998 | /* Bounds check destination. */ | 1006 | /* Bounds check destination. */ |
999 | if (args->offset > obj->size || args->size > obj->size - args->offset) { | 1007 | if (args->offset > obj->size || args->size > obj->size - args->offset) { |
1000 | ret = -EINVAL; | 1008 | ret = -EINVAL; |
1001 | goto out; | 1009 | goto out; |
1002 | } | 1010 | } |
1003 | 1011 | ||
1004 | if (args->size == 0) | ||
1005 | goto out; | ||
1006 | |||
1007 | if (!access_ok(VERIFY_READ, | ||
1008 | (char __user *)(uintptr_t)args->data_ptr, | ||
1009 | args->size)) { | ||
1010 | ret = -EFAULT; | ||
1011 | goto out; | ||
1012 | } | ||
1013 | |||
1014 | ret = fault_in_pages_readable((char __user *)(uintptr_t)args->data_ptr, | ||
1015 | args->size); | ||
1016 | if (ret) { | ||
1017 | ret = -EFAULT; | ||
1018 | goto out; | ||
1019 | } | ||
1020 | |||
1021 | /* We can only do the GTT pwrite on untiled buffers, as otherwise | 1012 | /* We can only do the GTT pwrite on untiled buffers, as otherwise |
1022 | * it would end up going through the fenced access, and we'll get | 1013 | * it would end up going through the fenced access, and we'll get |
1023 | * different detiling behavior between reading and writing. | 1014 | * different detiling behavior between reading and writing. |
@@ -2907,6 +2898,20 @@ i915_gem_object_set_to_display_plane(struct drm_gem_object *obj, | |||
2907 | return 0; | 2898 | return 0; |
2908 | } | 2899 | } |
2909 | 2900 | ||
2901 | int | ||
2902 | i915_gem_object_flush_gpu(struct drm_i915_gem_object *obj, | ||
2903 | bool interruptible) | ||
2904 | { | ||
2905 | if (!obj->active) | ||
2906 | return 0; | ||
2907 | |||
2908 | if (obj->base.write_domain & I915_GEM_GPU_DOMAINS) | ||
2909 | i915_gem_flush_ring(obj->base.dev, NULL, obj->ring, | ||
2910 | 0, obj->base.write_domain); | ||
2911 | |||
2912 | return i915_gem_object_wait_rendering(&obj->base, interruptible); | ||
2913 | } | ||
2914 | |||
2910 | /** | 2915 | /** |
2911 | * Moves a single object to the CPU read, and possibly write domain. | 2916 | * Moves a single object to the CPU read, and possibly write domain. |
2912 | * | 2917 | * |
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index c55c77043357..8df574316063 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c | |||
@@ -34,6 +34,25 @@ | |||
34 | #include "i915_drm.h" | 34 | #include "i915_drm.h" |
35 | #include "i915_drv.h" | 35 | #include "i915_drv.h" |
36 | 36 | ||
37 | /* Here's the desired hotplug mode */ | ||
38 | #define ADPA_HOTPLUG_BITS (ADPA_CRT_HOTPLUG_PERIOD_128 | \ | ||
39 | ADPA_CRT_HOTPLUG_WARMUP_10MS | \ | ||
40 | ADPA_CRT_HOTPLUG_SAMPLE_4S | \ | ||
41 | ADPA_CRT_HOTPLUG_VOLTAGE_50 | \ | ||
42 | ADPA_CRT_HOTPLUG_VOLREF_325MV | \ | ||
43 | ADPA_CRT_HOTPLUG_ENABLE) | ||
44 | |||
45 | struct intel_crt { | ||
46 | struct intel_encoder base; | ||
47 | bool force_hotplug_required; | ||
48 | }; | ||
49 | |||
50 | static struct intel_crt *intel_attached_crt(struct drm_connector *connector) | ||
51 | { | ||
52 | return container_of(intel_attached_encoder(connector), | ||
53 | struct intel_crt, base); | ||
54 | } | ||
55 | |||
37 | static void intel_crt_dpms(struct drm_encoder *encoder, int mode) | 56 | static void intel_crt_dpms(struct drm_encoder *encoder, int mode) |
38 | { | 57 | { |
39 | struct drm_device *dev = encoder->dev; | 58 | struct drm_device *dev = encoder->dev; |
@@ -129,7 +148,7 @@ static void intel_crt_mode_set(struct drm_encoder *encoder, | |||
129 | dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); | 148 | dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); |
130 | } | 149 | } |
131 | 150 | ||
132 | adpa = 0; | 151 | adpa = ADPA_HOTPLUG_BITS; |
133 | if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) | 152 | if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC) |
134 | adpa |= ADPA_HSYNC_ACTIVE_HIGH; | 153 | adpa |= ADPA_HSYNC_ACTIVE_HIGH; |
135 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) | 154 | if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC) |
@@ -157,53 +176,44 @@ static void intel_crt_mode_set(struct drm_encoder *encoder, | |||
157 | static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector) | 176 | static bool intel_ironlake_crt_detect_hotplug(struct drm_connector *connector) |
158 | { | 177 | { |
159 | struct drm_device *dev = connector->dev; | 178 | struct drm_device *dev = connector->dev; |
179 | struct intel_crt *crt = intel_attached_crt(connector); | ||
160 | struct drm_i915_private *dev_priv = dev->dev_private; | 180 | struct drm_i915_private *dev_priv = dev->dev_private; |
161 | u32 adpa, temp; | 181 | u32 adpa; |
162 | bool ret; | 182 | bool ret; |
163 | bool turn_off_dac = false; | ||
164 | 183 | ||
165 | temp = adpa = I915_READ(PCH_ADPA); | 184 | /* The first time through, trigger an explicit detection cycle */ |
185 | if (crt->force_hotplug_required) { | ||
186 | bool turn_off_dac = HAS_PCH_SPLIT(dev); | ||
187 | u32 save_adpa; | ||
166 | 188 | ||
167 | if (HAS_PCH_SPLIT(dev)) | 189 | crt->force_hotplug_required = 0; |
168 | turn_off_dac = true; | 190 | |
169 | 191 | save_adpa = adpa = I915_READ(PCH_ADPA); | |
170 | adpa &= ~ADPA_CRT_HOTPLUG_MASK; | 192 | DRM_DEBUG_KMS("trigger hotplug detect cycle: adpa=0x%x\n", adpa); |
171 | if (turn_off_dac) | 193 | |
172 | adpa &= ~ADPA_DAC_ENABLE; | 194 | adpa |= ADPA_CRT_HOTPLUG_FORCE_TRIGGER; |
173 | 195 | if (turn_off_dac) | |
174 | /* disable HPD first */ | 196 | adpa &= ~ADPA_DAC_ENABLE; |
175 | I915_WRITE(PCH_ADPA, adpa); | 197 | |
176 | (void)I915_READ(PCH_ADPA); | 198 | I915_WRITE(PCH_ADPA, adpa); |
177 | 199 | ||
178 | adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 | | 200 | if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0, |
179 | ADPA_CRT_HOTPLUG_WARMUP_10MS | | 201 | 1000)) |
180 | ADPA_CRT_HOTPLUG_SAMPLE_4S | | 202 | DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER"); |
181 | ADPA_CRT_HOTPLUG_VOLTAGE_50 | /* default */ | 203 | |
182 | ADPA_CRT_HOTPLUG_VOLREF_325MV | | 204 | if (turn_off_dac) { |
183 | ADPA_CRT_HOTPLUG_ENABLE | | 205 | I915_WRITE(PCH_ADPA, save_adpa); |
184 | ADPA_CRT_HOTPLUG_FORCE_TRIGGER); | 206 | POSTING_READ(PCH_ADPA); |
185 | 207 | } | |
186 | DRM_DEBUG_KMS("pch crt adpa 0x%x", adpa); | ||
187 | I915_WRITE(PCH_ADPA, adpa); | ||
188 | |||
189 | if (wait_for((I915_READ(PCH_ADPA) & ADPA_CRT_HOTPLUG_FORCE_TRIGGER) == 0, | ||
190 | 1000)) | ||
191 | DRM_DEBUG_KMS("timed out waiting for FORCE_TRIGGER"); | ||
192 | |||
193 | if (turn_off_dac) { | ||
194 | /* Make sure hotplug is enabled */ | ||
195 | I915_WRITE(PCH_ADPA, temp | ADPA_CRT_HOTPLUG_ENABLE); | ||
196 | (void)I915_READ(PCH_ADPA); | ||
197 | } | 208 | } |
198 | 209 | ||
199 | /* Check the status to see if both blue and green are on now */ | 210 | /* Check the status to see if both blue and green are on now */ |
200 | adpa = I915_READ(PCH_ADPA); | 211 | adpa = I915_READ(PCH_ADPA); |
201 | adpa &= ADPA_CRT_HOTPLUG_MONITOR_MASK; | 212 | if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) != 0) |
202 | if ((adpa == ADPA_CRT_HOTPLUG_MONITOR_COLOR) || | ||
203 | (adpa == ADPA_CRT_HOTPLUG_MONITOR_MONO)) | ||
204 | ret = true; | 213 | ret = true; |
205 | else | 214 | else |
206 | ret = false; | 215 | ret = false; |
216 | DRM_DEBUG_KMS("ironlake hotplug adpa=0x%x, result %d\n", adpa, ret); | ||
207 | 217 | ||
208 | return ret; | 218 | return ret; |
209 | } | 219 | } |
@@ -277,13 +287,12 @@ static bool intel_crt_ddc_probe(struct drm_i915_private *dev_priv, int ddc_bus) | |||
277 | return i2c_transfer(&dev_priv->gmbus[ddc_bus].adapter, msgs, 1) == 1; | 287 | return i2c_transfer(&dev_priv->gmbus[ddc_bus].adapter, msgs, 1) == 1; |
278 | } | 288 | } |
279 | 289 | ||
280 | static bool intel_crt_detect_ddc(struct drm_encoder *encoder) | 290 | static bool intel_crt_detect_ddc(struct intel_crt *crt) |
281 | { | 291 | { |
282 | struct intel_encoder *intel_encoder = to_intel_encoder(encoder); | 292 | struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private; |
283 | struct drm_i915_private *dev_priv = encoder->dev->dev_private; | ||
284 | 293 | ||
285 | /* CRT should always be at 0, but check anyway */ | 294 | /* CRT should always be at 0, but check anyway */ |
286 | if (intel_encoder->type != INTEL_OUTPUT_ANALOG) | 295 | if (crt->base.type != INTEL_OUTPUT_ANALOG) |
287 | return false; | 296 | return false; |
288 | 297 | ||
289 | if (intel_crt_ddc_probe(dev_priv, dev_priv->crt_ddc_pin)) { | 298 | if (intel_crt_ddc_probe(dev_priv, dev_priv->crt_ddc_pin)) { |
@@ -291,7 +300,7 @@ static bool intel_crt_detect_ddc(struct drm_encoder *encoder) | |||
291 | return true; | 300 | return true; |
292 | } | 301 | } |
293 | 302 | ||
294 | if (intel_ddc_probe(intel_encoder, dev_priv->crt_ddc_pin)) { | 303 | if (intel_ddc_probe(&crt->base, dev_priv->crt_ddc_pin)) { |
295 | DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n"); | 304 | DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n"); |
296 | return true; | 305 | return true; |
297 | } | 306 | } |
@@ -300,9 +309,9 @@ static bool intel_crt_detect_ddc(struct drm_encoder *encoder) | |||
300 | } | 309 | } |
301 | 310 | ||
302 | static enum drm_connector_status | 311 | static enum drm_connector_status |
303 | intel_crt_load_detect(struct drm_crtc *crtc, struct intel_encoder *intel_encoder) | 312 | intel_crt_load_detect(struct drm_crtc *crtc, struct intel_crt *crt) |
304 | { | 313 | { |
305 | struct drm_encoder *encoder = &intel_encoder->base; | 314 | struct drm_encoder *encoder = &crt->base.base; |
306 | struct drm_device *dev = encoder->dev; | 315 | struct drm_device *dev = encoder->dev; |
307 | struct drm_i915_private *dev_priv = dev->dev_private; | 316 | struct drm_i915_private *dev_priv = dev->dev_private; |
308 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | 317 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); |
@@ -434,7 +443,7 @@ static enum drm_connector_status | |||
434 | intel_crt_detect(struct drm_connector *connector, bool force) | 443 | intel_crt_detect(struct drm_connector *connector, bool force) |
435 | { | 444 | { |
436 | struct drm_device *dev = connector->dev; | 445 | struct drm_device *dev = connector->dev; |
437 | struct intel_encoder *encoder = intel_attached_encoder(connector); | 446 | struct intel_crt *crt = intel_attached_crt(connector); |
438 | struct drm_crtc *crtc; | 447 | struct drm_crtc *crtc; |
439 | int dpms_mode; | 448 | int dpms_mode; |
440 | enum drm_connector_status status; | 449 | enum drm_connector_status status; |
@@ -443,28 +452,31 @@ intel_crt_detect(struct drm_connector *connector, bool force) | |||
443 | if (intel_crt_detect_hotplug(connector)) { | 452 | if (intel_crt_detect_hotplug(connector)) { |
444 | DRM_DEBUG_KMS("CRT detected via hotplug\n"); | 453 | DRM_DEBUG_KMS("CRT detected via hotplug\n"); |
445 | return connector_status_connected; | 454 | return connector_status_connected; |
446 | } else | 455 | } else { |
456 | DRM_DEBUG_KMS("CRT not detected via hotplug\n"); | ||
447 | return connector_status_disconnected; | 457 | return connector_status_disconnected; |
458 | } | ||
448 | } | 459 | } |
449 | 460 | ||
450 | if (intel_crt_detect_ddc(&encoder->base)) | 461 | if (intel_crt_detect_ddc(crt)) |
451 | return connector_status_connected; | 462 | return connector_status_connected; |
452 | 463 | ||
453 | if (!force) | 464 | if (!force) |
454 | return connector->status; | 465 | return connector->status; |
455 | 466 | ||
456 | /* for pre-945g platforms use load detect */ | 467 | /* for pre-945g platforms use load detect */ |
457 | if (encoder->base.crtc && encoder->base.crtc->enabled) { | 468 | crtc = crt->base.base.crtc; |
458 | status = intel_crt_load_detect(encoder->base.crtc, encoder); | 469 | if (crtc && crtc->enabled) { |
470 | status = intel_crt_load_detect(crtc, crt); | ||
459 | } else { | 471 | } else { |
460 | crtc = intel_get_load_detect_pipe(encoder, connector, | 472 | crtc = intel_get_load_detect_pipe(&crt->base, connector, |
461 | NULL, &dpms_mode); | 473 | NULL, &dpms_mode); |
462 | if (crtc) { | 474 | if (crtc) { |
463 | if (intel_crt_detect_ddc(&encoder->base)) | 475 | if (intel_crt_detect_ddc(crt)) |
464 | status = connector_status_connected; | 476 | status = connector_status_connected; |
465 | else | 477 | else |
466 | status = intel_crt_load_detect(crtc, encoder); | 478 | status = intel_crt_load_detect(crtc, crt); |
467 | intel_release_load_detect_pipe(encoder, | 479 | intel_release_load_detect_pipe(&crt->base, |
468 | connector, dpms_mode); | 480 | connector, dpms_mode); |
469 | } else | 481 | } else |
470 | status = connector_status_unknown; | 482 | status = connector_status_unknown; |
@@ -536,17 +548,17 @@ static const struct drm_encoder_funcs intel_crt_enc_funcs = { | |||
536 | void intel_crt_init(struct drm_device *dev) | 548 | void intel_crt_init(struct drm_device *dev) |
537 | { | 549 | { |
538 | struct drm_connector *connector; | 550 | struct drm_connector *connector; |
539 | struct intel_encoder *intel_encoder; | 551 | struct intel_crt *crt; |
540 | struct intel_connector *intel_connector; | 552 | struct intel_connector *intel_connector; |
541 | struct drm_i915_private *dev_priv = dev->dev_private; | 553 | struct drm_i915_private *dev_priv = dev->dev_private; |
542 | 554 | ||
543 | intel_encoder = kzalloc(sizeof(struct intel_encoder), GFP_KERNEL); | 555 | crt = kzalloc(sizeof(struct intel_crt), GFP_KERNEL); |
544 | if (!intel_encoder) | 556 | if (!crt) |
545 | return; | 557 | return; |
546 | 558 | ||
547 | intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); | 559 | intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL); |
548 | if (!intel_connector) { | 560 | if (!intel_connector) { |
549 | kfree(intel_encoder); | 561 | kfree(crt); |
550 | return; | 562 | return; |
551 | } | 563 | } |
552 | 564 | ||
@@ -554,20 +566,20 @@ void intel_crt_init(struct drm_device *dev) | |||
554 | drm_connector_init(dev, &intel_connector->base, | 566 | drm_connector_init(dev, &intel_connector->base, |
555 | &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); | 567 | &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA); |
556 | 568 | ||
557 | drm_encoder_init(dev, &intel_encoder->base, &intel_crt_enc_funcs, | 569 | drm_encoder_init(dev, &crt->base.base, &intel_crt_enc_funcs, |
558 | DRM_MODE_ENCODER_DAC); | 570 | DRM_MODE_ENCODER_DAC); |
559 | 571 | ||
560 | intel_connector_attach_encoder(intel_connector, intel_encoder); | 572 | intel_connector_attach_encoder(intel_connector, &crt->base); |
561 | 573 | ||
562 | intel_encoder->type = INTEL_OUTPUT_ANALOG; | 574 | crt->base.type = INTEL_OUTPUT_ANALOG; |
563 | intel_encoder->clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT) | | 575 | crt->base.clone_mask = (1 << INTEL_SDVO_NON_TV_CLONE_BIT | |
564 | (1 << INTEL_ANALOG_CLONE_BIT) | | 576 | 1 << INTEL_ANALOG_CLONE_BIT | |
565 | (1 << INTEL_SDVO_LVDS_CLONE_BIT); | 577 | 1 << INTEL_SDVO_LVDS_CLONE_BIT); |
566 | intel_encoder->crtc_mask = (1 << 0) | (1 << 1); | 578 | crt->base.crtc_mask = (1 << 0) | (1 << 1); |
567 | connector->interlace_allowed = 1; | 579 | connector->interlace_allowed = 1; |
568 | connector->doublescan_allowed = 0; | 580 | connector->doublescan_allowed = 0; |
569 | 581 | ||
570 | drm_encoder_helper_add(&intel_encoder->base, &intel_crt_helper_funcs); | 582 | drm_encoder_helper_add(&crt->base.base, &intel_crt_helper_funcs); |
571 | drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); | 583 | drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs); |
572 | 584 | ||
573 | drm_sysfs_connector_add(connector); | 585 | drm_sysfs_connector_add(connector); |
@@ -577,5 +589,22 @@ void intel_crt_init(struct drm_device *dev) | |||
577 | else | 589 | else |
578 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; | 590 | connector->polled = DRM_CONNECTOR_POLL_CONNECT; |
579 | 591 | ||
592 | /* | ||
593 | * Configure the automatic hotplug detection stuff | ||
594 | */ | ||
595 | crt->force_hotplug_required = 0; | ||
596 | if (HAS_PCH_SPLIT(dev)) { | ||
597 | u32 adpa; | ||
598 | |||
599 | adpa = I915_READ(PCH_ADPA); | ||
600 | adpa &= ~ADPA_CRT_HOTPLUG_MASK; | ||
601 | adpa |= ADPA_HOTPLUG_BITS; | ||
602 | I915_WRITE(PCH_ADPA, adpa); | ||
603 | POSTING_READ(PCH_ADPA); | ||
604 | |||
605 | DRM_DEBUG_KMS("pch crt adpa set to 0x%x\n", adpa); | ||
606 | crt->force_hotplug_required = 1; | ||
607 | } | ||
608 | |||
580 | dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS; | 609 | dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS; |
581 | } | 610 | } |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 48d8fd686ea9..bee24b1a58e8 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -1611,6 +1611,18 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, | |||
1611 | 1611 | ||
1612 | wait_event(dev_priv->pending_flip_queue, | 1612 | wait_event(dev_priv->pending_flip_queue, |
1613 | atomic_read(&obj_priv->pending_flip) == 0); | 1613 | atomic_read(&obj_priv->pending_flip) == 0); |
1614 | |||
1615 | /* Big Hammer, we also need to ensure that any pending | ||
1616 | * MI_WAIT_FOR_EVENT inside a user batch buffer on the | ||
1617 | * current scanout is retired before unpinning the old | ||
1618 | * framebuffer. | ||
1619 | */ | ||
1620 | ret = i915_gem_object_flush_gpu(obj_priv, false); | ||
1621 | if (ret) { | ||
1622 | i915_gem_object_unpin(to_intel_framebuffer(crtc->fb)->obj); | ||
1623 | mutex_unlock(&dev->struct_mutex); | ||
1624 | return ret; | ||
1625 | } | ||
1614 | } | 1626 | } |
1615 | 1627 | ||
1616 | ret = intel_pipe_set_base_atomic(crtc, crtc->fb, x, y, | 1628 | ret = intel_pipe_set_base_atomic(crtc, crtc->fb, x, y, |
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c index 2be4f728ed0c..3dba086e7eea 100644 --- a/drivers/gpu/drm/i915/intel_i2c.c +++ b/drivers/gpu/drm/i915/intel_i2c.c | |||
@@ -160,7 +160,7 @@ intel_gpio_create(struct drm_i915_private *dev_priv, u32 pin) | |||
160 | }; | 160 | }; |
161 | struct intel_gpio *gpio; | 161 | struct intel_gpio *gpio; |
162 | 162 | ||
163 | if (pin < 1 || pin > 7) | 163 | if (pin >= ARRAY_SIZE(map_pin_to_reg) || !map_pin_to_reg[pin]) |
164 | return NULL; | 164 | return NULL; |
165 | 165 | ||
166 | gpio = kzalloc(sizeof(struct intel_gpio), GFP_KERNEL); | 166 | gpio = kzalloc(sizeof(struct intel_gpio), GFP_KERNEL); |
@@ -172,7 +172,8 @@ intel_gpio_create(struct drm_i915_private *dev_priv, u32 pin) | |||
172 | gpio->reg += PCH_GPIOA - GPIOA; | 172 | gpio->reg += PCH_GPIOA - GPIOA; |
173 | gpio->dev_priv = dev_priv; | 173 | gpio->dev_priv = dev_priv; |
174 | 174 | ||
175 | snprintf(gpio->adapter.name, I2C_NAME_SIZE, "GPIO%c", "?BACDEF?"[pin]); | 175 | snprintf(gpio->adapter.name, sizeof(gpio->adapter.name), |
176 | "i915 GPIO%c", "?BACDE?F"[pin]); | ||
176 | gpio->adapter.owner = THIS_MODULE; | 177 | gpio->adapter.owner = THIS_MODULE; |
177 | gpio->adapter.algo_data = &gpio->algo; | 178 | gpio->adapter.algo_data = &gpio->algo; |
178 | gpio->adapter.dev.parent = &dev_priv->dev->pdev->dev; | 179 | gpio->adapter.dev.parent = &dev_priv->dev->pdev->dev; |
@@ -349,7 +350,7 @@ int intel_setup_gmbus(struct drm_device *dev) | |||
349 | "panel", | 350 | "panel", |
350 | "dpc", | 351 | "dpc", |
351 | "dpb", | 352 | "dpb", |
352 | "reserved" | 353 | "reserved", |
353 | "dpd", | 354 | "dpd", |
354 | }; | 355 | }; |
355 | struct drm_i915_private *dev_priv = dev->dev_private; | 356 | struct drm_i915_private *dev_priv = dev->dev_private; |
@@ -366,8 +367,8 @@ int intel_setup_gmbus(struct drm_device *dev) | |||
366 | bus->adapter.owner = THIS_MODULE; | 367 | bus->adapter.owner = THIS_MODULE; |
367 | bus->adapter.class = I2C_CLASS_DDC; | 368 | bus->adapter.class = I2C_CLASS_DDC; |
368 | snprintf(bus->adapter.name, | 369 | snprintf(bus->adapter.name, |
369 | I2C_NAME_SIZE, | 370 | sizeof(bus->adapter.name), |
370 | "gmbus %s", | 371 | "i915 gmbus %s", |
371 | names[i]); | 372 | names[i]); |
372 | 373 | ||
373 | bus->adapter.dev.parent = &dev->pdev->dev; | 374 | bus->adapter.dev.parent = &dev->pdev->dev; |