diff options
author | Matthew Garrett <mjg@redhat.com> | 2010-04-26 17:01:16 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2010-05-18 04:21:23 -0400 |
commit | 956ac86d9277b7142f0ad3f24f7fbd4beed0777d (patch) | |
tree | ed34428be38b04200f28d4370a127e88e6454f6b /drivers/gpu | |
parent | d9932a3241cc6a9629d6586ec362583cb77d7a29 (diff) |
radeon: Enable memory reclockong on r600
With luck, dynamic memory reclocking on r600 should be stable with
the previous patches. Enable it.
Signed-off-by: Matthew Garrett <mjg@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 16 |
1 files changed, 7 insertions, 9 deletions
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 469130994064..1696cc277d8b 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -271,26 +271,27 @@ void r600_set_power_state(struct radeon_device *rdev, bool static_switch) | |||
271 | radeon_pm_misc(rdev); | 271 | radeon_pm_misc(rdev); |
272 | 272 | ||
273 | if (static_switch) { | 273 | if (static_switch) { |
274 | radeon_pm_prepare(rdev); | 274 | |
275 | /* set engine clock */ | 275 | /* set engine clock */ |
276 | if (sclk != rdev->pm.current_sclk) { | 276 | if (sclk != rdev->pm.current_sclk) { |
277 | radeon_set_engine_clock(rdev, sclk); | 277 | radeon_set_engine_clock(rdev, sclk); |
278 | rdev->pm.current_sclk = sclk; | 278 | rdev->pm.current_sclk = sclk; |
279 | DRM_INFO("Setting: e: %d\n", sclk); | 279 | DRM_INFO("Setting: e: %d\n", sclk); |
280 | } | 280 | } |
281 | #if 0 | 281 | |
282 | /* set memory clock */ | 282 | /* set memory clock */ |
283 | if (rdev->asic->set_memory_clock && (mclk != rdev->pm.current_mclk)) { | 283 | if (rdev->asic->set_memory_clock && (mclk != rdev->pm.current_mclk)) { |
284 | radeon_pm_prepare(rdev); | ||
284 | radeon_set_memory_clock(rdev, mclk); | 285 | radeon_set_memory_clock(rdev, mclk); |
286 | radeon_pm_finish(rdev); | ||
285 | rdev->pm.current_mclk = mclk; | 287 | rdev->pm.current_mclk = mclk; |
286 | DRM_INFO("Setting: m: %d\n", mclk); | 288 | DRM_INFO("Setting: m: %d\n", mclk); |
287 | } | 289 | } |
288 | #endif | 290 | |
289 | radeon_pm_finish(rdev); | ||
290 | } else { | 291 | } else { |
291 | /* set engine clock */ | 292 | radeon_sync_with_vblank(rdev); |
293 | |||
292 | if (sclk != rdev->pm.current_sclk) { | 294 | if (sclk != rdev->pm.current_sclk) { |
293 | radeon_sync_with_vblank(rdev); | ||
294 | radeon_pm_debug_check_in_vbl(rdev, false); | 295 | radeon_pm_debug_check_in_vbl(rdev, false); |
295 | radeon_set_engine_clock(rdev, sclk); | 296 | radeon_set_engine_clock(rdev, sclk); |
296 | radeon_pm_debug_check_in_vbl(rdev, true); | 297 | radeon_pm_debug_check_in_vbl(rdev, true); |
@@ -298,10 +299,8 @@ void r600_set_power_state(struct radeon_device *rdev, bool static_switch) | |||
298 | DRM_INFO("Setting: e: %d\n", sclk); | 299 | DRM_INFO("Setting: e: %d\n", sclk); |
299 | } | 300 | } |
300 | 301 | ||
301 | #if 0 | ||
302 | /* set memory clock */ | 302 | /* set memory clock */ |
303 | if (rdev->asic->set_memory_clock && (mclk != rdev->pm.current_mclk)) { | 303 | if (rdev->asic->set_memory_clock && (mclk != rdev->pm.current_mclk)) { |
304 | radeon_sync_with_vblank(rdev); | ||
305 | radeon_pm_debug_check_in_vbl(rdev, false); | 304 | radeon_pm_debug_check_in_vbl(rdev, false); |
306 | radeon_pm_prepare(rdev); | 305 | radeon_pm_prepare(rdev); |
307 | radeon_set_memory_clock(rdev, mclk); | 306 | radeon_set_memory_clock(rdev, mclk); |
@@ -310,7 +309,6 @@ void r600_set_power_state(struct radeon_device *rdev, bool static_switch) | |||
310 | rdev->pm.current_mclk = mclk; | 309 | rdev->pm.current_mclk = mclk; |
311 | DRM_INFO("Setting: m: %d\n", mclk); | 310 | DRM_INFO("Setting: m: %d\n", mclk); |
312 | } | 311 | } |
313 | #endif | ||
314 | } | 312 | } |
315 | 313 | ||
316 | rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index; | 314 | rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index; |