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authorChris Wilson <chris@chris-wilson.co.uk>2012-06-13 12:36:55 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-06-13 14:10:00 -0400
commit93314b5b6f343f5a4c14c89d000007a754190c9a (patch)
tree688c2ae7fc464d986fbed8cae92c12ef4eef9645 /drivers/gpu
parente188719a2891f01b3100dca4ae3a055fb5a7ab52 (diff)
drm/i915: Switch off FBC when disabling the primary plane when obscured
As we switch on/off the primary plane if it is completely obscured by an overlapping video sprite, we also nee to make sure that we update the FBC configuration at the same time. v2: Not all crtcs are intel_crtcs, as spotted by Daniel. v3: Boot testing rules. References: https://bugs.freedesktop.org/show_bug.cgi?id=50238 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Reviewed-by: Jani Nikula <jani.nikula@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h2
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c4
-rw-r--r--drivers/gpu/drm/i915/intel_sprite.c25
3 files changed, 19 insertions, 12 deletions
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 1a1fdb088dda..5290e9df327b 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -169,6 +169,7 @@ struct intel_crtc {
169 u8 lut_r[256], lut_g[256], lut_b[256]; 169 u8 lut_r[256], lut_g[256], lut_b[256];
170 int dpms_mode; 170 int dpms_mode;
171 bool active; /* is the crtc on? independent of the dpms mode */ 171 bool active; /* is the crtc on? independent of the dpms mode */
172 bool primary_disabled; /* is the crtc obscured by a plane? */
172 bool busy; /* is scanout buffer being updated frequently? */ 173 bool busy; /* is scanout buffer being updated frequently? */
173 struct timer_list idle_timer; 174 struct timer_list idle_timer;
174 bool lowfreq_avail; 175 bool lowfreq_avail;
@@ -191,7 +192,6 @@ struct intel_plane {
191 struct drm_plane base; 192 struct drm_plane base;
192 enum pipe pipe; 193 enum pipe pipe;
193 struct drm_i915_gem_object *obj; 194 struct drm_i915_gem_object *obj;
194 bool primary_disabled;
195 int max_downscale; 195 int max_downscale;
196 u32 lut_r[1024], lut_g[1024], lut_b[1024]; 196 u32 lut_r[1024], lut_g[1024], lut_b[1024];
197 void (*update_plane)(struct drm_plane *plane, 197 void (*update_plane)(struct drm_plane *plane,
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index d0ce2a5b1d3f..b7de5ea62aa4 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -405,7 +405,9 @@ void intel_update_fbc(struct drm_device *dev)
405 * - going to an unsupported config (interlace, pixel multiply, etc.) 405 * - going to an unsupported config (interlace, pixel multiply, etc.)
406 */ 406 */
407 list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head) { 407 list_for_each_entry(tmp_crtc, &dev->mode_config.crtc_list, head) {
408 if (tmp_crtc->enabled && tmp_crtc->fb) { 408 if (tmp_crtc->enabled &&
409 !to_intel_crtc(tmp_crtc)->primary_disabled &&
410 tmp_crtc->fb) {
409 if (crtc) { 411 if (crtc) {
410 DRM_DEBUG_KMS("more than one pipe active, disabling compression\n"); 412 DRM_DEBUG_KMS("more than one pipe active, disabling compression\n");
411 dev_priv->no_fbc_reason = FBC_MULTIPLE_PIPES; 413 dev_priv->no_fbc_reason = FBC_MULTIPLE_PIPES;
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 2a20fb0781d7..9d7777bc1545 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -326,6 +326,12 @@ intel_enable_primary(struct drm_crtc *crtc)
326 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 326 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
327 int reg = DSPCNTR(intel_crtc->plane); 327 int reg = DSPCNTR(intel_crtc->plane);
328 328
329 if (!intel_crtc->primary_disabled)
330 return;
331
332 intel_crtc->primary_disabled = false;
333 intel_update_fbc(dev);
334
329 I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE); 335 I915_WRITE(reg, I915_READ(reg) | DISPLAY_PLANE_ENABLE);
330} 336}
331 337
@@ -337,7 +343,13 @@ intel_disable_primary(struct drm_crtc *crtc)
337 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 343 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
338 int reg = DSPCNTR(intel_crtc->plane); 344 int reg = DSPCNTR(intel_crtc->plane);
339 345
346 if (intel_crtc->primary_disabled)
347 return;
348
340 I915_WRITE(reg, I915_READ(reg) & ~DISPLAY_PLANE_ENABLE); 349 I915_WRITE(reg, I915_READ(reg) & ~DISPLAY_PLANE_ENABLE);
350
351 intel_crtc->primary_disabled = true;
352 intel_update_fbc(dev);
341} 353}
342 354
343static int 355static int
@@ -485,18 +497,14 @@ intel_update_plane(struct drm_plane *plane, struct drm_crtc *crtc,
485 * Be sure to re-enable the primary before the sprite is no longer 497 * Be sure to re-enable the primary before the sprite is no longer
486 * covering it fully. 498 * covering it fully.
487 */ 499 */
488 if (!disable_primary && intel_plane->primary_disabled) { 500 if (!disable_primary)
489 intel_enable_primary(crtc); 501 intel_enable_primary(crtc);
490 intel_plane->primary_disabled = false;
491 }
492 502
493 intel_plane->update_plane(plane, fb, obj, crtc_x, crtc_y, 503 intel_plane->update_plane(plane, fb, obj, crtc_x, crtc_y,
494 crtc_w, crtc_h, x, y, src_w, src_h); 504 crtc_w, crtc_h, x, y, src_w, src_h);
495 505
496 if (disable_primary) { 506 if (disable_primary)
497 intel_disable_primary(crtc); 507 intel_disable_primary(crtc);
498 intel_plane->primary_disabled = true;
499 }
500 508
501 /* Unpin old obj after new one is active to avoid ugliness */ 509 /* Unpin old obj after new one is active to avoid ugliness */
502 if (old_obj) { 510 if (old_obj) {
@@ -527,11 +535,8 @@ intel_disable_plane(struct drm_plane *plane)
527 struct intel_plane *intel_plane = to_intel_plane(plane); 535 struct intel_plane *intel_plane = to_intel_plane(plane);
528 int ret = 0; 536 int ret = 0;
529 537
530 if (intel_plane->primary_disabled) { 538 if (plane->crtc)
531 intel_enable_primary(plane->crtc); 539 intel_enable_primary(plane->crtc);
532 intel_plane->primary_disabled = false;
533 }
534
535 intel_plane->disable_plane(plane); 540 intel_plane->disable_plane(plane);
536 541
537 if (!intel_plane->obj) 542 if (!intel_plane->obj)