diff options
author | Dave Airlie <airlied@redhat.com> | 2013-12-04 21:18:35 -0500 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2013-12-04 21:18:35 -0500 |
commit | 9255ce80f88ba885c38c0bbd235db7c24392e22e (patch) | |
tree | 910ca32b727121f3e6cee63be4bb996529bc5c4d /drivers/gpu | |
parent | 89570eeb1720a95cb600b9d132d4fa65d9ae9012 (diff) | |
parent | ffd3d3361d583cb73fa65a5fed3a196ba6f261bb (diff) |
Merge branch 'drm-fixes-3.13' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
Some additional fixes for 3.13. Regression fixes for audio and hw_i2c,
vram fix for some SI PX cards, race fix in the hwmon code, and a few other
odds and ends.
* 'drm-fixes-3.13' of git://people.freedesktop.org/~agd5f/linux:
drm/radeon/atom: fix bus probes when hw_i2c is set (v2)
drm/radeon: fix null pointer dereference in dce6+ audio code
drm/radeon: fixup bad vram size on SI
drm/radeon: fix VGT_GS_INSTANCE_CNT register
drm/radeon: Fix a typo in Cayman and Evergreen registers
drm/radeon/dpm: simplify state adjust logic for NI
drm/radeon: add radeon_vm_bo_update trace point
drm/radeon: add VMID allocation trace point
drm/radeon/dpm: Convert to use devm_hwmon_register_with_groups
drm/radeon: program DCE2 audio dto just like DCE3
drm/radeon: fix typo in fetching mpll params
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/radeon/atombios_i2c.c | 15 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/dce6_afmt.c | 12 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/ni_dpm.c | 28 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600_hdmi.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_atombios.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_cs.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_drv.h | 3 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_gart.c | 16 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_pm.c | 49 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_trace.h | 33 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/reg_srcs/cayman | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/reg_srcs/evergreen | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/si.c | 11 |
14 files changed, 106 insertions, 91 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_i2c.c b/drivers/gpu/drm/radeon/atombios_i2c.c index 0652ee0a2098..f685035dbe39 100644 --- a/drivers/gpu/drm/radeon/atombios_i2c.c +++ b/drivers/gpu/drm/radeon/atombios_i2c.c | |||
@@ -44,7 +44,7 @@ static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan, | |||
44 | PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args; | 44 | PROCESS_I2C_CHANNEL_TRANSACTION_PS_ALLOCATION args; |
45 | int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction); | 45 | int index = GetIndexIntoMasterTable(COMMAND, ProcessI2cChannelTransaction); |
46 | unsigned char *base; | 46 | unsigned char *base; |
47 | u16 out; | 47 | u16 out = cpu_to_le16(0); |
48 | 48 | ||
49 | memset(&args, 0, sizeof(args)); | 49 | memset(&args, 0, sizeof(args)); |
50 | 50 | ||
@@ -55,11 +55,14 @@ static int radeon_process_i2c_ch(struct radeon_i2c_chan *chan, | |||
55 | DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num); | 55 | DRM_ERROR("hw i2c: tried to write too many bytes (%d vs 3)\n", num); |
56 | return -EINVAL; | 56 | return -EINVAL; |
57 | } | 57 | } |
58 | args.ucRegIndex = buf[0]; | 58 | if (buf == NULL) |
59 | if (num > 1) { | 59 | args.ucRegIndex = 0; |
60 | else | ||
61 | args.ucRegIndex = buf[0]; | ||
62 | if (num) | ||
60 | num--; | 63 | num--; |
64 | if (num) | ||
61 | memcpy(&out, &buf[1], num); | 65 | memcpy(&out, &buf[1], num); |
62 | } | ||
63 | args.lpI2CDataOut = cpu_to_le16(out); | 66 | args.lpI2CDataOut = cpu_to_le16(out); |
64 | } else { | 67 | } else { |
65 | if (num > ATOM_MAX_HW_I2C_READ) { | 68 | if (num > ATOM_MAX_HW_I2C_READ) { |
@@ -96,14 +99,14 @@ int radeon_atom_hw_i2c_xfer(struct i2c_adapter *i2c_adap, | |||
96 | struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap); | 99 | struct radeon_i2c_chan *i2c = i2c_get_adapdata(i2c_adap); |
97 | struct i2c_msg *p; | 100 | struct i2c_msg *p; |
98 | int i, remaining, current_count, buffer_offset, max_bytes, ret; | 101 | int i, remaining, current_count, buffer_offset, max_bytes, ret; |
99 | u8 buf = 0, flags; | 102 | u8 flags; |
100 | 103 | ||
101 | /* check for bus probe */ | 104 | /* check for bus probe */ |
102 | p = &msgs[0]; | 105 | p = &msgs[0]; |
103 | if ((num == 1) && (p->len == 0)) { | 106 | if ((num == 1) && (p->len == 0)) { |
104 | ret = radeon_process_i2c_ch(i2c, | 107 | ret = radeon_process_i2c_ch(i2c, |
105 | p->addr, HW_I2C_WRITE, | 108 | p->addr, HW_I2C_WRITE, |
106 | &buf, 1); | 109 | NULL, 0); |
107 | if (ret) | 110 | if (ret) |
108 | return ret; | 111 | return ret; |
109 | else | 112 | else |
diff --git a/drivers/gpu/drm/radeon/dce6_afmt.c b/drivers/gpu/drm/radeon/dce6_afmt.c index 009f46e0ce72..de86493cbc44 100644 --- a/drivers/gpu/drm/radeon/dce6_afmt.c +++ b/drivers/gpu/drm/radeon/dce6_afmt.c | |||
@@ -93,11 +93,13 @@ void dce6_afmt_select_pin(struct drm_encoder *encoder) | |||
93 | struct radeon_device *rdev = encoder->dev->dev_private; | 93 | struct radeon_device *rdev = encoder->dev->dev_private; |
94 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 94 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
95 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; | 95 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
96 | u32 offset = dig->afmt->offset; | 96 | u32 offset; |
97 | 97 | ||
98 | if (!dig->afmt->pin) | 98 | if (!dig || !dig->afmt || !dig->afmt->pin) |
99 | return; | 99 | return; |
100 | 100 | ||
101 | offset = dig->afmt->offset; | ||
102 | |||
101 | WREG32(AFMT_AUDIO_SRC_CONTROL + offset, | 103 | WREG32(AFMT_AUDIO_SRC_CONTROL + offset, |
102 | AFMT_AUDIO_SRC_SELECT(dig->afmt->pin->id)); | 104 | AFMT_AUDIO_SRC_SELECT(dig->afmt->pin->id)); |
103 | } | 105 | } |
@@ -112,7 +114,7 @@ void dce6_afmt_write_latency_fields(struct drm_encoder *encoder, | |||
112 | struct radeon_connector *radeon_connector = NULL; | 114 | struct radeon_connector *radeon_connector = NULL; |
113 | u32 tmp = 0, offset; | 115 | u32 tmp = 0, offset; |
114 | 116 | ||
115 | if (!dig->afmt->pin) | 117 | if (!dig || !dig->afmt || !dig->afmt->pin) |
116 | return; | 118 | return; |
117 | 119 | ||
118 | offset = dig->afmt->pin->offset; | 120 | offset = dig->afmt->pin->offset; |
@@ -156,7 +158,7 @@ void dce6_afmt_write_speaker_allocation(struct drm_encoder *encoder) | |||
156 | u8 *sadb; | 158 | u8 *sadb; |
157 | int sad_count; | 159 | int sad_count; |
158 | 160 | ||
159 | if (!dig->afmt->pin) | 161 | if (!dig || !dig->afmt || !dig->afmt->pin) |
160 | return; | 162 | return; |
161 | 163 | ||
162 | offset = dig->afmt->pin->offset; | 164 | offset = dig->afmt->pin->offset; |
@@ -217,7 +219,7 @@ void dce6_afmt_write_sad_regs(struct drm_encoder *encoder) | |||
217 | { AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR13, HDMI_AUDIO_CODING_TYPE_WMA_PRO }, | 219 | { AZ_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR13, HDMI_AUDIO_CODING_TYPE_WMA_PRO }, |
218 | }; | 220 | }; |
219 | 221 | ||
220 | if (!dig->afmt->pin) | 222 | if (!dig || !dig->afmt || !dig->afmt->pin) |
221 | return; | 223 | return; |
222 | 224 | ||
223 | offset = dig->afmt->pin->offset; | 225 | offset = dig->afmt->pin->offset; |
diff --git a/drivers/gpu/drm/radeon/ni_dpm.c b/drivers/gpu/drm/radeon/ni_dpm.c index cdc003085a76..49c4d48f54d6 100644 --- a/drivers/gpu/drm/radeon/ni_dpm.c +++ b/drivers/gpu/drm/radeon/ni_dpm.c | |||
@@ -785,8 +785,8 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev, | |||
785 | struct ni_ps *ps = ni_get_ps(rps); | 785 | struct ni_ps *ps = ni_get_ps(rps); |
786 | struct radeon_clock_and_voltage_limits *max_limits; | 786 | struct radeon_clock_and_voltage_limits *max_limits; |
787 | bool disable_mclk_switching; | 787 | bool disable_mclk_switching; |
788 | u32 mclk, sclk; | 788 | u32 mclk; |
789 | u16 vddc, vddci; | 789 | u16 vddci; |
790 | u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc; | 790 | u32 max_sclk_vddc, max_mclk_vddci, max_mclk_vddc; |
791 | int i; | 791 | int i; |
792 | 792 | ||
@@ -839,24 +839,14 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev, | |||
839 | 839 | ||
840 | /* XXX validate the min clocks required for display */ | 840 | /* XXX validate the min clocks required for display */ |
841 | 841 | ||
842 | /* adjust low state */ | ||
842 | if (disable_mclk_switching) { | 843 | if (disable_mclk_switching) { |
843 | mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; | 844 | ps->performance_levels[0].mclk = |
844 | sclk = ps->performance_levels[0].sclk; | 845 | ps->performance_levels[ps->performance_level_count - 1].mclk; |
845 | vddc = ps->performance_levels[0].vddc; | 846 | ps->performance_levels[0].vddci = |
846 | vddci = ps->performance_levels[ps->performance_level_count - 1].vddci; | 847 | ps->performance_levels[ps->performance_level_count - 1].vddci; |
847 | } else { | ||
848 | sclk = ps->performance_levels[0].sclk; | ||
849 | mclk = ps->performance_levels[0].mclk; | ||
850 | vddc = ps->performance_levels[0].vddc; | ||
851 | vddci = ps->performance_levels[0].vddci; | ||
852 | } | 848 | } |
853 | 849 | ||
854 | /* adjusted low state */ | ||
855 | ps->performance_levels[0].sclk = sclk; | ||
856 | ps->performance_levels[0].mclk = mclk; | ||
857 | ps->performance_levels[0].vddc = vddc; | ||
858 | ps->performance_levels[0].vddci = vddci; | ||
859 | |||
860 | btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, | 850 | btc_skip_blacklist_clocks(rdev, max_limits->sclk, max_limits->mclk, |
861 | &ps->performance_levels[0].sclk, | 851 | &ps->performance_levels[0].sclk, |
862 | &ps->performance_levels[0].mclk); | 852 | &ps->performance_levels[0].mclk); |
@@ -868,11 +858,15 @@ static void ni_apply_state_adjust_rules(struct radeon_device *rdev, | |||
868 | ps->performance_levels[i].vddc = ps->performance_levels[i - 1].vddc; | 858 | ps->performance_levels[i].vddc = ps->performance_levels[i - 1].vddc; |
869 | } | 859 | } |
870 | 860 | ||
861 | /* adjust remaining states */ | ||
871 | if (disable_mclk_switching) { | 862 | if (disable_mclk_switching) { |
872 | mclk = ps->performance_levels[0].mclk; | 863 | mclk = ps->performance_levels[0].mclk; |
864 | vddci = ps->performance_levels[0].vddci; | ||
873 | for (i = 1; i < ps->performance_level_count; i++) { | 865 | for (i = 1; i < ps->performance_level_count; i++) { |
874 | if (mclk < ps->performance_levels[i].mclk) | 866 | if (mclk < ps->performance_levels[i].mclk) |
875 | mclk = ps->performance_levels[i].mclk; | 867 | mclk = ps->performance_levels[i].mclk; |
868 | if (vddci < ps->performance_levels[i].vddci) | ||
869 | vddci = ps->performance_levels[i].vddci; | ||
876 | } | 870 | } |
877 | for (i = 0; i < ps->performance_level_count; i++) { | 871 | for (i = 0; i < ps->performance_level_count; i++) { |
878 | ps->performance_levels[i].mclk = mclk; | 872 | ps->performance_levels[i].mclk = mclk; |
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c index 4b89262f3f0e..b7d3ecba43e3 100644 --- a/drivers/gpu/drm/radeon/r600_hdmi.c +++ b/drivers/gpu/drm/radeon/r600_hdmi.c | |||
@@ -304,9 +304,9 @@ void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock) | |||
304 | WREG32(DCCG_AUDIO_DTO1_MODULE, dto_modulo); | 304 | WREG32(DCCG_AUDIO_DTO1_MODULE, dto_modulo); |
305 | WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */ | 305 | WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */ |
306 | } | 306 | } |
307 | } else if (ASIC_IS_DCE3(rdev)) { | 307 | } else { |
308 | /* according to the reg specs, this should DCE3.2 only, but in | 308 | /* according to the reg specs, this should DCE3.2 only, but in |
309 | * practice it seems to cover DCE3.0/3.1 as well. | 309 | * practice it seems to cover DCE2.0/3.0/3.1 as well. |
310 | */ | 310 | */ |
311 | if (dig->dig_encoder == 0) { | 311 | if (dig->dig_encoder == 0) { |
312 | WREG32(DCCG_AUDIO_DTO0_PHASE, base_rate * 100); | 312 | WREG32(DCCG_AUDIO_DTO0_PHASE, base_rate * 100); |
@@ -317,10 +317,6 @@ void r600_audio_set_dto(struct drm_encoder *encoder, u32 clock) | |||
317 | WREG32(DCCG_AUDIO_DTO1_MODULE, clock * 100); | 317 | WREG32(DCCG_AUDIO_DTO1_MODULE, clock * 100); |
318 | WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */ | 318 | WREG32(DCCG_AUDIO_DTO_SELECT, 1); /* select DTO1 */ |
319 | } | 319 | } |
320 | } else { | ||
321 | /* according to the reg specs, this should be DCE2.0 and DCE3.0/3.1 */ | ||
322 | WREG32(AUDIO_DTO, AUDIO_DTO_PHASE(base_rate / 10) | | ||
323 | AUDIO_DTO_MODULE(clock / 10)); | ||
324 | } | 320 | } |
325 | } | 321 | } |
326 | 322 | ||
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index ecf2a3960c07..b1f990d0eaa1 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -2710,10 +2710,10 @@ void radeon_vm_fence(struct radeon_device *rdev, | |||
2710 | struct radeon_vm *vm, | 2710 | struct radeon_vm *vm, |
2711 | struct radeon_fence *fence); | 2711 | struct radeon_fence *fence); |
2712 | uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr); | 2712 | uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr); |
2713 | int radeon_vm_bo_update_pte(struct radeon_device *rdev, | 2713 | int radeon_vm_bo_update(struct radeon_device *rdev, |
2714 | struct radeon_vm *vm, | 2714 | struct radeon_vm *vm, |
2715 | struct radeon_bo *bo, | 2715 | struct radeon_bo *bo, |
2716 | struct ttm_mem_reg *mem); | 2716 | struct ttm_mem_reg *mem); |
2717 | void radeon_vm_bo_invalidate(struct radeon_device *rdev, | 2717 | void radeon_vm_bo_invalidate(struct radeon_device *rdev, |
2718 | struct radeon_bo *bo); | 2718 | struct radeon_bo *bo); |
2719 | struct radeon_bo_va *radeon_vm_bo_find(struct radeon_vm *vm, | 2719 | struct radeon_bo_va *radeon_vm_bo_find(struct radeon_vm *vm, |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index f79ee184ffd5..5c39bf7c3d88 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -2918,7 +2918,7 @@ int radeon_atom_get_memory_pll_dividers(struct radeon_device *rdev, | |||
2918 | mpll_param->dll_speed = args.ucDllSpeed; | 2918 | mpll_param->dll_speed = args.ucDllSpeed; |
2919 | mpll_param->bwcntl = args.ucBWCntl; | 2919 | mpll_param->bwcntl = args.ucBWCntl; |
2920 | mpll_param->vco_mode = | 2920 | mpll_param->vco_mode = |
2921 | (args.ucPllCntlFlag & MPLL_CNTL_FLAG_VCO_MODE_MASK) ? 1 : 0; | 2921 | (args.ucPllCntlFlag & MPLL_CNTL_FLAG_VCO_MODE_MASK); |
2922 | mpll_param->yclk_sel = | 2922 | mpll_param->yclk_sel = |
2923 | (args.ucPllCntlFlag & MPLL_CNTL_FLAG_BYPASS_DQ_PLL) ? 1 : 0; | 2923 | (args.ucPllCntlFlag & MPLL_CNTL_FLAG_BYPASS_DQ_PLL) ? 1 : 0; |
2924 | mpll_param->qdr = | 2924 | mpll_param->qdr = |
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c index f41594b2eeac..0b366169d64d 100644 --- a/drivers/gpu/drm/radeon/radeon_cs.c +++ b/drivers/gpu/drm/radeon/radeon_cs.c | |||
@@ -360,13 +360,13 @@ static int radeon_bo_vm_update_pte(struct radeon_cs_parser *parser, | |||
360 | struct radeon_bo *bo; | 360 | struct radeon_bo *bo; |
361 | int r; | 361 | int r; |
362 | 362 | ||
363 | r = radeon_vm_bo_update_pte(rdev, vm, rdev->ring_tmp_bo.bo, &rdev->ring_tmp_bo.bo->tbo.mem); | 363 | r = radeon_vm_bo_update(rdev, vm, rdev->ring_tmp_bo.bo, &rdev->ring_tmp_bo.bo->tbo.mem); |
364 | if (r) { | 364 | if (r) { |
365 | return r; | 365 | return r; |
366 | } | 366 | } |
367 | list_for_each_entry(lobj, &parser->validated, tv.head) { | 367 | list_for_each_entry(lobj, &parser->validated, tv.head) { |
368 | bo = lobj->bo; | 368 | bo = lobj->bo; |
369 | r = radeon_vm_bo_update_pte(parser->rdev, vm, bo, &bo->tbo.mem); | 369 | r = radeon_vm_bo_update(parser->rdev, vm, bo, &bo->tbo.mem); |
370 | if (r) { | 370 | if (r) { |
371 | return r; | 371 | return r; |
372 | } | 372 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h index 543dcfae7e6f..00e0d449021c 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.h +++ b/drivers/gpu/drm/radeon/radeon_drv.h | |||
@@ -108,9 +108,10 @@ | |||
108 | * 1.31- Add support for num Z pipes from GET_PARAM | 108 | * 1.31- Add support for num Z pipes from GET_PARAM |
109 | * 1.32- fixes for rv740 setup | 109 | * 1.32- fixes for rv740 setup |
110 | * 1.33- Add r6xx/r7xx const buffer support | 110 | * 1.33- Add r6xx/r7xx const buffer support |
111 | * 1.34- fix evergreen/cayman GS register | ||
111 | */ | 112 | */ |
112 | #define DRIVER_MAJOR 1 | 113 | #define DRIVER_MAJOR 1 |
113 | #define DRIVER_MINOR 33 | 114 | #define DRIVER_MINOR 34 |
114 | #define DRIVER_PATCHLEVEL 0 | 115 | #define DRIVER_PATCHLEVEL 0 |
115 | 116 | ||
116 | long radeon_drm_ioctl(struct file *filp, | 117 | long radeon_drm_ioctl(struct file *filp, |
diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c index 3044e504f4ec..96e440061bdb 100644 --- a/drivers/gpu/drm/radeon/radeon_gart.c +++ b/drivers/gpu/drm/radeon/radeon_gart.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <drm/radeon_drm.h> | 29 | #include <drm/radeon_drm.h> |
30 | #include "radeon.h" | 30 | #include "radeon.h" |
31 | #include "radeon_reg.h" | 31 | #include "radeon_reg.h" |
32 | #include "radeon_trace.h" | ||
32 | 33 | ||
33 | /* | 34 | /* |
34 | * GART | 35 | * GART |
@@ -737,6 +738,7 @@ struct radeon_fence *radeon_vm_grab_id(struct radeon_device *rdev, | |||
737 | for (i = 0; i < 2; ++i) { | 738 | for (i = 0; i < 2; ++i) { |
738 | if (choices[i]) { | 739 | if (choices[i]) { |
739 | vm->id = choices[i]; | 740 | vm->id = choices[i]; |
741 | trace_radeon_vm_grab_id(vm->id, ring); | ||
740 | return rdev->vm_manager.active[choices[i]]; | 742 | return rdev->vm_manager.active[choices[i]]; |
741 | } | 743 | } |
742 | } | 744 | } |
@@ -1116,7 +1118,7 @@ static void radeon_vm_update_ptes(struct radeon_device *rdev, | |||
1116 | } | 1118 | } |
1117 | 1119 | ||
1118 | /** | 1120 | /** |
1119 | * radeon_vm_bo_update_pte - map a bo into the vm page table | 1121 | * radeon_vm_bo_update - map a bo into the vm page table |
1120 | * | 1122 | * |
1121 | * @rdev: radeon_device pointer | 1123 | * @rdev: radeon_device pointer |
1122 | * @vm: requested vm | 1124 | * @vm: requested vm |
@@ -1128,10 +1130,10 @@ static void radeon_vm_update_ptes(struct radeon_device *rdev, | |||
1128 | * | 1130 | * |
1129 | * Object have to be reserved & global and local mutex must be locked! | 1131 | * Object have to be reserved & global and local mutex must be locked! |
1130 | */ | 1132 | */ |
1131 | int radeon_vm_bo_update_pte(struct radeon_device *rdev, | 1133 | int radeon_vm_bo_update(struct radeon_device *rdev, |
1132 | struct radeon_vm *vm, | 1134 | struct radeon_vm *vm, |
1133 | struct radeon_bo *bo, | 1135 | struct radeon_bo *bo, |
1134 | struct ttm_mem_reg *mem) | 1136 | struct ttm_mem_reg *mem) |
1135 | { | 1137 | { |
1136 | struct radeon_ib ib; | 1138 | struct radeon_ib ib; |
1137 | struct radeon_bo_va *bo_va; | 1139 | struct radeon_bo_va *bo_va; |
@@ -1176,6 +1178,8 @@ int radeon_vm_bo_update_pte(struct radeon_device *rdev, | |||
1176 | bo_va->valid = false; | 1178 | bo_va->valid = false; |
1177 | } | 1179 | } |
1178 | 1180 | ||
1181 | trace_radeon_vm_bo_update(bo_va); | ||
1182 | |||
1179 | nptes = radeon_bo_ngpu_pages(bo); | 1183 | nptes = radeon_bo_ngpu_pages(bo); |
1180 | 1184 | ||
1181 | /* assume two extra pdes in case the mapping overlaps the borders */ | 1185 | /* assume two extra pdes in case the mapping overlaps the borders */ |
@@ -1257,7 +1261,7 @@ int radeon_vm_bo_rmv(struct radeon_device *rdev, | |||
1257 | mutex_lock(&rdev->vm_manager.lock); | 1261 | mutex_lock(&rdev->vm_manager.lock); |
1258 | mutex_lock(&bo_va->vm->mutex); | 1262 | mutex_lock(&bo_va->vm->mutex); |
1259 | if (bo_va->soffset) { | 1263 | if (bo_va->soffset) { |
1260 | r = radeon_vm_bo_update_pte(rdev, bo_va->vm, bo_va->bo, NULL); | 1264 | r = radeon_vm_bo_update(rdev, bo_va->vm, bo_va->bo, NULL); |
1261 | } | 1265 | } |
1262 | mutex_unlock(&rdev->vm_manager.lock); | 1266 | mutex_unlock(&rdev->vm_manager.lock); |
1263 | list_del(&bo_va->vm_list); | 1267 | list_del(&bo_va->vm_list); |
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index d1385ccc672c..dc75bb603ea5 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -537,8 +537,7 @@ static ssize_t radeon_hwmon_show_temp(struct device *dev, | |||
537 | struct device_attribute *attr, | 537 | struct device_attribute *attr, |
538 | char *buf) | 538 | char *buf) |
539 | { | 539 | { |
540 | struct drm_device *ddev = dev_get_drvdata(dev); | 540 | struct radeon_device *rdev = dev_get_drvdata(dev); |
541 | struct radeon_device *rdev = ddev->dev_private; | ||
542 | int temp; | 541 | int temp; |
543 | 542 | ||
544 | if (rdev->asic->pm.get_temperature) | 543 | if (rdev->asic->pm.get_temperature) |
@@ -566,23 +565,14 @@ static ssize_t radeon_hwmon_show_temp_thresh(struct device *dev, | |||
566 | return snprintf(buf, PAGE_SIZE, "%d\n", temp); | 565 | return snprintf(buf, PAGE_SIZE, "%d\n", temp); |
567 | } | 566 | } |
568 | 567 | ||
569 | static ssize_t radeon_hwmon_show_name(struct device *dev, | ||
570 | struct device_attribute *attr, | ||
571 | char *buf) | ||
572 | { | ||
573 | return sprintf(buf, "radeon\n"); | ||
574 | } | ||
575 | |||
576 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, radeon_hwmon_show_temp, NULL, 0); | 568 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, radeon_hwmon_show_temp, NULL, 0); |
577 | static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, radeon_hwmon_show_temp_thresh, NULL, 0); | 569 | static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, radeon_hwmon_show_temp_thresh, NULL, 0); |
578 | static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, radeon_hwmon_show_temp_thresh, NULL, 1); | 570 | static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, radeon_hwmon_show_temp_thresh, NULL, 1); |
579 | static SENSOR_DEVICE_ATTR(name, S_IRUGO, radeon_hwmon_show_name, NULL, 0); | ||
580 | 571 | ||
581 | static struct attribute *hwmon_attributes[] = { | 572 | static struct attribute *hwmon_attributes[] = { |
582 | &sensor_dev_attr_temp1_input.dev_attr.attr, | 573 | &sensor_dev_attr_temp1_input.dev_attr.attr, |
583 | &sensor_dev_attr_temp1_crit.dev_attr.attr, | 574 | &sensor_dev_attr_temp1_crit.dev_attr.attr, |
584 | &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, | 575 | &sensor_dev_attr_temp1_crit_hyst.dev_attr.attr, |
585 | &sensor_dev_attr_name.dev_attr.attr, | ||
586 | NULL | 576 | NULL |
587 | }; | 577 | }; |
588 | 578 | ||
@@ -607,11 +597,15 @@ static const struct attribute_group hwmon_attrgroup = { | |||
607 | .is_visible = hwmon_attributes_visible, | 597 | .is_visible = hwmon_attributes_visible, |
608 | }; | 598 | }; |
609 | 599 | ||
600 | static const struct attribute_group *hwmon_groups[] = { | ||
601 | &hwmon_attrgroup, | ||
602 | NULL | ||
603 | }; | ||
604 | |||
610 | static int radeon_hwmon_init(struct radeon_device *rdev) | 605 | static int radeon_hwmon_init(struct radeon_device *rdev) |
611 | { | 606 | { |
612 | int err = 0; | 607 | int err = 0; |
613 | 608 | struct device *hwmon_dev; | |
614 | rdev->pm.int_hwmon_dev = NULL; | ||
615 | 609 | ||
616 | switch (rdev->pm.int_thermal_type) { | 610 | switch (rdev->pm.int_thermal_type) { |
617 | case THERMAL_TYPE_RV6XX: | 611 | case THERMAL_TYPE_RV6XX: |
@@ -624,20 +618,13 @@ static int radeon_hwmon_init(struct radeon_device *rdev) | |||
624 | case THERMAL_TYPE_KV: | 618 | case THERMAL_TYPE_KV: |
625 | if (rdev->asic->pm.get_temperature == NULL) | 619 | if (rdev->asic->pm.get_temperature == NULL) |
626 | return err; | 620 | return err; |
627 | rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev); | 621 | hwmon_dev = hwmon_device_register_with_groups(rdev->dev, |
628 | if (IS_ERR(rdev->pm.int_hwmon_dev)) { | 622 | "radeon", rdev, |
629 | err = PTR_ERR(rdev->pm.int_hwmon_dev); | 623 | hwmon_groups); |
624 | if (IS_ERR(hwmon_dev)) { | ||
625 | err = PTR_ERR(hwmon_dev); | ||
630 | dev_err(rdev->dev, | 626 | dev_err(rdev->dev, |
631 | "Unable to register hwmon device: %d\n", err); | 627 | "Unable to register hwmon device: %d\n", err); |
632 | break; | ||
633 | } | ||
634 | dev_set_drvdata(rdev->pm.int_hwmon_dev, rdev->ddev); | ||
635 | err = sysfs_create_group(&rdev->pm.int_hwmon_dev->kobj, | ||
636 | &hwmon_attrgroup); | ||
637 | if (err) { | ||
638 | dev_err(rdev->dev, | ||
639 | "Unable to create hwmon sysfs file: %d\n", err); | ||
640 | hwmon_device_unregister(rdev->dev); | ||
641 | } | 628 | } |
642 | break; | 629 | break; |
643 | default: | 630 | default: |
@@ -647,14 +634,6 @@ static int radeon_hwmon_init(struct radeon_device *rdev) | |||
647 | return err; | 634 | return err; |
648 | } | 635 | } |
649 | 636 | ||
650 | static void radeon_hwmon_fini(struct radeon_device *rdev) | ||
651 | { | ||
652 | if (rdev->pm.int_hwmon_dev) { | ||
653 | sysfs_remove_group(&rdev->pm.int_hwmon_dev->kobj, &hwmon_attrgroup); | ||
654 | hwmon_device_unregister(rdev->pm.int_hwmon_dev); | ||
655 | } | ||
656 | } | ||
657 | |||
658 | static void radeon_dpm_thermal_work_handler(struct work_struct *work) | 637 | static void radeon_dpm_thermal_work_handler(struct work_struct *work) |
659 | { | 638 | { |
660 | struct radeon_device *rdev = | 639 | struct radeon_device *rdev = |
@@ -1337,8 +1316,6 @@ static void radeon_pm_fini_old(struct radeon_device *rdev) | |||
1337 | 1316 | ||
1338 | if (rdev->pm.power_state) | 1317 | if (rdev->pm.power_state) |
1339 | kfree(rdev->pm.power_state); | 1318 | kfree(rdev->pm.power_state); |
1340 | |||
1341 | radeon_hwmon_fini(rdev); | ||
1342 | } | 1319 | } |
1343 | 1320 | ||
1344 | static void radeon_pm_fini_dpm(struct radeon_device *rdev) | 1321 | static void radeon_pm_fini_dpm(struct radeon_device *rdev) |
@@ -1358,8 +1335,6 @@ static void radeon_pm_fini_dpm(struct radeon_device *rdev) | |||
1358 | 1335 | ||
1359 | if (rdev->pm.power_state) | 1336 | if (rdev->pm.power_state) |
1360 | kfree(rdev->pm.power_state); | 1337 | kfree(rdev->pm.power_state); |
1361 | |||
1362 | radeon_hwmon_fini(rdev); | ||
1363 | } | 1338 | } |
1364 | 1339 | ||
1365 | void radeon_pm_fini(struct radeon_device *rdev) | 1340 | void radeon_pm_fini(struct radeon_device *rdev) |
diff --git a/drivers/gpu/drm/radeon/radeon_trace.h b/drivers/gpu/drm/radeon/radeon_trace.h index 9f0e18172b6e..0473257d4078 100644 --- a/drivers/gpu/drm/radeon/radeon_trace.h +++ b/drivers/gpu/drm/radeon/radeon_trace.h | |||
@@ -47,6 +47,39 @@ TRACE_EVENT(radeon_cs, | |||
47 | __entry->fences) | 47 | __entry->fences) |
48 | ); | 48 | ); |
49 | 49 | ||
50 | TRACE_EVENT(radeon_vm_grab_id, | ||
51 | TP_PROTO(unsigned vmid, int ring), | ||
52 | TP_ARGS(vmid, ring), | ||
53 | TP_STRUCT__entry( | ||
54 | __field(u32, vmid) | ||
55 | __field(u32, ring) | ||
56 | ), | ||
57 | |||
58 | TP_fast_assign( | ||
59 | __entry->vmid = vmid; | ||
60 | __entry->ring = ring; | ||
61 | ), | ||
62 | TP_printk("vmid=%u, ring=%u", __entry->vmid, __entry->ring) | ||
63 | ); | ||
64 | |||
65 | TRACE_EVENT(radeon_vm_bo_update, | ||
66 | TP_PROTO(struct radeon_bo_va *bo_va), | ||
67 | TP_ARGS(bo_va), | ||
68 | TP_STRUCT__entry( | ||
69 | __field(u64, soffset) | ||
70 | __field(u64, eoffset) | ||
71 | __field(u32, flags) | ||
72 | ), | ||
73 | |||
74 | TP_fast_assign( | ||
75 | __entry->soffset = bo_va->soffset; | ||
76 | __entry->eoffset = bo_va->eoffset; | ||
77 | __entry->flags = bo_va->flags; | ||
78 | ), | ||
79 | TP_printk("soffs=%010llx, eoffs=%010llx, flags=%08x", | ||
80 | __entry->soffset, __entry->eoffset, __entry->flags) | ||
81 | ); | ||
82 | |||
50 | TRACE_EVENT(radeon_vm_set_page, | 83 | TRACE_EVENT(radeon_vm_set_page, |
51 | TP_PROTO(uint64_t pe, uint64_t addr, unsigned count, | 84 | TP_PROTO(uint64_t pe, uint64_t addr, unsigned count, |
52 | uint32_t incr, uint32_t flags), | 85 | uint32_t incr, uint32_t flags), |
diff --git a/drivers/gpu/drm/radeon/reg_srcs/cayman b/drivers/gpu/drm/radeon/reg_srcs/cayman index a072fa8c46b0..d46b58d078aa 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/cayman +++ b/drivers/gpu/drm/radeon/reg_srcs/cayman | |||
@@ -21,7 +21,7 @@ cayman 0x9400 | |||
21 | 0x000089AC VGT_COMPUTE_THREAD_GOURP_SIZE | 21 | 0x000089AC VGT_COMPUTE_THREAD_GOURP_SIZE |
22 | 0x000089B0 VGT_HS_OFFCHIP_PARAM | 22 | 0x000089B0 VGT_HS_OFFCHIP_PARAM |
23 | 0x00008A14 PA_CL_ENHANCE | 23 | 0x00008A14 PA_CL_ENHANCE |
24 | 0x00008A60 PA_SC_LINE_STIPPLE_VALUE | 24 | 0x00008A60 PA_SU_LINE_STIPPLE_VALUE |
25 | 0x00008B10 PA_SC_LINE_STIPPLE_STATE | 25 | 0x00008B10 PA_SC_LINE_STIPPLE_STATE |
26 | 0x00008BF0 PA_SC_ENHANCE | 26 | 0x00008BF0 PA_SC_ENHANCE |
27 | 0x00008D8C SQ_DYN_GPR_CNTL_PS_FLUSH_REQ | 27 | 0x00008D8C SQ_DYN_GPR_CNTL_PS_FLUSH_REQ |
@@ -532,7 +532,7 @@ cayman 0x9400 | |||
532 | 0x00028B84 PA_SU_POLY_OFFSET_FRONT_OFFSET | 532 | 0x00028B84 PA_SU_POLY_OFFSET_FRONT_OFFSET |
533 | 0x00028B88 PA_SU_POLY_OFFSET_BACK_SCALE | 533 | 0x00028B88 PA_SU_POLY_OFFSET_BACK_SCALE |
534 | 0x00028B8C PA_SU_POLY_OFFSET_BACK_OFFSET | 534 | 0x00028B8C PA_SU_POLY_OFFSET_BACK_OFFSET |
535 | 0x00028B74 VGT_GS_INSTANCE_CNT | 535 | 0x00028B90 VGT_GS_INSTANCE_CNT |
536 | 0x00028BD4 PA_SC_CENTROID_PRIORITY_0 | 536 | 0x00028BD4 PA_SC_CENTROID_PRIORITY_0 |
537 | 0x00028BD8 PA_SC_CENTROID_PRIORITY_1 | 537 | 0x00028BD8 PA_SC_CENTROID_PRIORITY_1 |
538 | 0x00028BDC PA_SC_LINE_CNTL | 538 | 0x00028BDC PA_SC_LINE_CNTL |
diff --git a/drivers/gpu/drm/radeon/reg_srcs/evergreen b/drivers/gpu/drm/radeon/reg_srcs/evergreen index b912a37689bf..57745c8761c8 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/evergreen +++ b/drivers/gpu/drm/radeon/reg_srcs/evergreen | |||
@@ -22,7 +22,7 @@ evergreen 0x9400 | |||
22 | 0x000089A4 VGT_COMPUTE_START_Z | 22 | 0x000089A4 VGT_COMPUTE_START_Z |
23 | 0x000089AC VGT_COMPUTE_THREAD_GOURP_SIZE | 23 | 0x000089AC VGT_COMPUTE_THREAD_GOURP_SIZE |
24 | 0x00008A14 PA_CL_ENHANCE | 24 | 0x00008A14 PA_CL_ENHANCE |
25 | 0x00008A60 PA_SC_LINE_STIPPLE_VALUE | 25 | 0x00008A60 PA_SU_LINE_STIPPLE_VALUE |
26 | 0x00008B10 PA_SC_LINE_STIPPLE_STATE | 26 | 0x00008B10 PA_SC_LINE_STIPPLE_STATE |
27 | 0x00008BF0 PA_SC_ENHANCE | 27 | 0x00008BF0 PA_SC_ENHANCE |
28 | 0x00008D8C SQ_DYN_GPR_CNTL_PS_FLUSH_REQ | 28 | 0x00008D8C SQ_DYN_GPR_CNTL_PS_FLUSH_REQ |
@@ -545,7 +545,7 @@ evergreen 0x9400 | |||
545 | 0x00028B84 PA_SU_POLY_OFFSET_FRONT_OFFSET | 545 | 0x00028B84 PA_SU_POLY_OFFSET_FRONT_OFFSET |
546 | 0x00028B88 PA_SU_POLY_OFFSET_BACK_SCALE | 546 | 0x00028B88 PA_SU_POLY_OFFSET_BACK_SCALE |
547 | 0x00028B8C PA_SU_POLY_OFFSET_BACK_OFFSET | 547 | 0x00028B8C PA_SU_POLY_OFFSET_BACK_OFFSET |
548 | 0x00028B74 VGT_GS_INSTANCE_CNT | 548 | 0x00028B90 VGT_GS_INSTANCE_CNT |
549 | 0x00028C00 PA_SC_LINE_CNTL | 549 | 0x00028C00 PA_SC_LINE_CNTL |
550 | 0x00028C08 PA_SU_VTX_CNTL | 550 | 0x00028C08 PA_SU_VTX_CNTL |
551 | 0x00028C0C PA_CL_GB_VERT_CLIP_ADJ | 551 | 0x00028C0C PA_CL_GB_VERT_CLIP_ADJ |
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index 6a64ccaa0695..a36736dab5e0 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
@@ -3882,8 +3882,15 @@ static int si_mc_init(struct radeon_device *rdev) | |||
3882 | rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); | 3882 | rdev->mc.aper_base = pci_resource_start(rdev->pdev, 0); |
3883 | rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); | 3883 | rdev->mc.aper_size = pci_resource_len(rdev->pdev, 0); |
3884 | /* size in MB on si */ | 3884 | /* size in MB on si */ |
3885 | rdev->mc.mc_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL; | 3885 | tmp = RREG32(CONFIG_MEMSIZE); |
3886 | rdev->mc.real_vram_size = RREG32(CONFIG_MEMSIZE) * 1024ULL * 1024ULL; | 3886 | /* some boards may have garbage in the upper 16 bits */ |
3887 | if (tmp & 0xffff0000) { | ||
3888 | DRM_INFO("Probable bad vram size: 0x%08x\n", tmp); | ||
3889 | if (tmp & 0xffff) | ||
3890 | tmp &= 0xffff; | ||
3891 | } | ||
3892 | rdev->mc.mc_vram_size = tmp * 1024ULL * 1024ULL; | ||
3893 | rdev->mc.real_vram_size = rdev->mc.mc_vram_size; | ||
3887 | rdev->mc.visible_vram_size = rdev->mc.aper_size; | 3894 | rdev->mc.visible_vram_size = rdev->mc.aper_size; |
3888 | si_vram_gtt_location(rdev, &rdev->mc); | 3895 | si_vram_gtt_location(rdev, &rdev->mc); |
3889 | radeon_update_bandwidth_info(rdev); | 3896 | radeon_update_bandwidth_info(rdev); |