diff options
author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2010-10-07 19:01:20 -0400 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-10-08 05:28:25 -0400 |
commit | 8088699f029b2a27af9bc5431ef7542c84195760 (patch) | |
tree | b60576f4b02512c6d7852bcb1e9afba21eaa7c23 /drivers/gpu | |
parent | 17f6766c622e03a938f767b49399a68107aef537 (diff) |
drm/i915: don't program FDI RX/TX in mode_set
We do this later (and more properly) when we enable FDI, so we don't
need to do it here.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 21 |
1 files changed, 0 insertions, 21 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 29ecaa0b1344..89cfe4684147 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -4140,27 +4140,6 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
4140 | 4140 | ||
4141 | if (has_edp_encoder && !intel_encoder_is_pch_edp(&has_edp_encoder->base)) { | 4141 | if (has_edp_encoder && !intel_encoder_is_pch_edp(&has_edp_encoder->base)) { |
4142 | ironlake_set_pll_edp(crtc, adjusted_mode->clock); | 4142 | ironlake_set_pll_edp(crtc, adjusted_mode->clock); |
4143 | } else { | ||
4144 | /* enable FDI RX PLL too */ | ||
4145 | reg = FDI_RX_CTL(pipe); | ||
4146 | temp = I915_READ(reg); | ||
4147 | I915_WRITE(reg, temp | FDI_RX_PLL_ENABLE); | ||
4148 | |||
4149 | POSTING_READ(reg); | ||
4150 | udelay(200); | ||
4151 | |||
4152 | /* enable FDI TX PLL too */ | ||
4153 | reg = FDI_TX_CTL(pipe); | ||
4154 | temp = I915_READ(reg); | ||
4155 | I915_WRITE(reg, temp | FDI_TX_PLL_ENABLE); | ||
4156 | |||
4157 | /* enable FDI RX PCDCLK */ | ||
4158 | reg = FDI_RX_CTL(pipe); | ||
4159 | temp = I915_READ(reg); | ||
4160 | I915_WRITE(reg, temp | FDI_PCDCLK); | ||
4161 | |||
4162 | POSTING_READ(reg); | ||
4163 | udelay(200); | ||
4164 | } | 4143 | } |
4165 | } | 4144 | } |
4166 | 4145 | ||