diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2013-07-01 00:48:33 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2013-07-04 23:43:06 -0400 |
commit | 70f824ac8c369194e9499c59e687c6aa8b1a10c8 (patch) | |
tree | 67ee00e73a433d2b42d67c6e613d2c9c4ebb1a05 /drivers/gpu | |
parent | 5ee86c4190f9e19a9e13906389069c73d7f75bfb (diff) |
drm/nvc0-/gr: tpc regs a subset of gpc, add separate list for gpc/unk regs
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu')
8 files changed, 52 insertions, 34 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c index 087295db9707..34ed87f1ff16 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc0.c | |||
@@ -1047,11 +1047,10 @@ nvc0_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | |||
1047 | 1047 | ||
1048 | nv_mask(priv, 0x000260, 0x00000001, 0x00000000); | 1048 | nv_mask(priv, 0x000260, 0x00000001, 0x00000000); |
1049 | 1049 | ||
1050 | for (i = 0; oclass->mmio[i]; i++) | 1050 | for (i = 0; oclass->hub[i]; i++) |
1051 | nvc0_graph_mmio(priv, oclass->mmio[i]); | 1051 | nvc0_graph_mmio(priv, oclass->hub[i]); |
1052 | for (i = 0; oclass->gpc[i]; i++) | 1052 | for (i = 0; oclass->gpc[i]; i++) |
1053 | nvc0_graph_mmio(priv, oclass->gpc[i]); | 1053 | nvc0_graph_mmio(priv, oclass->gpc[i]); |
1054 | nvc0_graph_mmio(priv, oclass->tpc); | ||
1055 | 1054 | ||
1056 | nv_wr32(priv, 0x404154, 0x00000000); | 1055 | nv_wr32(priv, 0x404154, 0x00000000); |
1057 | 1056 | ||
@@ -1179,7 +1178,7 @@ done: | |||
1179 | } | 1178 | } |
1180 | 1179 | ||
1181 | struct nvc0_graph_init * | 1180 | struct nvc0_graph_init * |
1182 | nvc0_grctx_init_mmio[] = { | 1181 | nvc0_grctx_init_hub[] = { |
1183 | nvc0_grctx_init_base, | 1182 | nvc0_grctx_init_base, |
1184 | nvc0_grctx_init_unk40xx, | 1183 | nvc0_grctx_init_unk40xx, |
1185 | nvc0_grctx_init_unk44xx, | 1184 | nvc0_grctx_init_unk44xx, |
@@ -1194,10 +1193,11 @@ nvc0_grctx_init_mmio[] = { | |||
1194 | NULL | 1193 | NULL |
1195 | }; | 1194 | }; |
1196 | 1195 | ||
1197 | struct nvc0_graph_init * | 1196 | static struct nvc0_graph_init * |
1198 | nvc0_grctx_init_gpc[] = { | 1197 | nvc0_grctx_init_gpc[] = { |
1199 | nvc0_grctx_init_gpc_0, | 1198 | nvc0_grctx_init_gpc_0, |
1200 | nvc0_grctx_init_gpc_1, | 1199 | nvc0_grctx_init_gpc_1, |
1200 | nvc0_grctx_init_tpc, | ||
1201 | NULL | 1201 | NULL |
1202 | }; | 1202 | }; |
1203 | 1203 | ||
@@ -1230,9 +1230,8 @@ nvc0_grctx_oclass = &(struct nvc0_grctx_oclass) { | |||
1230 | }, | 1230 | }, |
1231 | .main = nvc0_grctx_generate_main, | 1231 | .main = nvc0_grctx_generate_main, |
1232 | .mods = nvc0_grctx_generate_mods, | 1232 | .mods = nvc0_grctx_generate_mods, |
1233 | .mmio = nvc0_grctx_init_mmio, | 1233 | .hub = nvc0_grctx_init_hub, |
1234 | .gpc = nvc0_grctx_init_gpc, | 1234 | .gpc = nvc0_grctx_init_gpc, |
1235 | .tpc = nvc0_grctx_init_tpc, | ||
1236 | .icmd = nvc0_grctx_init_icmd, | 1235 | .icmd = nvc0_grctx_init_icmd, |
1237 | .mthd = nvc0_grctx_init_mthd, | 1236 | .mthd = nvc0_grctx_init_mthd, |
1238 | }.base; | 1237 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c index 09e17f9eb508..b60dffab224f 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc1.c | |||
@@ -757,7 +757,7 @@ nvc1_grctx_generate_mods(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | |||
757 | } | 757 | } |
758 | 758 | ||
759 | static struct nvc0_graph_init * | 759 | static struct nvc0_graph_init * |
760 | nvc1_grctx_init_mmio[] = { | 760 | nvc1_grctx_init_hub[] = { |
761 | nvc0_grctx_init_base, | 761 | nvc0_grctx_init_base, |
762 | nvc0_grctx_init_unk40xx, | 762 | nvc0_grctx_init_unk40xx, |
763 | nvc0_grctx_init_unk44xx, | 763 | nvc0_grctx_init_unk44xx, |
@@ -776,6 +776,7 @@ struct nvc0_graph_init * | |||
776 | nvc1_grctx_init_gpc[] = { | 776 | nvc1_grctx_init_gpc[] = { |
777 | nvc1_grctx_init_gpc_0, | 777 | nvc1_grctx_init_gpc_0, |
778 | nvc0_grctx_init_gpc_1, | 778 | nvc0_grctx_init_gpc_1, |
779 | nvc1_grctx_init_tpc, | ||
779 | NULL | 780 | NULL |
780 | }; | 781 | }; |
781 | 782 | ||
@@ -803,9 +804,8 @@ nvc1_grctx_oclass = &(struct nvc0_grctx_oclass) { | |||
803 | }, | 804 | }, |
804 | .main = nvc0_grctx_generate_main, | 805 | .main = nvc0_grctx_generate_main, |
805 | .mods = nvc1_grctx_generate_mods, | 806 | .mods = nvc1_grctx_generate_mods, |
806 | .mmio = nvc1_grctx_init_mmio, | 807 | .hub = nvc1_grctx_init_hub, |
807 | .gpc = nvc1_grctx_init_gpc, | 808 | .gpc = nvc1_grctx_init_gpc, |
808 | .tpc = nvc1_grctx_init_tpc, | ||
809 | .icmd = nvc1_grctx_init_icmd, | 809 | .icmd = nvc1_grctx_init_icmd, |
810 | .mthd = nvc1_grctx_init_mthd, | 810 | .mthd = nvc1_grctx_init_mthd, |
811 | }.base; | 811 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc3.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc3.c index 88eceefcd30d..56fa54719d2e 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc3.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc3.c | |||
@@ -70,6 +70,14 @@ nvc3_grctx_init_tpc[] = { | |||
70 | {} | 70 | {} |
71 | }; | 71 | }; |
72 | 72 | ||
73 | struct nvc0_graph_init * | ||
74 | nvc3_grctx_init_gpc[] = { | ||
75 | nvc0_grctx_init_gpc_0, | ||
76 | nvc0_grctx_init_gpc_1, | ||
77 | nvc3_grctx_init_tpc, | ||
78 | NULL | ||
79 | }; | ||
80 | |||
73 | struct nouveau_oclass * | 81 | struct nouveau_oclass * |
74 | nvc3_grctx_oclass = &(struct nvc0_grctx_oclass) { | 82 | nvc3_grctx_oclass = &(struct nvc0_grctx_oclass) { |
75 | .base.handle = NV_ENGCTX(GR, 0xc3), | 83 | .base.handle = NV_ENGCTX(GR, 0xc3), |
@@ -83,9 +91,8 @@ nvc3_grctx_oclass = &(struct nvc0_grctx_oclass) { | |||
83 | }, | 91 | }, |
84 | .main = nvc0_grctx_generate_main, | 92 | .main = nvc0_grctx_generate_main, |
85 | .mods = nvc0_grctx_generate_mods, | 93 | .mods = nvc0_grctx_generate_mods, |
86 | .mmio = nvc0_grctx_init_mmio, | 94 | .hub = nvc0_grctx_init_hub, |
87 | .gpc = nvc0_grctx_init_gpc, | 95 | .gpc = nvc3_grctx_init_gpc, |
88 | .tpc = nvc3_grctx_init_tpc, | ||
89 | .icmd = nvc0_grctx_init_icmd, | 96 | .icmd = nvc0_grctx_init_icmd, |
90 | .mthd = nvc0_grctx_init_mthd, | 97 | .mthd = nvc0_grctx_init_mthd, |
91 | }.base; | 98 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc8.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc8.c index aa766813699b..2ba8ea81a63a 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc8.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvc8.c | |||
@@ -341,6 +341,14 @@ nvc8_grctx_init_mthd[] = { | |||
341 | {} | 341 | {} |
342 | }; | 342 | }; |
343 | 343 | ||
344 | static struct nvc0_graph_init * | ||
345 | nvc8_grctx_init_gpc[] = { | ||
346 | nvc0_grctx_init_gpc_0, | ||
347 | nvc0_grctx_init_gpc_1, | ||
348 | nvc8_grctx_init_tpc, | ||
349 | NULL | ||
350 | }; | ||
351 | |||
344 | struct nouveau_oclass * | 352 | struct nouveau_oclass * |
345 | nvc8_grctx_oclass = &(struct nvc0_grctx_oclass) { | 353 | nvc8_grctx_oclass = &(struct nvc0_grctx_oclass) { |
346 | .base.handle = NV_ENGCTX(GR, 0xc8), | 354 | .base.handle = NV_ENGCTX(GR, 0xc8), |
@@ -354,9 +362,8 @@ nvc8_grctx_oclass = &(struct nvc0_grctx_oclass) { | |||
354 | }, | 362 | }, |
355 | .main = nvc0_grctx_generate_main, | 363 | .main = nvc0_grctx_generate_main, |
356 | .mods = nvc0_grctx_generate_mods, | 364 | .mods = nvc0_grctx_generate_mods, |
357 | .mmio = nvc0_grctx_init_mmio, | 365 | .hub = nvc0_grctx_init_hub, |
358 | .gpc = nvc0_grctx_init_gpc, | 366 | .gpc = nvc8_grctx_init_gpc, |
359 | .tpc = nvc8_grctx_init_tpc, | ||
360 | .icmd = nvc8_grctx_init_icmd, | 367 | .icmd = nvc8_grctx_init_icmd, |
361 | .mthd = nvc8_grctx_init_mthd, | 368 | .mthd = nvc8_grctx_init_mthd, |
362 | }.base; | 369 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c index e4f1a8c6f68c..e4eb91670ef2 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvd9.c | |||
@@ -454,7 +454,7 @@ nvd9_grctx_init_tpc[] = { | |||
454 | }; | 454 | }; |
455 | 455 | ||
456 | static struct nvc0_graph_init * | 456 | static struct nvc0_graph_init * |
457 | nvd9_grctx_init_mmio[] = { | 457 | nvd9_grctx_init_hub[] = { |
458 | nvc0_grctx_init_base, | 458 | nvc0_grctx_init_base, |
459 | nvd9_grctx_init_unk40xx, | 459 | nvd9_grctx_init_unk40xx, |
460 | nvc0_grctx_init_unk44xx, | 460 | nvc0_grctx_init_unk44xx, |
@@ -472,6 +472,7 @@ struct nvc0_graph_init * | |||
472 | nvd9_grctx_init_gpc[] = { | 472 | nvd9_grctx_init_gpc[] = { |
473 | nvd9_grctx_init_gpc_0, | 473 | nvd9_grctx_init_gpc_0, |
474 | nvc0_grctx_init_gpc_1, | 474 | nvc0_grctx_init_gpc_1, |
475 | nvd9_grctx_init_tpc, | ||
475 | NULL | 476 | NULL |
476 | }; | 477 | }; |
477 | 478 | ||
@@ -506,9 +507,8 @@ nvd9_grctx_oclass = &(struct nvc0_grctx_oclass) { | |||
506 | }, | 507 | }, |
507 | .main = nvc0_grctx_generate_main, | 508 | .main = nvc0_grctx_generate_main, |
508 | .mods = nvc1_grctx_generate_mods, | 509 | .mods = nvc1_grctx_generate_mods, |
509 | .mmio = nvd9_grctx_init_mmio, | 510 | .hub = nvd9_grctx_init_hub, |
510 | .gpc = nvd9_grctx_init_gpc, | 511 | .gpc = nvd9_grctx_init_gpc, |
511 | .tpc = nvd9_grctx_init_tpc, | ||
512 | .icmd = nvd9_grctx_init_icmd, | 512 | .icmd = nvd9_grctx_init_icmd, |
513 | .mthd = nvd9_grctx_init_mthd, | 513 | .mthd = nvd9_grctx_init_mthd, |
514 | }.base; | 514 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c index 1c68fb11b889..51fb2687b570 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnve4.c | |||
@@ -783,7 +783,11 @@ nve4_grctx_init_tpc[] = { | |||
783 | { 0x419f70, 1, 0x04, 0x00000000 }, | 783 | { 0x419f70, 1, 0x04, 0x00000000 }, |
784 | { 0x419f78, 1, 0x04, 0x0000000b }, | 784 | { 0x419f78, 1, 0x04, 0x0000000b }, |
785 | { 0x419f7c, 1, 0x04, 0x0000027a }, | 785 | { 0x419f7c, 1, 0x04, 0x0000027a }, |
786 | {} | ||
787 | }; | ||
786 | 788 | ||
789 | static struct nvc0_graph_init | ||
790 | nve4_grctx_init_unk[] = { | ||
787 | { 0x41be24, 1, 0x04, 0x00000006 }, | 791 | { 0x41be24, 1, 0x04, 0x00000006 }, |
788 | { 0x41bec0, 1, 0x04, 0x12180000 }, | 792 | { 0x41bec0, 1, 0x04, 0x12180000 }, |
789 | { 0x41bec4, 1, 0x04, 0x00037f7f }, | 793 | { 0x41bec4, 1, 0x04, 0x00037f7f }, |
@@ -797,7 +801,6 @@ nve4_grctx_init_tpc[] = { | |||
797 | { 0x41bfd0, 1, 0x04, 0x00900103 }, | 801 | { 0x41bfd0, 1, 0x04, 0x00900103 }, |
798 | { 0x41bfe0, 1, 0x04, 0x00400001 }, | 802 | { 0x41bfe0, 1, 0x04, 0x00400001 }, |
799 | { 0x41bfe4, 1, 0x04, 0x00000000 }, | 803 | { 0x41bfe4, 1, 0x04, 0x00000000 }, |
800 | |||
801 | {} | 804 | {} |
802 | }; | 805 | }; |
803 | 806 | ||
@@ -911,11 +914,10 @@ nve4_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | |||
911 | 914 | ||
912 | nv_mask(priv, 0x000260, 0x00000001, 0x00000000); | 915 | nv_mask(priv, 0x000260, 0x00000001, 0x00000000); |
913 | 916 | ||
914 | for (i = 0; oclass->mmio[i]; i++) | 917 | for (i = 0; oclass->hub[i]; i++) |
915 | nvc0_graph_mmio(priv, oclass->mmio[i]); | 918 | nvc0_graph_mmio(priv, oclass->hub[i]); |
916 | for (i = 0; oclass->gpc[i]; i++) | 919 | for (i = 0; oclass->gpc[i]; i++) |
917 | nvc0_graph_mmio(priv, oclass->gpc[i]); | 920 | nvc0_graph_mmio(priv, oclass->gpc[i]); |
918 | nvc0_graph_mmio(priv, oclass->tpc); | ||
919 | 921 | ||
920 | nv_wr32(priv, 0x404154, 0x00000000); | 922 | nv_wr32(priv, 0x404154, 0x00000000); |
921 | 923 | ||
@@ -964,7 +966,7 @@ nve4_grctx_generate_main(struct nvc0_graph_priv *priv, struct nvc0_grctx *info) | |||
964 | } | 966 | } |
965 | 967 | ||
966 | static struct nvc0_graph_init * | 968 | static struct nvc0_graph_init * |
967 | nve4_grctx_init_mmio[] = { | 969 | nve4_grctx_init_hub[] = { |
968 | nvc0_grctx_init_base, | 970 | nvc0_grctx_init_base, |
969 | nve4_grctx_init_unk40xx, | 971 | nve4_grctx_init_unk40xx, |
970 | nvc0_grctx_init_unk44xx, | 972 | nvc0_grctx_init_unk44xx, |
@@ -985,6 +987,8 @@ struct nvc0_graph_init * | |||
985 | nve4_grctx_init_gpc[] = { | 987 | nve4_grctx_init_gpc[] = { |
986 | nve4_grctx_init_gpc_0, | 988 | nve4_grctx_init_gpc_0, |
987 | nvc0_grctx_init_gpc_1, | 989 | nvc0_grctx_init_gpc_1, |
990 | nve4_grctx_init_tpc, | ||
991 | nve4_grctx_init_unk, | ||
988 | NULL | 992 | NULL |
989 | }; | 993 | }; |
990 | 994 | ||
@@ -1009,9 +1013,8 @@ nve4_grctx_oclass = &(struct nvc0_grctx_oclass) { | |||
1009 | }, | 1013 | }, |
1010 | .main = nve4_grctx_generate_main, | 1014 | .main = nve4_grctx_generate_main, |
1011 | .mods = nve4_grctx_generate_mods, | 1015 | .mods = nve4_grctx_generate_mods, |
1012 | .mmio = nve4_grctx_init_mmio, | 1016 | .hub = nve4_grctx_init_hub, |
1013 | .gpc = nve4_grctx_init_gpc, | 1017 | .gpc = nve4_grctx_init_gpc, |
1014 | .tpc = nve4_grctx_init_tpc, | ||
1015 | .icmd = nve4_grctx_init_icmd, | 1018 | .icmd = nve4_grctx_init_icmd, |
1016 | .mthd = nve4_grctx_init_mthd, | 1019 | .mthd = nve4_grctx_init_mthd, |
1017 | }.base; | 1020 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c index a692389cd9cf..c41a6f07e958 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnvf0.c | |||
@@ -200,7 +200,11 @@ nvf0_grctx_init_tpc[] = { | |||
200 | { 0x419f70, 1, 0x04, 0x00007300 }, | 200 | { 0x419f70, 1, 0x04, 0x00007300 }, |
201 | { 0x419f78, 1, 0x04, 0x000000eb }, | 201 | { 0x419f78, 1, 0x04, 0x000000eb }, |
202 | { 0x419f7c, 1, 0x04, 0x00000404 }, | 202 | { 0x419f7c, 1, 0x04, 0x00000404 }, |
203 | {} | ||
204 | }; | ||
203 | 205 | ||
206 | static struct nvc0_graph_init | ||
207 | nvf0_grctx_init_unk[] = { | ||
204 | { 0x41be24, 1, 0x04, 0x00000006 }, | 208 | { 0x41be24, 1, 0x04, 0x00000006 }, |
205 | { 0x41bec0, 1, 0x04, 0x10000000 }, | 209 | { 0x41bec0, 1, 0x04, 0x10000000 }, |
206 | { 0x41bec4, 1, 0x04, 0x00037f7f }, | 210 | { 0x41bec4, 1, 0x04, 0x00037f7f }, |
@@ -214,12 +218,11 @@ nvf0_grctx_init_tpc[] = { | |||
214 | { 0x41bfd0, 1, 0x04, 0x00900103 }, | 218 | { 0x41bfd0, 1, 0x04, 0x00900103 }, |
215 | { 0x41bfe0, 1, 0x04, 0x00400001 }, | 219 | { 0x41bfe0, 1, 0x04, 0x00400001 }, |
216 | { 0x41bfe4, 1, 0x04, 0x00000000 }, | 220 | { 0x41bfe4, 1, 0x04, 0x00000000 }, |
217 | |||
218 | {} | 221 | {} |
219 | }; | 222 | }; |
220 | 223 | ||
221 | static struct nvc0_graph_init * | 224 | static struct nvc0_graph_init * |
222 | nvf0_grctx_init_mmio[] = { | 225 | nvf0_grctx_init_hub[] = { |
223 | nvc0_grctx_init_base, | 226 | nvc0_grctx_init_base, |
224 | nvf0_grctx_init_unk40xx, | 227 | nvf0_grctx_init_unk40xx, |
225 | nvf0_grctx_init_unk44xx, | 228 | nvf0_grctx_init_unk44xx, |
@@ -239,6 +242,8 @@ struct nvc0_graph_init * | |||
239 | nvf0_grctx_init_gpc[] = { | 242 | nvf0_grctx_init_gpc[] = { |
240 | nvf0_grctx_init_gpc_0, | 243 | nvf0_grctx_init_gpc_0, |
241 | nvc0_grctx_init_gpc_1, | 244 | nvc0_grctx_init_gpc_1, |
245 | nvf0_grctx_init_tpc, | ||
246 | nvf0_grctx_init_unk, | ||
242 | NULL | 247 | NULL |
243 | }; | 248 | }; |
244 | 249 | ||
@@ -263,9 +268,8 @@ nvf0_grctx_oclass = &(struct nvc0_grctx_oclass) { | |||
263 | }, | 268 | }, |
264 | .main = nve4_grctx_generate_main, | 269 | .main = nve4_grctx_generate_main, |
265 | .mods = nve4_grctx_generate_mods, | 270 | .mods = nve4_grctx_generate_mods, |
266 | .mmio = nvf0_grctx_init_mmio, | 271 | .hub = nvf0_grctx_init_hub, |
267 | .gpc = nvf0_grctx_init_gpc, | 272 | .gpc = nvf0_grctx_init_gpc, |
268 | .tpc = nvf0_grctx_init_tpc, | ||
269 | .icmd = nvc0_grctx_init_icmd, | 273 | .icmd = nvc0_grctx_init_icmd, |
270 | .mthd = nvf0_grctx_init_mthd, | 274 | .mthd = nvf0_grctx_init_mthd, |
271 | }.base; | 275 | }.base; |
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h index 52d70ba5ffb5..f8d653b11ad7 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nvc0.h | |||
@@ -151,9 +151,8 @@ struct nvc0_grctx_oclass { | |||
151 | /* context-specific modify-on-first-load list generation function */ | 151 | /* context-specific modify-on-first-load list generation function */ |
152 | void (*mods)(struct nvc0_graph_priv *, struct nvc0_grctx *); | 152 | void (*mods)(struct nvc0_graph_priv *, struct nvc0_grctx *); |
153 | /* mmio context data */ | 153 | /* mmio context data */ |
154 | struct nvc0_graph_init **mmio; | 154 | struct nvc0_graph_init **hub; |
155 | struct nvc0_graph_init **gpc; | 155 | struct nvc0_graph_init **gpc; |
156 | struct nvc0_graph_init *tpc; | ||
157 | /* indirect context data, generated with icmds/mthds */ | 156 | /* indirect context data, generated with icmds/mthds */ |
158 | struct nvc0_graph_init *icmd; | 157 | struct nvc0_graph_init *icmd; |
159 | struct nvc0_graph_mthd *mthd; | 158 | struct nvc0_graph_mthd *mthd; |
@@ -213,7 +212,7 @@ void nvc0_grctx_generate_r418bb8(struct nvc0_graph_priv *); | |||
213 | void nvc0_grctx_generate_r406800(struct nvc0_graph_priv *); | 212 | void nvc0_grctx_generate_r406800(struct nvc0_graph_priv *); |
214 | 213 | ||
215 | extern struct nouveau_oclass *nvc0_grctx_oclass; | 214 | extern struct nouveau_oclass *nvc0_grctx_oclass; |
216 | extern struct nvc0_graph_init *nvc0_grctx_init_mmio[]; | 215 | extern struct nvc0_graph_init *nvc0_grctx_init_hub[]; |
217 | extern struct nvc0_graph_init nvc0_grctx_init_base[]; | 216 | extern struct nvc0_graph_init nvc0_grctx_init_base[]; |
218 | extern struct nvc0_graph_init nvc0_grctx_init_unk40xx[]; | 217 | extern struct nvc0_graph_init nvc0_grctx_init_unk40xx[]; |
219 | extern struct nvc0_graph_init nvc0_grctx_init_unk44xx[]; | 218 | extern struct nvc0_graph_init nvc0_grctx_init_unk44xx[]; |
@@ -225,7 +224,6 @@ extern struct nvc0_graph_init nvc0_grctx_init_unk78xx[]; | |||
225 | extern struct nvc0_graph_init nvc0_grctx_init_unk80xx[]; | 224 | extern struct nvc0_graph_init nvc0_grctx_init_unk80xx[]; |
226 | extern struct nvc0_graph_init nvc0_grctx_init_gpc_0[]; | 225 | extern struct nvc0_graph_init nvc0_grctx_init_gpc_0[]; |
227 | extern struct nvc0_graph_init nvc0_grctx_init_gpc_1[]; | 226 | extern struct nvc0_graph_init nvc0_grctx_init_gpc_1[]; |
228 | extern struct nvc0_graph_init *nvc0_grctx_init_gpc[]; | ||
229 | extern struct nvc0_graph_init nvc0_grctx_init_tpc[]; | 227 | extern struct nvc0_graph_init nvc0_grctx_init_tpc[]; |
230 | extern struct nvc0_graph_init nvc0_grctx_init_icmd[]; | 228 | extern struct nvc0_graph_init nvc0_grctx_init_icmd[]; |
231 | extern struct nvc0_graph_init nvd9_grctx_init_icmd[]; // | 229 | extern struct nvc0_graph_init nvd9_grctx_init_icmd[]; // |