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authorAlex Deucher <alexdeucher@gmail.com>2010-02-19 16:07:02 -0500
committerDave Airlie <airlied@redhat.com>2010-02-22 18:46:22 -0500
commit6271901d828b34b27607314026deaf417f9f9b75 (patch)
treed967c5aff6b08292f03a1bf7fbb4f8ae4c66652c /drivers/gpu
parent8e36113082821980c60ce89a6c5d45fc9492fc26 (diff)
drm/radeon/rv740: fix backend setup
This patch fixes occlusion queries and rendering errors on rv740 boards. Hardcoding the backend map is not an optimal solution, but a better fix is being worked on. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/radeon/r600_cp.c9
-rw-r--r--drivers/gpu/drm/radeon/rv770.c9
2 files changed, 12 insertions, 6 deletions
diff --git a/drivers/gpu/drm/radeon/r600_cp.c b/drivers/gpu/drm/radeon/r600_cp.c
index d9712a1023b1..fca96aa28818 100644
--- a/drivers/gpu/drm/radeon/r600_cp.c
+++ b/drivers/gpu/drm/radeon/r600_cp.c
@@ -1439,9 +1439,12 @@ static void r700_gfx_init(struct drm_device *dev,
1439 1439
1440 gb_tiling_config |= R600_BANK_SWAPS(1); 1440 gb_tiling_config |= R600_BANK_SWAPS(1);
1441 1441
1442 backend_map = r700_get_tile_pipe_to_backend_map(dev_priv->r600_max_tile_pipes, 1442 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV740)
1443 dev_priv->r600_max_backends, 1443 backend_map = 0x28;
1444 (0xff << dev_priv->r600_max_backends) & 0xff); 1444 else
1445 backend_map = r700_get_tile_pipe_to_backend_map(dev_priv->r600_max_tile_pipes,
1446 dev_priv->r600_max_backends,
1447 (0xff << dev_priv->r600_max_backends) & 0xff);
1445 gb_tiling_config |= R600_BACKEND_MAP(backend_map); 1448 gb_tiling_config |= R600_BACKEND_MAP(backend_map);
1446 1449
1447 cc_gc_shader_pipe_config = 1450 cc_gc_shader_pipe_config =
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 323fa6be5082..f4bb0b129a0f 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -556,9 +556,12 @@ static void rv770_gpu_init(struct radeon_device *rdev)
556 556
557 gb_tiling_config |= BANK_SWAPS(1); 557 gb_tiling_config |= BANK_SWAPS(1);
558 558
559 backend_map = r700_get_tile_pipe_to_backend_map(rdev->config.rv770.max_tile_pipes, 559 if (rdev->family == CHIP_RV740)
560 rdev->config.rv770.max_backends, 560 backend_map = 0x28;
561 (0xff << rdev->config.rv770.max_backends) & 0xff); 561 else
562 backend_map = r700_get_tile_pipe_to_backend_map(rdev->config.rv770.max_tile_pipes,
563 rdev->config.rv770.max_backends,
564 (0xff << rdev->config.rv770.max_backends) & 0xff);
562 gb_tiling_config |= BACKEND_MAP(backend_map); 565 gb_tiling_config |= BACKEND_MAP(backend_map);
563 566
564 cc_gc_shader_pipe_config = 567 cc_gc_shader_pipe_config =