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authorChris Wilson <chris@chris-wilson.co.uk>2011-02-05 05:15:37 -0500
committerChris Wilson <chris@chris-wilson.co.uk>2011-03-01 12:33:22 -0500
commit60c8bdf64a80ebb0132172ea97bd54d7c7d36611 (patch)
tree7db47ecf4df5cf64b59911f522fbdf41d65a9e1a /drivers/gpu
parent271d81b84171d84723357ae6d172ec16b0d8139c (diff)
Revert "drm/i915: Use PM QoS to prevent C-State starvation of gen3 GPU"
Using PM latency request turns out to be very fragile and only works for some systems, depending upon the ACPI implementation. However, I've stumbled across a promising bit in INSTPM: "Interrupt-Based AGPBUSY#". This reverts commit b0b544cd37c060e261afb2cf486296983fcb56da. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h5
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c33
2 files changed, 0 insertions, 38 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3d4fd0181f65..7a4725c240d3 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -35,7 +35,6 @@
35#include "intel_ringbuffer.h" 35#include "intel_ringbuffer.h"
36#include <linux/io-mapping.h> 36#include <linux/io-mapping.h>
37#include <linux/i2c.h> 37#include <linux/i2c.h>
38#include <linux/pm_qos_params.h>
39#include <drm/intel-gtt.h> 38#include <drm/intel-gtt.h>
40 39
41/* General customization: 40/* General customization:
@@ -309,10 +308,6 @@ typedef struct drm_i915_private {
309 int vblank_pipe; 308 int vblank_pipe;
310 int num_pipe; 309 int num_pipe;
311 310
312 atomic_t vblank_enabled;
313 struct pm_qos_request_list vblank_pm_qos;
314 struct work_struct vblank_work;
315
316 /* For hangcheck timer */ 311 /* For hangcheck timer */
317#define DRM_I915_HANGCHECK_PERIOD 1500 /* in ms */ 312#define DRM_I915_HANGCHECK_PERIOD 1500 /* in ms */
318 struct timer_list hangcheck_timer; 313 struct timer_list hangcheck_timer;
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7f1362d7d1e4..39d7cd3bcfc7 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1332,22 +1332,6 @@ int i915_irq_wait(struct drm_device *dev, void *data,
1332 return i915_wait_irq(dev, irqwait->irq_seq); 1332 return i915_wait_irq(dev, irqwait->irq_seq);
1333} 1333}
1334 1334
1335static void i915_vblank_work_func(struct work_struct *work)
1336{
1337 drm_i915_private_t *dev_priv =
1338 container_of(work, drm_i915_private_t, vblank_work);
1339
1340 if (atomic_read(&dev_priv->vblank_enabled)) {
1341 if (!dev_priv->vblank_pm_qos.pm_qos_class)
1342 pm_qos_add_request(&dev_priv->vblank_pm_qos,
1343 PM_QOS_CPU_DMA_LATENCY,
1344 15); //>=20 won't work
1345 } else {
1346 if (dev_priv->vblank_pm_qos.pm_qos_class)
1347 pm_qos_remove_request(&dev_priv->vblank_pm_qos);
1348 }
1349}
1350
1351/* Called from drm generic code, passed 'crtc' which 1335/* Called from drm generic code, passed 'crtc' which
1352 * we use as a pipe index 1336 * we use as a pipe index
1353 */ 1337 */
@@ -1370,16 +1354,6 @@ int i915_enable_vblank(struct drm_device *dev, int pipe)
1370 i915_enable_pipestat(dev_priv, pipe, 1354 i915_enable_pipestat(dev_priv, pipe,
1371 PIPE_VBLANK_INTERRUPT_ENABLE); 1355 PIPE_VBLANK_INTERRUPT_ENABLE);
1372 spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); 1356 spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
1373
1374 /* gen3 platforms have an issue with vsync interrupts not reaching
1375 * cpu during deep c-state sleep (>C1), so we need to install a
1376 * PM QoS handle to prevent C-state starvation of the GPU.
1377 */
1378 if (dev_priv->info->gen == 3 && !dev_priv->info->is_g33) {
1379 atomic_inc(&dev_priv->vblank_enabled);
1380 queue_work(dev_priv->wq, &dev_priv->vblank_work);
1381 }
1382
1383 return 0; 1357 return 0;
1384} 1358}
1385 1359
@@ -1391,11 +1365,6 @@ void i915_disable_vblank(struct drm_device *dev, int pipe)
1391 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; 1365 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1392 unsigned long irqflags; 1366 unsigned long irqflags;
1393 1367
1394 if (dev_priv->info->gen == 3 && !dev_priv->info->is_g33) {
1395 atomic_dec(&dev_priv->vblank_enabled);
1396 queue_work(dev_priv->wq, &dev_priv->vblank_work);
1397 }
1398
1399 spin_lock_irqsave(&dev_priv->irq_lock, irqflags); 1368 spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
1400 if (HAS_PCH_SPLIT(dev)) 1369 if (HAS_PCH_SPLIT(dev))
1401 ironlake_disable_display_irq(dev_priv, (pipe == 0) ? 1370 ironlake_disable_display_irq(dev_priv, (pipe == 0) ?
@@ -1678,11 +1647,9 @@ void i915_driver_irq_preinstall(struct drm_device * dev)
1678 int pipe; 1647 int pipe;
1679 1648
1680 atomic_set(&dev_priv->irq_received, 0); 1649 atomic_set(&dev_priv->irq_received, 0);
1681 atomic_set(&dev_priv->vblank_enabled, 0);
1682 1650
1683 INIT_WORK(&dev_priv->hotplug_work, i915_hotplug_work_func); 1651 INIT_WORK(&dev_priv->hotplug_work, i915_hotplug_work_func);
1684 INIT_WORK(&dev_priv->error_work, i915_error_work_func); 1652 INIT_WORK(&dev_priv->error_work, i915_error_work_func);
1685 INIT_WORK(&dev_priv->vblank_work, i915_vblank_work_func);
1686 1653
1687 if (HAS_PCH_SPLIT(dev)) { 1654 if (HAS_PCH_SPLIT(dev)) {
1688 ironlake_irq_preinstall(dev); 1655 ironlake_irq_preinstall(dev);