diff options
| author | Krzysztof Kozlowski <k.kozlowski.k@gmail.com> | 2015-05-06 20:04:44 -0400 |
|---|---|---|
| committer | Inki Dae <daeinki@gmail.com> | 2015-05-19 09:50:53 -0400 |
| commit | 48107d7b0db180155b19b2cf083517014289a079 (patch) | |
| tree | a3c67f630e239b09daf4269b0b5d5b16fdb44fb6 /drivers/gpu | |
| parent | d6b163026c5a6f2e49bc59261b69d44465ebddb4 (diff) | |
drm/exynos: Fix build breakage on !DRM_EXYNOS_FIMD
Disabling the CONFIG_DRM_EXYNOS_FIMD (e.g. by enabling of CONFIG_FB_S3C)
leads to build error:
drivers/built-in.o: In function `exynos_dp_dpms':
binder.c:(.text+0xd6a840): undefined reference to `fimd_dp_clock_enable'
binder.c:(.text+0xd6ab54): undefined reference to `fimd_dp_clock_enable'
Fix this by changing direct call to fimd_dp_clock_enable() into optional
call to exynos_drm_crtc_ops->clock_enable(). Only the DRM_EXYNOS_FIMD
implements this op.
Signed-off-by: Krzysztof Kozlowski <k.kozlowski.k@gmail.com>
Reviewed-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Tested-by: Javier Martinez Canillas <javier.martinez@collabora.co.uk>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/exynos/exynos_dp_core.c | 11 | ||||
| -rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_drv.h | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_fimd.c | 37 | ||||
| -rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_fimd.h | 15 |
4 files changed, 31 insertions, 37 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_dp_core.c b/drivers/gpu/drm/exynos/exynos_dp_core.c index 1dbfba58f909..441ef06b8894 100644 --- a/drivers/gpu/drm/exynos/exynos_dp_core.c +++ b/drivers/gpu/drm/exynos/exynos_dp_core.c | |||
| @@ -32,7 +32,6 @@ | |||
| 32 | #include <drm/bridge/ptn3460.h> | 32 | #include <drm/bridge/ptn3460.h> |
| 33 | 33 | ||
| 34 | #include "exynos_dp_core.h" | 34 | #include "exynos_dp_core.h" |
| 35 | #include "exynos_drm_fimd.h" | ||
| 36 | 35 | ||
| 37 | #define ctx_from_connector(c) container_of(c, struct exynos_dp_device, \ | 36 | #define ctx_from_connector(c) container_of(c, struct exynos_dp_device, \ |
| 38 | connector) | 37 | connector) |
| @@ -1066,6 +1065,8 @@ static void exynos_dp_phy_exit(struct exynos_dp_device *dp) | |||
| 1066 | 1065 | ||
| 1067 | static void exynos_dp_poweron(struct exynos_dp_device *dp) | 1066 | static void exynos_dp_poweron(struct exynos_dp_device *dp) |
| 1068 | { | 1067 | { |
| 1068 | struct exynos_drm_crtc *crtc = dp_to_crtc(dp); | ||
| 1069 | |||
| 1069 | if (dp->dpms_mode == DRM_MODE_DPMS_ON) | 1070 | if (dp->dpms_mode == DRM_MODE_DPMS_ON) |
| 1070 | return; | 1071 | return; |
| 1071 | 1072 | ||
| @@ -1076,7 +1077,8 @@ static void exynos_dp_poweron(struct exynos_dp_device *dp) | |||
| 1076 | } | 1077 | } |
| 1077 | } | 1078 | } |
| 1078 | 1079 | ||
| 1079 | fimd_dp_clock_enable(dp_to_crtc(dp), true); | 1080 | if (crtc->ops->clock_enable) |
| 1081 | crtc->ops->clock_enable(dp_to_crtc(dp), true); | ||
| 1080 | 1082 | ||
| 1081 | clk_prepare_enable(dp->clock); | 1083 | clk_prepare_enable(dp->clock); |
| 1082 | exynos_dp_phy_init(dp); | 1084 | exynos_dp_phy_init(dp); |
| @@ -1087,6 +1089,8 @@ static void exynos_dp_poweron(struct exynos_dp_device *dp) | |||
| 1087 | 1089 | ||
| 1088 | static void exynos_dp_poweroff(struct exynos_dp_device *dp) | 1090 | static void exynos_dp_poweroff(struct exynos_dp_device *dp) |
| 1089 | { | 1091 | { |
| 1092 | struct exynos_drm_crtc *crtc = dp_to_crtc(dp); | ||
| 1093 | |||
| 1090 | if (dp->dpms_mode != DRM_MODE_DPMS_ON) | 1094 | if (dp->dpms_mode != DRM_MODE_DPMS_ON) |
| 1091 | return; | 1095 | return; |
| 1092 | 1096 | ||
| @@ -1102,7 +1106,8 @@ static void exynos_dp_poweroff(struct exynos_dp_device *dp) | |||
| 1102 | exynos_dp_phy_exit(dp); | 1106 | exynos_dp_phy_exit(dp); |
| 1103 | clk_disable_unprepare(dp->clock); | 1107 | clk_disable_unprepare(dp->clock); |
| 1104 | 1108 | ||
| 1105 | fimd_dp_clock_enable(dp_to_crtc(dp), false); | 1109 | if (crtc->ops->clock_enable) |
| 1110 | crtc->ops->clock_enable(dp_to_crtc(dp), false); | ||
| 1106 | 1111 | ||
| 1107 | if (dp->panel) { | 1112 | if (dp->panel) { |
| 1108 | if (drm_panel_unprepare(dp->panel)) | 1113 | if (drm_panel_unprepare(dp->panel)) |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h index e12ecb5d5d9a..44f128a03aea 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_drv.h +++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h | |||
| @@ -181,6 +181,10 @@ struct exynos_drm_display { | |||
| 181 | * @win_disable: disable hardware specific overlay. | 181 | * @win_disable: disable hardware specific overlay. |
| 182 | * @te_handler: trigger to transfer video image at the tearing effect | 182 | * @te_handler: trigger to transfer video image at the tearing effect |
| 183 | * synchronization signal if there is a page flip request. | 183 | * synchronization signal if there is a page flip request. |
| 184 | * @clock_enable: optional function enabling/disabling display domain clock, | ||
| 185 | * called from exynos-dp driver before powering up (with | ||
| 186 | * 'enable' argument as true) and after powering down (with | ||
| 187 | * 'enable' as false). | ||
| 184 | */ | 188 | */ |
| 185 | struct exynos_drm_crtc; | 189 | struct exynos_drm_crtc; |
| 186 | struct exynos_drm_crtc_ops { | 190 | struct exynos_drm_crtc_ops { |
| @@ -195,6 +199,7 @@ struct exynos_drm_crtc_ops { | |||
| 195 | void (*win_commit)(struct exynos_drm_crtc *crtc, unsigned int zpos); | 199 | void (*win_commit)(struct exynos_drm_crtc *crtc, unsigned int zpos); |
| 196 | void (*win_disable)(struct exynos_drm_crtc *crtc, unsigned int zpos); | 200 | void (*win_disable)(struct exynos_drm_crtc *crtc, unsigned int zpos); |
| 197 | void (*te_handler)(struct exynos_drm_crtc *crtc); | 201 | void (*te_handler)(struct exynos_drm_crtc *crtc); |
| 202 | void (*clock_enable)(struct exynos_drm_crtc *crtc, bool enable); | ||
| 198 | }; | 203 | }; |
| 199 | 204 | ||
| 200 | /* | 205 | /* |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c index 9819fa6a9e2a..2fb95ccb5841 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c | |||
| @@ -33,7 +33,6 @@ | |||
| 33 | #include "exynos_drm_crtc.h" | 33 | #include "exynos_drm_crtc.h" |
| 34 | #include "exynos_drm_plane.h" | 34 | #include "exynos_drm_plane.h" |
| 35 | #include "exynos_drm_iommu.h" | 35 | #include "exynos_drm_iommu.h" |
| 36 | #include "exynos_drm_fimd.h" | ||
| 37 | 36 | ||
| 38 | /* | 37 | /* |
| 39 | * FIMD stands for Fully Interactive Mobile Display and | 38 | * FIMD stands for Fully Interactive Mobile Display and |
| @@ -946,6 +945,23 @@ static void fimd_te_handler(struct exynos_drm_crtc *crtc) | |||
| 946 | drm_handle_vblank(ctx->drm_dev, ctx->pipe); | 945 | drm_handle_vblank(ctx->drm_dev, ctx->pipe); |
| 947 | } | 946 | } |
| 948 | 947 | ||
| 948 | static void fimd_dp_clock_enable(struct exynos_drm_crtc *crtc, bool enable) | ||
| 949 | { | ||
| 950 | struct fimd_context *ctx = crtc->ctx; | ||
| 951 | u32 val; | ||
| 952 | |||
| 953 | /* | ||
| 954 | * Only Exynos 5250, 5260, 5410 and 542x requires enabling DP/MIE | ||
| 955 | * clock. On these SoCs the bootloader may enable it but any | ||
| 956 | * power domain off/on will reset it to disable state. | ||
| 957 | */ | ||
| 958 | if (ctx->driver_data != &exynos5_fimd_driver_data) | ||
| 959 | return; | ||
| 960 | |||
| 961 | val = enable ? DP_MIE_CLK_DP_ENABLE : DP_MIE_CLK_DISABLE; | ||
| 962 | writel(DP_MIE_CLK_DP_ENABLE, ctx->regs + DP_MIE_CLKCON); | ||
| 963 | } | ||
| 964 | |||
| 949 | static struct exynos_drm_crtc_ops fimd_crtc_ops = { | 965 | static struct exynos_drm_crtc_ops fimd_crtc_ops = { |
| 950 | .dpms = fimd_dpms, | 966 | .dpms = fimd_dpms, |
| 951 | .mode_fixup = fimd_mode_fixup, | 967 | .mode_fixup = fimd_mode_fixup, |
| @@ -956,6 +972,7 @@ static struct exynos_drm_crtc_ops fimd_crtc_ops = { | |||
| 956 | .win_commit = fimd_win_commit, | 972 | .win_commit = fimd_win_commit, |
| 957 | .win_disable = fimd_win_disable, | 973 | .win_disable = fimd_win_disable, |
| 958 | .te_handler = fimd_te_handler, | 974 | .te_handler = fimd_te_handler, |
| 975 | .clock_enable = fimd_dp_clock_enable, | ||
| 959 | }; | 976 | }; |
| 960 | 977 | ||
| 961 | static irqreturn_t fimd_irq_handler(int irq, void *dev_id) | 978 | static irqreturn_t fimd_irq_handler(int irq, void *dev_id) |
| @@ -1192,24 +1209,6 @@ static int fimd_remove(struct platform_device *pdev) | |||
| 1192 | return 0; | 1209 | return 0; |
| 1193 | } | 1210 | } |
| 1194 | 1211 | ||
| 1195 | void fimd_dp_clock_enable(struct exynos_drm_crtc *crtc, bool enable) | ||
| 1196 | { | ||
| 1197 | struct fimd_context *ctx = crtc->ctx; | ||
| 1198 | u32 val; | ||
| 1199 | |||
| 1200 | /* | ||
| 1201 | * Only Exynos 5250, 5260, 5410 and 542x requires enabling DP/MIE | ||
| 1202 | * clock. On these SoCs the bootloader may enable it but any | ||
| 1203 | * power domain off/on will reset it to disable state. | ||
| 1204 | */ | ||
| 1205 | if (ctx->driver_data != &exynos5_fimd_driver_data) | ||
| 1206 | return; | ||
| 1207 | |||
| 1208 | val = enable ? DP_MIE_CLK_DP_ENABLE : DP_MIE_CLK_DISABLE; | ||
| 1209 | writel(DP_MIE_CLK_DP_ENABLE, ctx->regs + DP_MIE_CLKCON); | ||
| 1210 | } | ||
| 1211 | EXPORT_SYMBOL_GPL(fimd_dp_clock_enable); | ||
| 1212 | |||
| 1213 | struct platform_driver fimd_driver = { | 1212 | struct platform_driver fimd_driver = { |
| 1214 | .probe = fimd_probe, | 1213 | .probe = fimd_probe, |
| 1215 | .remove = fimd_remove, | 1214 | .remove = fimd_remove, |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.h b/drivers/gpu/drm/exynos/exynos_drm_fimd.h deleted file mode 100644 index b4fcaa568456..000000000000 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.h +++ /dev/null | |||
| @@ -1,15 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Copyright (c) 2015 Samsung Electronics Co., Ltd. | ||
| 3 | * | ||
| 4 | * This program is free software; you can redistribute it and/or modify it | ||
| 5 | * under the terms of the GNU General Public License as published by the | ||
| 6 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 7 | * option) any later version. | ||
| 8 | */ | ||
| 9 | |||
| 10 | #ifndef _EXYNOS_DRM_FIMD_H_ | ||
| 11 | #define _EXYNOS_DRM_FIMD_H_ | ||
| 12 | |||
| 13 | extern void fimd_dp_clock_enable(struct exynos_drm_crtc *crtc, bool enable); | ||
| 14 | |||
| 15 | #endif /* _EXYNOS_DRM_FIMD_H_ */ | ||
