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authorBen Widawsky <benjamin.widawsky@intel.com>2013-11-08 00:40:51 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-11-14 03:33:11 -0500
commit3a2ffb65eec6dbda2fd8151894f51c18b42c8d41 (patch)
treee8392e29bc7412f3adfbb34416d9eeebb14263c7 /drivers/gpu
parenteb0d4b75d506050cb369df467b93b92360f5acaf (diff)
drm/i915/bdw: Limit GTT to 2GB
Because of the way in which we're allocating the pages for the Aliasing PPGTT, we cannot actually successfully alloc enough space for anything greater than 2GB. Instead of a quick hack to fix this, we should defer until we have the real solution in place (allocating much less contiguous space). This wasn't found sooner because we didn't not have any systems supporting more than a 2GB GTT. Signed-off-by: Ben Widawsky <ben@bwidawsk.net> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/i915_gem_gtt.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 5a3cc3189f1f..f69bdc741b80 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1239,6 +1239,11 @@ static inline unsigned int gen8_get_total_gtt_size(u16 bdw_gmch_ctl)
1239 bdw_gmch_ctl &= BDW_GMCH_GGMS_MASK; 1239 bdw_gmch_ctl &= BDW_GMCH_GGMS_MASK;
1240 if (bdw_gmch_ctl) 1240 if (bdw_gmch_ctl)
1241 bdw_gmch_ctl = 1 << bdw_gmch_ctl; 1241 bdw_gmch_ctl = 1 << bdw_gmch_ctl;
1242 if (bdw_gmch_ctl > 4) {
1243 WARN_ON(!i915_preliminary_hw_support);
1244 return 4<<20;
1245 }
1246
1242 return bdw_gmch_ctl << 20; 1247 return bdw_gmch_ctl << 20;
1243} 1248}
1244 1249