diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2013-11-13 17:31:26 -0500 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2013-11-13 23:57:02 -0500 |
commit | 35c336707f51f6336c9cb8a60b6f1aa5a3099ad7 (patch) | |
tree | 5739c0814cb5f96352b3243a339aff0a4abf4c73 /drivers/gpu | |
parent | 09dacc7bb0c2f32427d926844fca7d5fecec005c (diff) |
drm/nouveau/pwr: fix missing mutex unlock in a failure path
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/pwr/base.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/nouveau/core/subdev/pwr/base.c b/drivers/gpu/drm/nouveau/core/subdev/pwr/base.c index 9908f1f05a00..d4fd3bc9c66f 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/pwr/base.c +++ b/drivers/gpu/drm/nouveau/core/subdev/pwr/base.c | |||
@@ -32,6 +32,11 @@ nouveau_pwr_send(struct nouveau_pwr *ppwr, u32 reply[2], | |||
32 | struct nouveau_subdev *subdev = nv_subdev(ppwr); | 32 | struct nouveau_subdev *subdev = nv_subdev(ppwr); |
33 | u32 addr; | 33 | u32 addr; |
34 | 34 | ||
35 | /* wait for a free slot in the fifo */ | ||
36 | addr = nv_rd32(ppwr, 0x10a4a0); | ||
37 | if (!nv_wait_ne(ppwr, 0x10a4b0, 0xffffffff, addr ^ 8)) | ||
38 | return -EBUSY; | ||
39 | |||
35 | /* we currently only support a single process at a time waiting | 40 | /* we currently only support a single process at a time waiting |
36 | * on a synchronous reply, take the PPWR mutex and tell the | 41 | * on a synchronous reply, take the PPWR mutex and tell the |
37 | * receive handler what we're waiting for | 42 | * receive handler what we're waiting for |
@@ -42,11 +47,6 @@ nouveau_pwr_send(struct nouveau_pwr *ppwr, u32 reply[2], | |||
42 | ppwr->recv.process = process; | 47 | ppwr->recv.process = process; |
43 | } | 48 | } |
44 | 49 | ||
45 | /* wait for a free slot in the fifo */ | ||
46 | addr = nv_rd32(ppwr, 0x10a4a0); | ||
47 | if (!nv_wait_ne(ppwr, 0x10a4b0, 0xffffffff, addr ^ 8)) | ||
48 | return -EBUSY; | ||
49 | |||
50 | /* acquire data segment access */ | 50 | /* acquire data segment access */ |
51 | do { | 51 | do { |
52 | nv_wr32(ppwr, 0x10a580, 0x00000001); | 52 | nv_wr32(ppwr, 0x10a580, 0x00000001); |