diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2014-03-18 12:56:29 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2014-03-26 00:08:19 -0400 |
commit | 3219adc29ccb1706de4f1453d0386c5a2487ab14 (patch) | |
tree | 4aec385652f284f90bcaf7e8b4f9d3e1928ae7e8 /drivers/gpu | |
parent | 0a8649f1c607d444b658061151ae5cdf648adcf2 (diff) |
drm/nouveau/devinit: add interface to check if a mmio access by scripts is ok
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu')
4 files changed, 11 insertions, 3 deletions
diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/devinit.h b/drivers/gpu/drm/nouveau/core/include/subdev/devinit.h index 413bc54071c8..e292271a84e4 100644 --- a/drivers/gpu/drm/nouveau/core/include/subdev/devinit.h +++ b/drivers/gpu/drm/nouveau/core/include/subdev/devinit.h | |||
@@ -9,6 +9,7 @@ struct nouveau_devinit { | |||
9 | bool post; | 9 | bool post; |
10 | void (*meminit)(struct nouveau_devinit *); | 10 | void (*meminit)(struct nouveau_devinit *); |
11 | int (*pll_set)(struct nouveau_devinit *, u32 type, u32 freq); | 11 | int (*pll_set)(struct nouveau_devinit *, u32 type, u32 freq); |
12 | u32 (*mmio)(struct nouveau_devinit *, u32 addr); | ||
12 | }; | 13 | }; |
13 | 14 | ||
14 | static inline struct nouveau_devinit * | 15 | static inline struct nouveau_devinit * |
diff --git a/drivers/gpu/drm/nouveau/core/subdev/bios/init.c b/drivers/gpu/drm/nouveau/core/subdev/bios/init.c index a29c18617c57..acaeaf79e3f0 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/bios/init.c +++ b/drivers/gpu/drm/nouveau/core/subdev/bios/init.c | |||
@@ -118,6 +118,8 @@ init_conn(struct nvbios_init *init) | |||
118 | static inline u32 | 118 | static inline u32 |
119 | init_nvreg(struct nvbios_init *init, u32 reg) | 119 | init_nvreg(struct nvbios_init *init, u32 reg) |
120 | { | 120 | { |
121 | struct nouveau_devinit *devinit = nouveau_devinit(init->bios); | ||
122 | |||
121 | /* C51 (at least) sometimes has the lower bits set which the VBIOS | 123 | /* C51 (at least) sometimes has the lower bits set which the VBIOS |
122 | * interprets to mean that access needs to go through certain IO | 124 | * interprets to mean that access needs to go through certain IO |
123 | * ports instead. The NVIDIA binary driver has been seen to access | 125 | * ports instead. The NVIDIA binary driver has been seen to access |
@@ -147,6 +149,9 @@ init_nvreg(struct nvbios_init *init, u32 reg) | |||
147 | 149 | ||
148 | if (reg & ~0x00fffffc) | 150 | if (reg & ~0x00fffffc) |
149 | warn("unknown bits in register 0x%08x\n", reg); | 151 | warn("unknown bits in register 0x%08x\n", reg); |
152 | |||
153 | if (devinit->mmio) | ||
154 | reg = devinit->mmio(devinit, reg); | ||
150 | return reg; | 155 | return reg; |
151 | } | 156 | } |
152 | 157 | ||
@@ -154,7 +159,7 @@ static u32 | |||
154 | init_rd32(struct nvbios_init *init, u32 reg) | 159 | init_rd32(struct nvbios_init *init, u32 reg) |
155 | { | 160 | { |
156 | reg = init_nvreg(init, reg); | 161 | reg = init_nvreg(init, reg); |
157 | if (init_exec(init)) | 162 | if (reg != ~0 && init_exec(init)) |
158 | return nv_rd32(init->subdev, reg); | 163 | return nv_rd32(init->subdev, reg); |
159 | return 0x00000000; | 164 | return 0x00000000; |
160 | } | 165 | } |
@@ -163,7 +168,7 @@ static void | |||
163 | init_wr32(struct nvbios_init *init, u32 reg, u32 val) | 168 | init_wr32(struct nvbios_init *init, u32 reg, u32 val) |
164 | { | 169 | { |
165 | reg = init_nvreg(init, reg); | 170 | reg = init_nvreg(init, reg); |
166 | if (init_exec(init)) | 171 | if (reg != ~0 && init_exec(init)) |
167 | nv_wr32(init->subdev, reg, val); | 172 | nv_wr32(init->subdev, reg, val); |
168 | } | 173 | } |
169 | 174 | ||
@@ -171,7 +176,7 @@ static u32 | |||
171 | init_mask(struct nvbios_init *init, u32 reg, u32 mask, u32 val) | 176 | init_mask(struct nvbios_init *init, u32 reg, u32 mask, u32 val) |
172 | { | 177 | { |
173 | reg = init_nvreg(init, reg); | 178 | reg = init_nvreg(init, reg); |
174 | if (init_exec(init)) { | 179 | if (reg != ~0 && init_exec(init)) { |
175 | u32 tmp = nv_rd32(init->subdev, reg); | 180 | u32 tmp = nv_rd32(init->subdev, reg); |
176 | nv_wr32(init->subdev, reg, (tmp & ~mask) | val); | 181 | nv_wr32(init->subdev, reg, (tmp & ~mask) | val); |
177 | return tmp; | 182 | return tmp; |
diff --git a/drivers/gpu/drm/nouveau/core/subdev/devinit/base.c b/drivers/gpu/drm/nouveau/core/subdev/devinit/base.c index 8fa34e8152c2..239acfe876c3 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/devinit/base.c +++ b/drivers/gpu/drm/nouveau/core/subdev/devinit/base.c | |||
@@ -96,5 +96,6 @@ nouveau_devinit_create_(struct nouveau_object *parent, | |||
96 | devinit->post = nouveau_boolopt(device->cfgopt, "NvForcePost", false); | 96 | devinit->post = nouveau_boolopt(device->cfgopt, "NvForcePost", false); |
97 | devinit->meminit = impl->meminit; | 97 | devinit->meminit = impl->meminit; |
98 | devinit->pll_set = impl->pll_set; | 98 | devinit->pll_set = impl->pll_set; |
99 | devinit->mmio = impl->mmio; | ||
99 | return 0; | 100 | return 0; |
100 | } | 101 | } |
diff --git a/drivers/gpu/drm/nouveau/core/subdev/devinit/priv.h b/drivers/gpu/drm/nouveau/core/subdev/devinit/priv.h index 822a2fbf44a5..f0e8683ad840 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/devinit/priv.h +++ b/drivers/gpu/drm/nouveau/core/subdev/devinit/priv.h | |||
@@ -11,6 +11,7 @@ struct nouveau_devinit_impl { | |||
11 | void (*meminit)(struct nouveau_devinit *); | 11 | void (*meminit)(struct nouveau_devinit *); |
12 | int (*pll_set)(struct nouveau_devinit *, u32 type, u32 freq); | 12 | int (*pll_set)(struct nouveau_devinit *, u32 type, u32 freq); |
13 | u64 (*disable)(struct nouveau_devinit *); | 13 | u64 (*disable)(struct nouveau_devinit *); |
14 | u32 (*mmio)(struct nouveau_devinit *, u32); | ||
14 | }; | 15 | }; |
15 | 16 | ||
16 | #define nouveau_devinit_create(p,e,o,d) \ | 17 | #define nouveau_devinit_create(p,e,o,d) \ |