diff options
| author | Jerome Glisse <jglisse@redhat.com> | 2009-12-07 09:52:58 -0500 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2009-12-10 00:09:02 -0500 |
| commit | 312ea8da049a1830aa50c6e00002e50e30df476e (patch) | |
| tree | 4fa21909c2fd227cd6491a2729aa5dd17ac1295a /drivers/gpu | |
| parent | ca262a9998d46196750bb19a9dc4bd465b170ff7 (diff) | |
drm/radeon/kms: Convert radeon to new TTM validation API (V2)
This convert radeon to use new TTM validation API, it doesn't
really take advantage of it beside in the eviction case.
Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu')
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon.h | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_object.c | 54 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_ttm.c | 61 |
3 files changed, 67 insertions, 51 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index a15cf9ceb9a7..5941e7d2d7ff 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
| @@ -208,6 +208,8 @@ struct radeon_bo { | |||
| 208 | /* Protected by gem.mutex */ | 208 | /* Protected by gem.mutex */ |
| 209 | struct list_head list; | 209 | struct list_head list; |
| 210 | /* Protected by tbo.reserved */ | 210 | /* Protected by tbo.reserved */ |
| 211 | u32 placements[3]; | ||
| 212 | struct ttm_placement placement; | ||
| 211 | struct ttm_buffer_object tbo; | 213 | struct ttm_buffer_object tbo; |
| 212 | struct ttm_bo_kmap_obj kmap; | 214 | struct ttm_bo_kmap_obj kmap; |
| 213 | unsigned pin_count; | 215 | unsigned pin_count; |
| @@ -1012,6 +1014,7 @@ extern void radeon_surface_init(struct radeon_device *rdev); | |||
| 1012 | extern int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data); | 1014 | extern int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data); |
| 1013 | extern void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); | 1015 | extern void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); |
| 1014 | extern void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); | 1016 | extern void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); |
| 1017 | extern void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain); | ||
| 1015 | 1018 | ||
| 1016 | /* r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280 */ | 1019 | /* r100,rv100,rs100,rv200,rs200,r200,rv250,rs300,rv280 */ |
| 1017 | struct r100_mc_save { | 1020 | struct r100_mc_save { |
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index bec494384825..d9b239bce12a 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c | |||
| @@ -75,6 +75,25 @@ static inline u32 radeon_ttm_flags_from_domain(u32 domain) | |||
| 75 | return flags; | 75 | return flags; |
| 76 | } | 76 | } |
| 77 | 77 | ||
| 78 | void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain) | ||
| 79 | { | ||
| 80 | u32 c = 0; | ||
| 81 | |||
| 82 | rbo->placement.fpfn = 0; | ||
| 83 | rbo->placement.lpfn = 0; | ||
| 84 | rbo->placement.placement = rbo->placements; | ||
| 85 | rbo->placement.busy_placement = rbo->placements; | ||
| 86 | if (domain & RADEON_GEM_DOMAIN_VRAM) | ||
| 87 | rbo->placements[c++] = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED | | ||
| 88 | TTM_PL_FLAG_VRAM; | ||
| 89 | if (domain & RADEON_GEM_DOMAIN_GTT) | ||
| 90 | rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; | ||
| 91 | if (domain & RADEON_GEM_DOMAIN_CPU) | ||
| 92 | rbo->placements[c++] = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM; | ||
| 93 | rbo->placement.num_placement = c; | ||
| 94 | rbo->placement.num_busy_placement = c; | ||
| 95 | } | ||
| 96 | |||
| 78 | int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj, | 97 | int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj, |
| 79 | unsigned long size, bool kernel, u32 domain, | 98 | unsigned long size, bool kernel, u32 domain, |
| 80 | struct radeon_bo **bo_ptr) | 99 | struct radeon_bo **bo_ptr) |
| @@ -169,24 +188,20 @@ void radeon_bo_unref(struct radeon_bo **bo) | |||
| 169 | 188 | ||
| 170 | int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr) | 189 | int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr) |
| 171 | { | 190 | { |
| 172 | u32 flags; | 191 | int r, i; |
| 173 | u32 tmp; | ||
| 174 | int r; | ||
| 175 | 192 | ||
| 176 | flags = radeon_ttm_flags_from_domain(domain); | 193 | radeon_ttm_placement_from_domain(bo, domain); |
| 177 | if (bo->pin_count) { | 194 | if (bo->pin_count) { |
| 178 | bo->pin_count++; | 195 | bo->pin_count++; |
| 179 | if (gpu_addr) | 196 | if (gpu_addr) |
| 180 | *gpu_addr = radeon_bo_gpu_offset(bo); | 197 | *gpu_addr = radeon_bo_gpu_offset(bo); |
| 181 | return 0; | 198 | return 0; |
| 182 | } | 199 | } |
| 183 | tmp = bo->tbo.mem.placement; | 200 | radeon_ttm_placement_from_domain(bo, domain); |
| 184 | ttm_flag_masked(&tmp, flags, TTM_PL_MASK_MEM); | 201 | for (i = 0; i < bo->placement.num_placement; i++) |
| 185 | bo->tbo.proposed_placement = tmp | TTM_PL_FLAG_NO_EVICT | | 202 | bo->placements[i] |= TTM_PL_FLAG_NO_EVICT; |
| 186 | TTM_PL_MASK_CACHING; | ||
| 187 | retry: | 203 | retry: |
| 188 | r = ttm_buffer_object_validate(&bo->tbo, bo->tbo.proposed_placement, | 204 | r = ttm_buffer_object_validate(&bo->tbo, &bo->placement, true, false); |
| 189 | true, false); | ||
| 190 | if (likely(r == 0)) { | 205 | if (likely(r == 0)) { |
| 191 | bo->pin_count = 1; | 206 | bo->pin_count = 1; |
| 192 | if (gpu_addr != NULL) | 207 | if (gpu_addr != NULL) |
| @@ -202,7 +217,7 @@ retry: | |||
| 202 | 217 | ||
| 203 | int radeon_bo_unpin(struct radeon_bo *bo) | 218 | int radeon_bo_unpin(struct radeon_bo *bo) |
| 204 | { | 219 | { |
| 205 | int r; | 220 | int r, i; |
| 206 | 221 | ||
| 207 | if (!bo->pin_count) { | 222 | if (!bo->pin_count) { |
| 208 | dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo); | 223 | dev_warn(bo->rdev->dev, "%p unpin not necessary\n", bo); |
| @@ -211,11 +226,10 @@ int radeon_bo_unpin(struct radeon_bo *bo) | |||
| 211 | bo->pin_count--; | 226 | bo->pin_count--; |
| 212 | if (bo->pin_count) | 227 | if (bo->pin_count) |
| 213 | return 0; | 228 | return 0; |
| 214 | bo->tbo.proposed_placement = bo->tbo.mem.placement & | 229 | for (i = 0; i < bo->placement.num_placement; i++) |
| 215 | ~TTM_PL_FLAG_NO_EVICT; | 230 | bo->placements[i] &= ~TTM_PL_FLAG_NO_EVICT; |
| 216 | retry: | 231 | retry: |
| 217 | r = ttm_buffer_object_validate(&bo->tbo, bo->tbo.proposed_placement, | 232 | r = ttm_buffer_object_validate(&bo->tbo, &bo->placement, true, false); |
| 218 | true, false); | ||
| 219 | if (unlikely(r != 0)) { | 233 | if (unlikely(r != 0)) { |
| 220 | if (r == -ERESTART) | 234 | if (r == -ERESTART) |
| 221 | goto retry; | 235 | goto retry; |
| @@ -326,15 +340,15 @@ int radeon_bo_list_validate(struct list_head *head, void *fence) | |||
| 326 | bo = lobj->bo; | 340 | bo = lobj->bo; |
| 327 | if (!bo->pin_count) { | 341 | if (!bo->pin_count) { |
| 328 | if (lobj->wdomain) { | 342 | if (lobj->wdomain) { |
| 329 | bo->tbo.proposed_placement = | 343 | radeon_ttm_placement_from_domain(bo, |
| 330 | radeon_ttm_flags_from_domain(lobj->wdomain); | 344 | lobj->wdomain); |
| 331 | } else { | 345 | } else { |
| 332 | bo->tbo.proposed_placement = | 346 | radeon_ttm_placement_from_domain(bo, |
| 333 | radeon_ttm_flags_from_domain(lobj->rdomain); | 347 | lobj->rdomain); |
| 334 | } | 348 | } |
| 335 | retry: | 349 | retry: |
| 336 | r = ttm_buffer_object_validate(&bo->tbo, | 350 | r = ttm_buffer_object_validate(&bo->tbo, |
| 337 | bo->tbo.proposed_placement, | 351 | &bo->placement, |
| 338 | true, false); | 352 | true, false); |
| 339 | if (unlikely(r)) { | 353 | if (unlikely(r)) { |
| 340 | if (r == -ERESTART) | 354 | if (r == -ERESTART) |
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index bdb46c8cadd1..4ca7dfc44310 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c | |||
| @@ -197,15 +197,17 @@ static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type, | |||
| 197 | return 0; | 197 | return 0; |
| 198 | } | 198 | } |
| 199 | 199 | ||
| 200 | static uint32_t radeon_evict_flags(struct ttm_buffer_object *bo) | 200 | static void radeon_evict_flags(struct ttm_buffer_object *bo, |
| 201 | struct ttm_placement *placement) | ||
| 201 | { | 202 | { |
| 202 | uint32_t cur_placement = bo->mem.placement & ~TTM_PL_MASK_MEMTYPE; | 203 | struct radeon_bo *rbo = container_of(bo, struct radeon_bo, tbo); |
| 203 | |||
| 204 | switch (bo->mem.mem_type) { | 204 | switch (bo->mem.mem_type) { |
| 205 | case TTM_PL_VRAM: | ||
| 206 | radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT); | ||
| 207 | break; | ||
| 208 | case TTM_PL_TT: | ||
| 205 | default: | 209 | default: |
| 206 | return (cur_placement & ~TTM_PL_MASK_CACHING) | | 210 | radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU); |
| 207 | TTM_PL_FLAG_SYSTEM | | ||
| 208 | TTM_PL_FLAG_CACHED; | ||
| 209 | } | 211 | } |
| 210 | } | 212 | } |
| 211 | 213 | ||
| @@ -283,14 +285,21 @@ static int radeon_move_vram_ram(struct ttm_buffer_object *bo, | |||
| 283 | struct radeon_device *rdev; | 285 | struct radeon_device *rdev; |
| 284 | struct ttm_mem_reg *old_mem = &bo->mem; | 286 | struct ttm_mem_reg *old_mem = &bo->mem; |
| 285 | struct ttm_mem_reg tmp_mem; | 287 | struct ttm_mem_reg tmp_mem; |
| 286 | uint32_t proposed_placement; | 288 | u32 placements; |
| 289 | struct ttm_placement placement; | ||
| 287 | int r; | 290 | int r; |
| 288 | 291 | ||
| 289 | rdev = radeon_get_rdev(bo->bdev); | 292 | rdev = radeon_get_rdev(bo->bdev); |
| 290 | tmp_mem = *new_mem; | 293 | tmp_mem = *new_mem; |
| 291 | tmp_mem.mm_node = NULL; | 294 | tmp_mem.mm_node = NULL; |
| 292 | proposed_placement = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING; | 295 | placement.fpfn = 0; |
| 293 | r = ttm_bo_mem_space(bo, proposed_placement, &tmp_mem, | 296 | placement.lpfn = 0; |
| 297 | placement.num_placement = 1; | ||
| 298 | placement.placement = &placements; | ||
| 299 | placement.num_busy_placement = 1; | ||
| 300 | placement.busy_placement = &placements; | ||
| 301 | placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; | ||
| 302 | r = ttm_bo_mem_space(bo, &placement, &tmp_mem, | ||
| 294 | interruptible, no_wait); | 303 | interruptible, no_wait); |
| 295 | if (unlikely(r)) { | 304 | if (unlikely(r)) { |
| 296 | return r; | 305 | return r; |
| @@ -329,15 +338,21 @@ static int radeon_move_ram_vram(struct ttm_buffer_object *bo, | |||
| 329 | struct radeon_device *rdev; | 338 | struct radeon_device *rdev; |
| 330 | struct ttm_mem_reg *old_mem = &bo->mem; | 339 | struct ttm_mem_reg *old_mem = &bo->mem; |
| 331 | struct ttm_mem_reg tmp_mem; | 340 | struct ttm_mem_reg tmp_mem; |
| 332 | uint32_t proposed_flags; | 341 | struct ttm_placement placement; |
| 342 | u32 placements; | ||
| 333 | int r; | 343 | int r; |
| 334 | 344 | ||
| 335 | rdev = radeon_get_rdev(bo->bdev); | 345 | rdev = radeon_get_rdev(bo->bdev); |
| 336 | tmp_mem = *new_mem; | 346 | tmp_mem = *new_mem; |
| 337 | tmp_mem.mm_node = NULL; | 347 | tmp_mem.mm_node = NULL; |
| 338 | proposed_flags = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING; | 348 | placement.fpfn = 0; |
| 339 | r = ttm_bo_mem_space(bo, proposed_flags, &tmp_mem, | 349 | placement.lpfn = 0; |
| 340 | interruptible, no_wait); | 350 | placement.num_placement = 1; |
| 351 | placement.placement = &placements; | ||
| 352 | placement.num_busy_placement = 1; | ||
| 353 | placement.busy_placement = &placements; | ||
| 354 | placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT; | ||
| 355 | r = ttm_bo_mem_space(bo, &placement, &tmp_mem, interruptible, no_wait); | ||
| 341 | if (unlikely(r)) { | 356 | if (unlikely(r)) { |
| 342 | return r; | 357 | return r; |
| 343 | } | 358 | } |
| @@ -407,18 +422,6 @@ memcpy: | |||
| 407 | return r; | 422 | return r; |
| 408 | } | 423 | } |
| 409 | 424 | ||
| 410 | const uint32_t radeon_mem_prios[] = { | ||
| 411 | TTM_PL_VRAM, | ||
| 412 | TTM_PL_TT, | ||
| 413 | TTM_PL_SYSTEM, | ||
| 414 | }; | ||
| 415 | |||
| 416 | const uint32_t radeon_busy_prios[] = { | ||
| 417 | TTM_PL_TT, | ||
| 418 | TTM_PL_VRAM, | ||
| 419 | TTM_PL_SYSTEM, | ||
| 420 | }; | ||
| 421 | |||
| 422 | static int radeon_sync_obj_wait(void *sync_obj, void *sync_arg, | 425 | static int radeon_sync_obj_wait(void *sync_obj, void *sync_arg, |
| 423 | bool lazy, bool interruptible) | 426 | bool lazy, bool interruptible) |
| 424 | { | 427 | { |
| @@ -446,10 +449,6 @@ static bool radeon_sync_obj_signaled(void *sync_obj, void *sync_arg) | |||
| 446 | } | 449 | } |
| 447 | 450 | ||
| 448 | static struct ttm_bo_driver radeon_bo_driver = { | 451 | static struct ttm_bo_driver radeon_bo_driver = { |
| 449 | .mem_type_prio = radeon_mem_prios, | ||
| 450 | .mem_busy_prio = radeon_busy_prios, | ||
| 451 | .num_mem_type_prio = ARRAY_SIZE(radeon_mem_prios), | ||
| 452 | .num_mem_busy_prio = ARRAY_SIZE(radeon_busy_prios), | ||
| 453 | .create_ttm_backend_entry = &radeon_create_ttm_backend_entry, | 452 | .create_ttm_backend_entry = &radeon_create_ttm_backend_entry, |
| 454 | .invalidate_caches = &radeon_invalidate_caches, | 453 | .invalidate_caches = &radeon_invalidate_caches, |
| 455 | .init_mem_type = &radeon_init_mem_type, | 454 | .init_mem_type = &radeon_init_mem_type, |
| @@ -483,7 +482,7 @@ int radeon_ttm_init(struct radeon_device *rdev) | |||
| 483 | return r; | 482 | return r; |
| 484 | } | 483 | } |
| 485 | r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM, | 484 | r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM, |
| 486 | 0, rdev->mc.real_vram_size >> PAGE_SHIFT); | 485 | rdev->mc.real_vram_size >> PAGE_SHIFT); |
| 487 | if (r) { | 486 | if (r) { |
| 488 | DRM_ERROR("Failed initializing VRAM heap.\n"); | 487 | DRM_ERROR("Failed initializing VRAM heap.\n"); |
| 489 | return r; | 488 | return r; |
| @@ -506,7 +505,7 @@ int radeon_ttm_init(struct radeon_device *rdev) | |||
| 506 | DRM_INFO("radeon: %uM of VRAM memory ready\n", | 505 | DRM_INFO("radeon: %uM of VRAM memory ready\n", |
| 507 | (unsigned)rdev->mc.real_vram_size / (1024 * 1024)); | 506 | (unsigned)rdev->mc.real_vram_size / (1024 * 1024)); |
| 508 | r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT, | 507 | r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT, |
| 509 | 0, rdev->mc.gtt_size >> PAGE_SHIFT); | 508 | rdev->mc.gtt_size >> PAGE_SHIFT); |
| 510 | if (r) { | 509 | if (r) { |
| 511 | DRM_ERROR("Failed initializing GTT heap.\n"); | 510 | DRM_ERROR("Failed initializing GTT heap.\n"); |
| 512 | return r; | 511 | return r; |
