aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu
diff options
context:
space:
mode:
authorAlex Deucher <alexander.deucher@amd.com>2013-09-04 16:58:29 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-09-11 11:44:31 -0400
commit2b19d17fbd10edf4fbc809e40cf779dfbe14d396 (patch)
treeef0f61298c549ee36e9c2f5201bdd35d112c1326 /drivers/gpu
parent9a71677874d200865433647e9282fcf9fa6b05dd (diff)
drm/radeon: fix typo in PG flags
s/CG/PG/ in the GFX powergating flag name. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/radeon/cik.c6
-rw-r--r--drivers/gpu/drm/radeon/radeon.h2
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.c6
-rw-r--r--drivers/gpu/drm/radeon/si.c4
4 files changed, 9 insertions, 9 deletions
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index 6b6135a77462..adbdb6503b05 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -5558,7 +5558,7 @@ static void cik_enable_gfx_cgpg(struct radeon_device *rdev,
5558{ 5558{
5559 u32 data, orig; 5559 u32 data, orig;
5560 5560
5561 if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_CG)) { 5561 if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG)) {
5562 orig = data = RREG32(RLC_PG_CNTL); 5562 orig = data = RREG32(RLC_PG_CNTL);
5563 data |= GFX_PG_ENABLE; 5563 data |= GFX_PG_ENABLE;
5564 if (orig != data) 5564 if (orig != data)
@@ -5822,7 +5822,7 @@ static void cik_init_pg(struct radeon_device *rdev)
5822 if (rdev->pg_flags) { 5822 if (rdev->pg_flags) {
5823 cik_enable_sck_slowdown_on_pu(rdev, true); 5823 cik_enable_sck_slowdown_on_pu(rdev, true);
5824 cik_enable_sck_slowdown_on_pd(rdev, true); 5824 cik_enable_sck_slowdown_on_pd(rdev, true);
5825 if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_CG) { 5825 if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG) {
5826 cik_init_gfx_cgpg(rdev); 5826 cik_init_gfx_cgpg(rdev);
5827 cik_enable_cp_pg(rdev, true); 5827 cik_enable_cp_pg(rdev, true);
5828 cik_enable_gds_pg(rdev, true); 5828 cik_enable_gds_pg(rdev, true);
@@ -5836,7 +5836,7 @@ static void cik_fini_pg(struct radeon_device *rdev)
5836{ 5836{
5837 if (rdev->pg_flags) { 5837 if (rdev->pg_flags) {
5838 cik_update_gfx_pg(rdev, false); 5838 cik_update_gfx_pg(rdev, false);
5839 if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_CG) { 5839 if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG) {
5840 cik_enable_cp_pg(rdev, false); 5840 cik_enable_cp_pg(rdev, false);
5841 cik_enable_gds_pg(rdev, false); 5841 cik_enable_gds_pg(rdev, false);
5842 } 5842 }
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 1cfcb1b27aaa..b37f9859d5a5 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -181,7 +181,7 @@ extern int radeon_aspm;
181#define RADEON_CG_SUPPORT_HDP_MGCG (1 << 16) 181#define RADEON_CG_SUPPORT_HDP_MGCG (1 << 16)
182 182
183/* PG flags */ 183/* PG flags */
184#define RADEON_PG_SUPPORT_GFX_CG (1 << 0) 184#define RADEON_PG_SUPPORT_GFX_PG (1 << 0)
185#define RADEON_PG_SUPPORT_GFX_SMG (1 << 1) 185#define RADEON_PG_SUPPORT_GFX_SMG (1 << 1)
186#define RADEON_PG_SUPPORT_GFX_DMG (1 << 2) 186#define RADEON_PG_SUPPORT_GFX_DMG (1 << 2)
187#define RADEON_PG_SUPPORT_UVD (1 << 3) 187#define RADEON_PG_SUPPORT_UVD (1 << 3)
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index 40a9b4bc3291..04876e407b36 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -2391,7 +2391,7 @@ int radeon_asic_init(struct radeon_device *rdev)
2391 RADEON_CG_SUPPORT_HDP_LS | 2391 RADEON_CG_SUPPORT_HDP_LS |
2392 RADEON_CG_SUPPORT_HDP_MGCG; 2392 RADEON_CG_SUPPORT_HDP_MGCG;
2393 rdev->pg_flags = 0 | 2393 rdev->pg_flags = 0 |
2394 /*RADEON_PG_SUPPORT_GFX_CG | */ 2394 /*RADEON_PG_SUPPORT_GFX_PG | */
2395 RADEON_PG_SUPPORT_SDMA; 2395 RADEON_PG_SUPPORT_SDMA;
2396 break; 2396 break;
2397 case CHIP_OLAND: 2397 case CHIP_OLAND:
@@ -2480,7 +2480,7 @@ int radeon_asic_init(struct radeon_device *rdev)
2480 RADEON_CG_SUPPORT_HDP_LS | 2480 RADEON_CG_SUPPORT_HDP_LS |
2481 RADEON_CG_SUPPORT_HDP_MGCG; 2481 RADEON_CG_SUPPORT_HDP_MGCG;
2482 rdev->pg_flags = 0; 2482 rdev->pg_flags = 0;
2483 /*RADEON_PG_SUPPORT_GFX_CG | 2483 /*RADEON_PG_SUPPORT_GFX_PG |
2484 RADEON_PG_SUPPORT_GFX_SMG | 2484 RADEON_PG_SUPPORT_GFX_SMG |
2485 RADEON_PG_SUPPORT_GFX_DMG | 2485 RADEON_PG_SUPPORT_GFX_DMG |
2486 RADEON_PG_SUPPORT_UVD | 2486 RADEON_PG_SUPPORT_UVD |
@@ -2508,7 +2508,7 @@ int radeon_asic_init(struct radeon_device *rdev)
2508 RADEON_CG_SUPPORT_HDP_LS | 2508 RADEON_CG_SUPPORT_HDP_LS |
2509 RADEON_CG_SUPPORT_HDP_MGCG; 2509 RADEON_CG_SUPPORT_HDP_MGCG;
2510 rdev->pg_flags = 0; 2510 rdev->pg_flags = 0;
2511 /*RADEON_PG_SUPPORT_GFX_CG | 2511 /*RADEON_PG_SUPPORT_GFX_PG |
2512 RADEON_PG_SUPPORT_GFX_SMG | 2512 RADEON_PG_SUPPORT_GFX_SMG |
2513 RADEON_PG_SUPPORT_UVD | 2513 RADEON_PG_SUPPORT_UVD |
2514 RADEON_PG_SUPPORT_VCE | 2514 RADEON_PG_SUPPORT_VCE |
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 1328fe5a8001..c354c1094967 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -4894,7 +4894,7 @@ static void si_enable_gfx_cgpg(struct radeon_device *rdev,
4894{ 4894{
4895 u32 tmp; 4895 u32 tmp;
4896 4896
4897 if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_CG)) { 4897 if (enable && (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG)) {
4898 tmp = RLC_PUD(0x10) | RLC_PDD(0x10) | RLC_TTPD(0x10) | RLC_MSD(0x10); 4898 tmp = RLC_PUD(0x10) | RLC_PDD(0x10) | RLC_TTPD(0x10) | RLC_MSD(0x10);
4899 WREG32(RLC_TTOP_D, tmp); 4899 WREG32(RLC_TTOP_D, tmp);
4900 4900
@@ -5416,7 +5416,7 @@ static void si_init_pg(struct radeon_device *rdev)
5416 si_init_dma_pg(rdev); 5416 si_init_dma_pg(rdev);
5417 } 5417 }
5418 si_init_ao_cu_mask(rdev); 5418 si_init_ao_cu_mask(rdev);
5419 if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_CG) { 5419 if (rdev->pg_flags & RADEON_PG_SUPPORT_GFX_PG) {
5420 si_init_gfx_cgpg(rdev); 5420 si_init_gfx_cgpg(rdev);
5421 } 5421 }
5422 si_enable_dma_pg(rdev, true); 5422 si_enable_dma_pg(rdev, true);