diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2013-07-08 17:20:13 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2013-07-08 17:39:51 -0400 |
commit | 222dc9a072e27b5069a7c03738e360eafdc2fdf5 (patch) | |
tree | 3a9b51df251ea0150dd66f8adf2168ab385d3c04 /drivers/gpu | |
parent | 9b5de59629d2e58eab41e2f0e5cc60b3c395f1c3 (diff) |
drm/radeon/dpm: fix display_gap programming on rv7xx
Check the driver state rather than the register as the
crtc registers may not be enabled yet.
Should fix:
https://bugzilla.kernel.org/show_bug.cgi?id=60510
https://bugs.freedesktop.org/show_bug.cgi?id=66651
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/radeon/rv770_dpm.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/gpu/drm/radeon/rv770_dpm.c b/drivers/gpu/drm/radeon/rv770_dpm.c index c3025de4f4e2..4de50c811879 100644 --- a/drivers/gpu/drm/radeon/rv770_dpm.c +++ b/drivers/gpu/drm/radeon/rv770_dpm.c | |||
@@ -1341,10 +1341,10 @@ static void rv770_program_display_gap(struct radeon_device *rdev) | |||
1341 | u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL); | 1341 | u32 tmp = RREG32(CG_DISPLAY_GAP_CNTL); |
1342 | 1342 | ||
1343 | tmp &= ~(DISP1_GAP_MCHG_MASK | DISP2_GAP_MCHG_MASK); | 1343 | tmp &= ~(DISP1_GAP_MCHG_MASK | DISP2_GAP_MCHG_MASK); |
1344 | if (RREG32(AVIVO_D1CRTC_CONTROL) & AVIVO_CRTC_EN) { | 1344 | if (rdev->pm.dpm.new_active_crtcs & 1) { |
1345 | tmp |= DISP1_GAP_MCHG(R600_PM_DISPLAY_GAP_VBLANK); | 1345 | tmp |= DISP1_GAP_MCHG(R600_PM_DISPLAY_GAP_VBLANK); |
1346 | tmp |= DISP2_GAP_MCHG(R600_PM_DISPLAY_GAP_IGNORE); | 1346 | tmp |= DISP2_GAP_MCHG(R600_PM_DISPLAY_GAP_IGNORE); |
1347 | } else if (RREG32(AVIVO_D2CRTC_CONTROL) & AVIVO_CRTC_EN) { | 1347 | } else if (rdev->pm.dpm.new_active_crtcs & 2) { |
1348 | tmp |= DISP1_GAP_MCHG(R600_PM_DISPLAY_GAP_IGNORE); | 1348 | tmp |= DISP1_GAP_MCHG(R600_PM_DISPLAY_GAP_IGNORE); |
1349 | tmp |= DISP2_GAP_MCHG(R600_PM_DISPLAY_GAP_VBLANK); | 1349 | tmp |= DISP2_GAP_MCHG(R600_PM_DISPLAY_GAP_VBLANK); |
1350 | } else { | 1350 | } else { |