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authorBen Skeggs <bskeggs@redhat.com>2013-10-18 00:18:04 -0400
committerBen Skeggs <bskeggs@redhat.com>2013-11-08 00:39:50 -0500
commit1e9fc30e38bbedf5cbba9238393084c35e1df551 (patch)
tree497c545d8bd7f79bc282e4443e2c18ee39d13fcd /drivers/gpu
parent0fef9d8a59abcd699761cb054b6c37a2bea9e31a (diff)
drm/nouveau/fb: make external class definitions pointers
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/device/nv04.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/device/nv10.c16
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/device/nv20.c8
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/device/nv30.c10
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/device/nv40.c32
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/device/nv50.c28
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/device/nvc0.c18
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/device/nve0.c8
-rw-r--r--drivers/gpu/drm/nouveau/core/include/subdev/fb.h34
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/nv04.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/nv10.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/nv1a.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/nv20.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/nv25.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/nv30.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/nv35.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/nv36.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/nv40.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/nv41.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/nv44.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/nv46.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/nv47.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/nv49.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/nv4e.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c4
-rw-r--r--drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c4
26 files changed, 113 insertions, 113 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/device/nv04.c b/drivers/gpu/drm/nouveau/core/engine/device/nv04.c
index 524ddcb98f7f..971e852dd8a7 100644
--- a/drivers/gpu/drm/nouveau/core/engine/device/nv04.c
+++ b/drivers/gpu/drm/nouveau/core/engine/device/nv04.c
@@ -53,7 +53,7 @@ nv04_identify(struct nouveau_device *device)
53 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 53 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
54 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; 54 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass;
55 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 55 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
56 device->oclass[NVDEV_SUBDEV_FB ] = &nv04_fb_oclass; 56 device->oclass[NVDEV_SUBDEV_FB ] = nv04_fb_oclass;
57 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 57 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
58 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 58 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
59 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 59 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -71,7 +71,7 @@ nv04_identify(struct nouveau_device *device)
71 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 71 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
72 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; 72 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass;
73 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 73 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
74 device->oclass[NVDEV_SUBDEV_FB ] = &nv04_fb_oclass; 74 device->oclass[NVDEV_SUBDEV_FB ] = nv04_fb_oclass;
75 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 75 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
76 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 76 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
77 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 77 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
diff --git a/drivers/gpu/drm/nouveau/core/engine/device/nv10.c b/drivers/gpu/drm/nouveau/core/engine/device/nv10.c
index 65fac0175c49..1c4490c42450 100644
--- a/drivers/gpu/drm/nouveau/core/engine/device/nv10.c
+++ b/drivers/gpu/drm/nouveau/core/engine/device/nv10.c
@@ -55,7 +55,7 @@ nv10_identify(struct nouveau_device *device)
55 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 55 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
56 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; 56 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass;
57 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 57 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
58 device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass; 58 device->oclass[NVDEV_SUBDEV_FB ] = nv10_fb_oclass;
59 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 59 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
60 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 60 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
61 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 61 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -72,7 +72,7 @@ nv10_identify(struct nouveau_device *device)
72 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 72 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
73 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; 73 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass;
74 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 74 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
75 device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass; 75 device->oclass[NVDEV_SUBDEV_FB ] = nv10_fb_oclass;
76 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 76 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
77 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 77 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
78 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 78 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -91,7 +91,7 @@ nv10_identify(struct nouveau_device *device)
91 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 91 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
92 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; 92 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass;
93 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 93 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
94 device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass; 94 device->oclass[NVDEV_SUBDEV_FB ] = nv10_fb_oclass;
95 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 95 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
96 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 96 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
97 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 97 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -110,7 +110,7 @@ nv10_identify(struct nouveau_device *device)
110 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 110 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
111 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; 111 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass;
112 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 112 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
113 device->oclass[NVDEV_SUBDEV_FB ] = &nv1a_fb_oclass; 113 device->oclass[NVDEV_SUBDEV_FB ] = nv1a_fb_oclass;
114 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 114 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
115 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 115 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
116 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 116 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -129,7 +129,7 @@ nv10_identify(struct nouveau_device *device)
129 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 129 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
130 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; 130 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass;
131 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 131 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
132 device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass; 132 device->oclass[NVDEV_SUBDEV_FB ] = nv10_fb_oclass;
133 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 133 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
134 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 134 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
135 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 135 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -148,7 +148,7 @@ nv10_identify(struct nouveau_device *device)
148 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 148 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
149 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; 149 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass;
150 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 150 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
151 device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass; 151 device->oclass[NVDEV_SUBDEV_FB ] = nv10_fb_oclass;
152 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 152 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
153 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 153 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
154 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 154 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -167,7 +167,7 @@ nv10_identify(struct nouveau_device *device)
167 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 167 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
168 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; 168 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass;
169 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 169 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
170 device->oclass[NVDEV_SUBDEV_FB ] = &nv1a_fb_oclass; 170 device->oclass[NVDEV_SUBDEV_FB ] = nv1a_fb_oclass;
171 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 171 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
172 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 172 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
173 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 173 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -186,7 +186,7 @@ nv10_identify(struct nouveau_device *device)
186 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 186 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
187 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; 187 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass;
188 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 188 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
189 device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass; 189 device->oclass[NVDEV_SUBDEV_FB ] = nv10_fb_oclass;
190 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 190 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
191 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 191 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
192 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 192 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
diff --git a/drivers/gpu/drm/nouveau/core/engine/device/nv20.c b/drivers/gpu/drm/nouveau/core/engine/device/nv20.c
index 0268f7d313b7..298a3d3fb6ab 100644
--- a/drivers/gpu/drm/nouveau/core/engine/device/nv20.c
+++ b/drivers/gpu/drm/nouveau/core/engine/device/nv20.c
@@ -56,7 +56,7 @@ nv20_identify(struct nouveau_device *device)
56 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 56 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
57 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; 57 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass;
58 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 58 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
59 device->oclass[NVDEV_SUBDEV_FB ] = &nv20_fb_oclass; 59 device->oclass[NVDEV_SUBDEV_FB ] = nv20_fb_oclass;
60 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 60 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
61 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 61 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
62 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 62 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -75,7 +75,7 @@ nv20_identify(struct nouveau_device *device)
75 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 75 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
76 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; 76 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass;
77 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 77 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
78 device->oclass[NVDEV_SUBDEV_FB ] = &nv25_fb_oclass; 78 device->oclass[NVDEV_SUBDEV_FB ] = nv25_fb_oclass;
79 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 79 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
80 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 80 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
81 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 81 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -94,7 +94,7 @@ nv20_identify(struct nouveau_device *device)
94 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 94 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
95 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; 95 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass;
96 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 96 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
97 device->oclass[NVDEV_SUBDEV_FB ] = &nv25_fb_oclass; 97 device->oclass[NVDEV_SUBDEV_FB ] = nv25_fb_oclass;
98 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 98 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
99 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 99 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
100 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 100 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -113,7 +113,7 @@ nv20_identify(struct nouveau_device *device)
113 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 113 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
114 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; 114 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass;
115 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 115 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
116 device->oclass[NVDEV_SUBDEV_FB ] = &nv25_fb_oclass; 116 device->oclass[NVDEV_SUBDEV_FB ] = nv25_fb_oclass;
117 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 117 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
118 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 118 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
119 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 119 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
diff --git a/drivers/gpu/drm/nouveau/core/engine/device/nv30.c b/drivers/gpu/drm/nouveau/core/engine/device/nv30.c
index 9c0961048091..d2d7d934754a 100644
--- a/drivers/gpu/drm/nouveau/core/engine/device/nv30.c
+++ b/drivers/gpu/drm/nouveau/core/engine/device/nv30.c
@@ -56,7 +56,7 @@ nv30_identify(struct nouveau_device *device)
56 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 56 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
57 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; 57 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass;
58 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 58 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
59 device->oclass[NVDEV_SUBDEV_FB ] = &nv30_fb_oclass; 59 device->oclass[NVDEV_SUBDEV_FB ] = nv30_fb_oclass;
60 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 60 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
61 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 61 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
62 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 62 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -75,7 +75,7 @@ nv30_identify(struct nouveau_device *device)
75 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 75 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
76 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass; 76 device->oclass[NVDEV_SUBDEV_BUS ] = &nv04_bus_oclass;
77 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 77 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
78 device->oclass[NVDEV_SUBDEV_FB ] = &nv35_fb_oclass; 78 device->oclass[NVDEV_SUBDEV_FB ] = nv35_fb_oclass;
79 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 79 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
80 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 80 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
81 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 81 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -94,7 +94,7 @@ nv30_identify(struct nouveau_device *device)
94 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 94 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
95 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 95 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
96 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 96 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
97 device->oclass[NVDEV_SUBDEV_FB ] = &nv30_fb_oclass; 97 device->oclass[NVDEV_SUBDEV_FB ] = nv30_fb_oclass;
98 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 98 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
99 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 99 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
100 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 100 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -114,7 +114,7 @@ nv30_identify(struct nouveau_device *device)
114 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 114 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
115 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 115 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
116 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 116 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
117 device->oclass[NVDEV_SUBDEV_FB ] = &nv36_fb_oclass; 117 device->oclass[NVDEV_SUBDEV_FB ] = nv36_fb_oclass;
118 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 118 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
119 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 119 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
120 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 120 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -134,7 +134,7 @@ nv30_identify(struct nouveau_device *device)
134 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass; 134 device->oclass[NVDEV_SUBDEV_MC ] = nv04_mc_oclass;
135 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 135 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
136 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 136 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
137 device->oclass[NVDEV_SUBDEV_FB ] = &nv10_fb_oclass; 137 device->oclass[NVDEV_SUBDEV_FB ] = nv10_fb_oclass;
138 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass; 138 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv04_instmem_oclass;
139 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 139 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
140 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 140 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
diff --git a/drivers/gpu/drm/nouveau/core/engine/device/nv40.c b/drivers/gpu/drm/nouveau/core/engine/device/nv40.c
index 9aa409895300..31a50d10dd1b 100644
--- a/drivers/gpu/drm/nouveau/core/engine/device/nv40.c
+++ b/drivers/gpu/drm/nouveau/core/engine/device/nv40.c
@@ -59,7 +59,7 @@ nv40_identify(struct nouveau_device *device)
59 device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass; 59 device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
60 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 60 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
61 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 61 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
62 device->oclass[NVDEV_SUBDEV_FB ] = &nv40_fb_oclass; 62 device->oclass[NVDEV_SUBDEV_FB ] = nv40_fb_oclass;
63 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass; 63 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;
64 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 64 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
65 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 65 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -80,7 +80,7 @@ nv40_identify(struct nouveau_device *device)
80 device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass; 80 device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
81 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 81 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
82 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 82 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
83 device->oclass[NVDEV_SUBDEV_FB ] = &nv41_fb_oclass; 83 device->oclass[NVDEV_SUBDEV_FB ] = nv41_fb_oclass;
84 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass; 84 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;
85 device->oclass[NVDEV_SUBDEV_VM ] = &nv41_vmmgr_oclass; 85 device->oclass[NVDEV_SUBDEV_VM ] = &nv41_vmmgr_oclass;
86 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 86 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -101,7 +101,7 @@ nv40_identify(struct nouveau_device *device)
101 device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass; 101 device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
102 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 102 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
103 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 103 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
104 device->oclass[NVDEV_SUBDEV_FB ] = &nv41_fb_oclass; 104 device->oclass[NVDEV_SUBDEV_FB ] = nv41_fb_oclass;
105 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass; 105 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;
106 device->oclass[NVDEV_SUBDEV_VM ] = &nv41_vmmgr_oclass; 106 device->oclass[NVDEV_SUBDEV_VM ] = &nv41_vmmgr_oclass;
107 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 107 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -122,7 +122,7 @@ nv40_identify(struct nouveau_device *device)
122 device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass; 122 device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
123 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 123 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
124 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 124 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
125 device->oclass[NVDEV_SUBDEV_FB ] = &nv41_fb_oclass; 125 device->oclass[NVDEV_SUBDEV_FB ] = nv41_fb_oclass;
126 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass; 126 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;
127 device->oclass[NVDEV_SUBDEV_VM ] = &nv41_vmmgr_oclass; 127 device->oclass[NVDEV_SUBDEV_VM ] = &nv41_vmmgr_oclass;
128 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 128 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -143,7 +143,7 @@ nv40_identify(struct nouveau_device *device)
143 device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass; 143 device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
144 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 144 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
145 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 145 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
146 device->oclass[NVDEV_SUBDEV_FB ] = &nv40_fb_oclass; 146 device->oclass[NVDEV_SUBDEV_FB ] = nv40_fb_oclass;
147 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass; 147 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;
148 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass; 148 device->oclass[NVDEV_SUBDEV_VM ] = &nv04_vmmgr_oclass;
149 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 149 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -164,7 +164,7 @@ nv40_identify(struct nouveau_device *device)
164 device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass; 164 device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
165 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 165 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
166 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 166 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
167 device->oclass[NVDEV_SUBDEV_FB ] = &nv47_fb_oclass; 167 device->oclass[NVDEV_SUBDEV_FB ] = nv47_fb_oclass;
168 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass; 168 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;
169 device->oclass[NVDEV_SUBDEV_VM ] = &nv41_vmmgr_oclass; 169 device->oclass[NVDEV_SUBDEV_VM ] = &nv41_vmmgr_oclass;
170 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 170 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -185,7 +185,7 @@ nv40_identify(struct nouveau_device *device)
185 device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass; 185 device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
186 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 186 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
187 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 187 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
188 device->oclass[NVDEV_SUBDEV_FB ] = &nv49_fb_oclass; 188 device->oclass[NVDEV_SUBDEV_FB ] = nv49_fb_oclass;
189 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass; 189 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;
190 device->oclass[NVDEV_SUBDEV_VM ] = &nv41_vmmgr_oclass; 190 device->oclass[NVDEV_SUBDEV_VM ] = &nv41_vmmgr_oclass;
191 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 191 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -206,7 +206,7 @@ nv40_identify(struct nouveau_device *device)
206 device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass; 206 device->oclass[NVDEV_SUBDEV_MC ] = nv40_mc_oclass;
207 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 207 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
208 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 208 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
209 device->oclass[NVDEV_SUBDEV_FB ] = &nv49_fb_oclass; 209 device->oclass[NVDEV_SUBDEV_FB ] = nv49_fb_oclass;
210 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass; 210 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;
211 device->oclass[NVDEV_SUBDEV_VM ] = &nv41_vmmgr_oclass; 211 device->oclass[NVDEV_SUBDEV_VM ] = &nv41_vmmgr_oclass;
212 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 212 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -227,7 +227,7 @@ nv40_identify(struct nouveau_device *device)
227 device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass; 227 device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass;
228 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 228 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
229 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 229 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
230 device->oclass[NVDEV_SUBDEV_FB ] = &nv44_fb_oclass; 230 device->oclass[NVDEV_SUBDEV_FB ] = nv44_fb_oclass;
231 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass; 231 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;
232 device->oclass[NVDEV_SUBDEV_VM ] = &nv44_vmmgr_oclass; 232 device->oclass[NVDEV_SUBDEV_VM ] = &nv44_vmmgr_oclass;
233 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 233 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -248,7 +248,7 @@ nv40_identify(struct nouveau_device *device)
248 device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass; 248 device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass;
249 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 249 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
250 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 250 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
251 device->oclass[NVDEV_SUBDEV_FB ] = &nv46_fb_oclass; 251 device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass;
252 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass; 252 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;
253 device->oclass[NVDEV_SUBDEV_VM ] = &nv44_vmmgr_oclass; 253 device->oclass[NVDEV_SUBDEV_VM ] = &nv44_vmmgr_oclass;
254 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 254 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -269,7 +269,7 @@ nv40_identify(struct nouveau_device *device)
269 device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass; 269 device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass;
270 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 270 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
271 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 271 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
272 device->oclass[NVDEV_SUBDEV_FB ] = &nv44_fb_oclass; 272 device->oclass[NVDEV_SUBDEV_FB ] = nv44_fb_oclass;
273 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass; 273 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;
274 device->oclass[NVDEV_SUBDEV_VM ] = &nv44_vmmgr_oclass; 274 device->oclass[NVDEV_SUBDEV_VM ] = &nv44_vmmgr_oclass;
275 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 275 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -290,7 +290,7 @@ nv40_identify(struct nouveau_device *device)
290 device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass; 290 device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass;
291 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 291 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
292 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 292 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
293 device->oclass[NVDEV_SUBDEV_FB ] = &nv46_fb_oclass; 293 device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass;
294 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass; 294 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;
295 device->oclass[NVDEV_SUBDEV_VM ] = &nv44_vmmgr_oclass; 295 device->oclass[NVDEV_SUBDEV_VM ] = &nv44_vmmgr_oclass;
296 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 296 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -311,7 +311,7 @@ nv40_identify(struct nouveau_device *device)
311 device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass; 311 device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass;
312 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 312 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
313 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 313 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
314 device->oclass[NVDEV_SUBDEV_FB ] = &nv4e_fb_oclass; 314 device->oclass[NVDEV_SUBDEV_FB ] = nv4e_fb_oclass;
315 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass; 315 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;
316 device->oclass[NVDEV_SUBDEV_VM ] = &nv44_vmmgr_oclass; 316 device->oclass[NVDEV_SUBDEV_VM ] = &nv44_vmmgr_oclass;
317 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 317 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -332,7 +332,7 @@ nv40_identify(struct nouveau_device *device)
332 device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass; 332 device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass;
333 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 333 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
334 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 334 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
335 device->oclass[NVDEV_SUBDEV_FB ] = &nv46_fb_oclass; 335 device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass;
336 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass; 336 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;
337 device->oclass[NVDEV_SUBDEV_VM ] = &nv44_vmmgr_oclass; 337 device->oclass[NVDEV_SUBDEV_VM ] = &nv44_vmmgr_oclass;
338 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 338 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -353,7 +353,7 @@ nv40_identify(struct nouveau_device *device)
353 device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass; 353 device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass;
354 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 354 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
355 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 355 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
356 device->oclass[NVDEV_SUBDEV_FB ] = &nv46_fb_oclass; 356 device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass;
357 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass; 357 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;
358 device->oclass[NVDEV_SUBDEV_VM ] = &nv44_vmmgr_oclass; 358 device->oclass[NVDEV_SUBDEV_VM ] = &nv44_vmmgr_oclass;
359 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 359 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
@@ -374,7 +374,7 @@ nv40_identify(struct nouveau_device *device)
374 device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass; 374 device->oclass[NVDEV_SUBDEV_MC ] = nv44_mc_oclass;
375 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass; 375 device->oclass[NVDEV_SUBDEV_BUS ] = &nv31_bus_oclass;
376 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 376 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
377 device->oclass[NVDEV_SUBDEV_FB ] = &nv46_fb_oclass; 377 device->oclass[NVDEV_SUBDEV_FB ] = nv46_fb_oclass;
378 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass; 378 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv40_instmem_oclass;
379 device->oclass[NVDEV_SUBDEV_VM ] = &nv44_vmmgr_oclass; 379 device->oclass[NVDEV_SUBDEV_VM ] = &nv44_vmmgr_oclass;
380 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass; 380 device->oclass[NVDEV_ENGINE_DMAOBJ ] = &nv04_dmaeng_oclass;
diff --git a/drivers/gpu/drm/nouveau/core/engine/device/nv50.c b/drivers/gpu/drm/nouveau/core/engine/device/nv50.c
index b0a36c45b283..a43c6b8f45b4 100644
--- a/drivers/gpu/drm/nouveau/core/engine/device/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/device/nv50.c
@@ -66,7 +66,7 @@ nv50_identify(struct nouveau_device *device)
66 device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; 66 device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass;
67 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass; 67 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass;
68 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 68 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
69 device->oclass[NVDEV_SUBDEV_FB ] = &nv50_fb_oclass; 69 device->oclass[NVDEV_SUBDEV_FB ] = nv50_fb_oclass;
70 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 70 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
71 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass; 71 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass;
72 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; 72 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass;
@@ -89,7 +89,7 @@ nv50_identify(struct nouveau_device *device)
89 device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; 89 device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass;
90 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass; 90 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass;
91 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 91 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
92 device->oclass[NVDEV_SUBDEV_FB ] = &nv50_fb_oclass; 92 device->oclass[NVDEV_SUBDEV_FB ] = nv50_fb_oclass;
93 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 93 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
94 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass; 94 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass;
95 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; 95 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass;
@@ -115,7 +115,7 @@ nv50_identify(struct nouveau_device *device)
115 device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; 115 device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass;
116 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass; 116 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass;
117 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 117 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
118 device->oclass[NVDEV_SUBDEV_FB ] = &nv50_fb_oclass; 118 device->oclass[NVDEV_SUBDEV_FB ] = nv50_fb_oclass;
119 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 119 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
120 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass; 120 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass;
121 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; 121 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass;
@@ -141,7 +141,7 @@ nv50_identify(struct nouveau_device *device)
141 device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass; 141 device->oclass[NVDEV_SUBDEV_MC ] = nv50_mc_oclass;
142 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass; 142 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass;
143 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 143 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
144 device->oclass[NVDEV_SUBDEV_FB ] = &nv50_fb_oclass; 144 device->oclass[NVDEV_SUBDEV_FB ] = nv50_fb_oclass;
145 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 145 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
146 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass; 146 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass;
147 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; 147 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass;
@@ -167,7 +167,7 @@ nv50_identify(struct nouveau_device *device)
167 device->oclass[NVDEV_SUBDEV_MC ] = nv94_mc_oclass; 167 device->oclass[NVDEV_SUBDEV_MC ] = nv94_mc_oclass;
168 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass; 168 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass;
169 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 169 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
170 device->oclass[NVDEV_SUBDEV_FB ] = &nv50_fb_oclass; 170 device->oclass[NVDEV_SUBDEV_FB ] = nv50_fb_oclass;
171 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 171 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
172 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass; 172 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass;
173 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; 173 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass;
@@ -193,7 +193,7 @@ nv50_identify(struct nouveau_device *device)
193 device->oclass[NVDEV_SUBDEV_MC ] = nv94_mc_oclass; 193 device->oclass[NVDEV_SUBDEV_MC ] = nv94_mc_oclass;
194 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass; 194 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass;
195 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 195 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
196 device->oclass[NVDEV_SUBDEV_FB ] = &nv50_fb_oclass; 196 device->oclass[NVDEV_SUBDEV_FB ] = nv50_fb_oclass;
197 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 197 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
198 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass; 198 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass;
199 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; 199 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass;
@@ -219,7 +219,7 @@ nv50_identify(struct nouveau_device *device)
219 device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass; 219 device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass;
220 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass; 220 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass;
221 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 221 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
222 device->oclass[NVDEV_SUBDEV_FB ] = &nv50_fb_oclass; 222 device->oclass[NVDEV_SUBDEV_FB ] = nv50_fb_oclass;
223 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 223 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
224 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass; 224 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass;
225 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; 225 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass;
@@ -245,7 +245,7 @@ nv50_identify(struct nouveau_device *device)
245 device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass; 245 device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass;
246 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass; 246 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass;
247 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 247 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
248 device->oclass[NVDEV_SUBDEV_FB ] = &nv50_fb_oclass; 248 device->oclass[NVDEV_SUBDEV_FB ] = nv50_fb_oclass;
249 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 249 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
250 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass; 250 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass;
251 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; 251 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass;
@@ -271,7 +271,7 @@ nv50_identify(struct nouveau_device *device)
271 device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass; 271 device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass;
272 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass; 272 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass;
273 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 273 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
274 device->oclass[NVDEV_SUBDEV_FB ] = &nv50_fb_oclass; 274 device->oclass[NVDEV_SUBDEV_FB ] = nv50_fb_oclass;
275 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 275 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
276 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass; 276 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass;
277 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; 277 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass;
@@ -297,7 +297,7 @@ nv50_identify(struct nouveau_device *device)
297 device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass; 297 device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass;
298 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass; 298 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass;
299 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 299 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
300 device->oclass[NVDEV_SUBDEV_FB ] = &nv50_fb_oclass; 300 device->oclass[NVDEV_SUBDEV_FB ] = nv50_fb_oclass;
301 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 301 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
302 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass; 302 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass;
303 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; 303 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass;
@@ -323,7 +323,7 @@ nv50_identify(struct nouveau_device *device)
323 device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass; 323 device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass;
324 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass; 324 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass;
325 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 325 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
326 device->oclass[NVDEV_SUBDEV_FB ] = &nv50_fb_oclass; 326 device->oclass[NVDEV_SUBDEV_FB ] = nv50_fb_oclass;
327 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 327 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
328 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass; 328 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass;
329 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; 329 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass;
@@ -350,7 +350,7 @@ nv50_identify(struct nouveau_device *device)
350 device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass; 350 device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass;
351 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass; 351 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass;
352 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 352 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
353 device->oclass[NVDEV_SUBDEV_FB ] = &nv50_fb_oclass; 353 device->oclass[NVDEV_SUBDEV_FB ] = nv50_fb_oclass;
354 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 354 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
355 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass; 355 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass;
356 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; 356 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass;
@@ -376,7 +376,7 @@ nv50_identify(struct nouveau_device *device)
376 device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass; 376 device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass;
377 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass; 377 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass;
378 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 378 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
379 device->oclass[NVDEV_SUBDEV_FB ] = &nv50_fb_oclass; 379 device->oclass[NVDEV_SUBDEV_FB ] = nv50_fb_oclass;
380 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 380 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
381 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass; 381 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass;
382 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; 382 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass;
@@ -402,7 +402,7 @@ nv50_identify(struct nouveau_device *device)
402 device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass; 402 device->oclass[NVDEV_SUBDEV_MC ] = nv98_mc_oclass;
403 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass; 403 device->oclass[NVDEV_SUBDEV_BUS ] = &nv50_bus_oclass;
404 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 404 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
405 device->oclass[NVDEV_SUBDEV_FB ] = &nv50_fb_oclass; 405 device->oclass[NVDEV_SUBDEV_FB ] = nv50_fb_oclass;
406 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 406 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
407 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass; 407 device->oclass[NVDEV_SUBDEV_VM ] = &nv50_vmmgr_oclass;
408 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass; 408 device->oclass[NVDEV_SUBDEV_BAR ] = &nv50_bar_oclass;
diff --git a/drivers/gpu/drm/nouveau/core/engine/device/nvc0.c b/drivers/gpu/drm/nouveau/core/engine/device/nvc0.c
index 4ad2f398c64a..b5b4db69cd02 100644
--- a/drivers/gpu/drm/nouveau/core/engine/device/nvc0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/device/nvc0.c
@@ -66,7 +66,7 @@ nvc0_identify(struct nouveau_device *device)
66 device->oclass[NVDEV_SUBDEV_MC ] = nvc0_mc_oclass; 66 device->oclass[NVDEV_SUBDEV_MC ] = nvc0_mc_oclass;
67 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass; 67 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass;
68 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 68 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
69 device->oclass[NVDEV_SUBDEV_FB ] = &nvc0_fb_oclass; 69 device->oclass[NVDEV_SUBDEV_FB ] = nvc0_fb_oclass;
70 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass; 70 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass;
71 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass; 71 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass;
72 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 72 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
@@ -95,7 +95,7 @@ nvc0_identify(struct nouveau_device *device)
95 device->oclass[NVDEV_SUBDEV_MC ] = nvc0_mc_oclass; 95 device->oclass[NVDEV_SUBDEV_MC ] = nvc0_mc_oclass;
96 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass; 96 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass;
97 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 97 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
98 device->oclass[NVDEV_SUBDEV_FB ] = &nvc0_fb_oclass; 98 device->oclass[NVDEV_SUBDEV_FB ] = nvc0_fb_oclass;
99 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass; 99 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass;
100 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass; 100 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass;
101 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 101 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
@@ -124,7 +124,7 @@ nvc0_identify(struct nouveau_device *device)
124 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; 124 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
125 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass; 125 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass;
126 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 126 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
127 device->oclass[NVDEV_SUBDEV_FB ] = &nvc0_fb_oclass; 127 device->oclass[NVDEV_SUBDEV_FB ] = nvc0_fb_oclass;
128 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass; 128 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass;
129 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass; 129 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass;
130 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 130 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
@@ -152,7 +152,7 @@ nvc0_identify(struct nouveau_device *device)
152 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; 152 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
153 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass; 153 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass;
154 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 154 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
155 device->oclass[NVDEV_SUBDEV_FB ] = &nvc0_fb_oclass; 155 device->oclass[NVDEV_SUBDEV_FB ] = nvc0_fb_oclass;
156 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass; 156 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass;
157 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass; 157 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass;
158 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 158 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
@@ -181,7 +181,7 @@ nvc0_identify(struct nouveau_device *device)
181 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; 181 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
182 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass; 182 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass;
183 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 183 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
184 device->oclass[NVDEV_SUBDEV_FB ] = &nvc0_fb_oclass; 184 device->oclass[NVDEV_SUBDEV_FB ] = nvc0_fb_oclass;
185 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass; 185 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass;
186 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass; 186 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass;
187 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 187 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
@@ -210,7 +210,7 @@ nvc0_identify(struct nouveau_device *device)
210 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; 210 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
211 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass; 211 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass;
212 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 212 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
213 device->oclass[NVDEV_SUBDEV_FB ] = &nvc0_fb_oclass; 213 device->oclass[NVDEV_SUBDEV_FB ] = nvc0_fb_oclass;
214 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass; 214 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass;
215 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass; 215 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass;
216 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 216 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
@@ -238,7 +238,7 @@ nvc0_identify(struct nouveau_device *device)
238 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; 238 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
239 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass; 239 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass;
240 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 240 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
241 device->oclass[NVDEV_SUBDEV_FB ] = &nvc0_fb_oclass; 241 device->oclass[NVDEV_SUBDEV_FB ] = nvc0_fb_oclass;
242 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass; 242 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass;
243 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass; 243 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass;
244 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 244 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
@@ -267,7 +267,7 @@ nvc0_identify(struct nouveau_device *device)
267 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; 267 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
268 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass; 268 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass;
269 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 269 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
270 device->oclass[NVDEV_SUBDEV_FB ] = &nvc0_fb_oclass; 270 device->oclass[NVDEV_SUBDEV_FB ] = nvc0_fb_oclass;
271 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass; 271 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass;
272 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass; 272 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass;
273 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 273 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
@@ -295,7 +295,7 @@ nvc0_identify(struct nouveau_device *device)
295 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; 295 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
296 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass; 296 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass;
297 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 297 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
298 device->oclass[NVDEV_SUBDEV_FB ] = &nvc0_fb_oclass; 298 device->oclass[NVDEV_SUBDEV_FB ] = nvc0_fb_oclass;
299 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass; 299 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass;
300 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass; 300 device->oclass[NVDEV_SUBDEV_IBUS ] = &nvc0_ibus_oclass;
301 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 301 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
diff --git a/drivers/gpu/drm/nouveau/core/engine/device/nve0.c b/drivers/gpu/drm/nouveau/core/engine/device/nve0.c
index e46bc606807b..4d985fcbc949 100644
--- a/drivers/gpu/drm/nouveau/core/engine/device/nve0.c
+++ b/drivers/gpu/drm/nouveau/core/engine/device/nve0.c
@@ -66,7 +66,7 @@ nve0_identify(struct nouveau_device *device)
66 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; 66 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
67 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass; 67 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass;
68 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 68 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
69 device->oclass[NVDEV_SUBDEV_FB ] = &nvc0_fb_oclass; 69 device->oclass[NVDEV_SUBDEV_FB ] = nvc0_fb_oclass;
70 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass; 70 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass;
71 device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass; 71 device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass;
72 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 72 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
@@ -96,7 +96,7 @@ nve0_identify(struct nouveau_device *device)
96 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; 96 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
97 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass; 97 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass;
98 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 98 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
99 device->oclass[NVDEV_SUBDEV_FB ] = &nvc0_fb_oclass; 99 device->oclass[NVDEV_SUBDEV_FB ] = nvc0_fb_oclass;
100 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass; 100 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass;
101 device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass; 101 device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass;
102 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 102 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
@@ -126,7 +126,7 @@ nve0_identify(struct nouveau_device *device)
126 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; 126 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
127 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass; 127 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass;
128 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 128 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
129 device->oclass[NVDEV_SUBDEV_FB ] = &nvc0_fb_oclass; 129 device->oclass[NVDEV_SUBDEV_FB ] = nvc0_fb_oclass;
130 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass; 130 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass;
131 device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass; 131 device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass;
132 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 132 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
@@ -156,7 +156,7 @@ nve0_identify(struct nouveau_device *device)
156 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass; 156 device->oclass[NVDEV_SUBDEV_MC ] = nvc3_mc_oclass;
157 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass; 157 device->oclass[NVDEV_SUBDEV_BUS ] = &nvc0_bus_oclass;
158 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; 158 device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
159 device->oclass[NVDEV_SUBDEV_FB ] = &nvc0_fb_oclass; 159 device->oclass[NVDEV_SUBDEV_FB ] = nvc0_fb_oclass;
160 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass; 160 device->oclass[NVDEV_SUBDEV_LTCG ] = &nvc0_ltcg_oclass;
161 device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass; 161 device->oclass[NVDEV_SUBDEV_IBUS ] = &nve0_ibus_oclass;
162 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass; 162 device->oclass[NVDEV_SUBDEV_INSTMEM] = &nv50_instmem_oclass;
diff --git a/drivers/gpu/drm/nouveau/core/include/subdev/fb.h b/drivers/gpu/drm/nouveau/core/include/subdev/fb.h
index 2e7405084261..9ab214a8ec00 100644
--- a/drivers/gpu/drm/nouveau/core/include/subdev/fb.h
+++ b/drivers/gpu/drm/nouveau/core/include/subdev/fb.h
@@ -78,23 +78,23 @@ nouveau_fb(void *obj)
78 return (void *)nv_device(obj)->subdev[NVDEV_SUBDEV_FB]; 78 return (void *)nv_device(obj)->subdev[NVDEV_SUBDEV_FB];
79} 79}
80 80
81extern struct nouveau_oclass nv04_fb_oclass; 81extern struct nouveau_oclass *nv04_fb_oclass;
82extern struct nouveau_oclass nv10_fb_oclass; 82extern struct nouveau_oclass *nv10_fb_oclass;
83extern struct nouveau_oclass nv1a_fb_oclass; 83extern struct nouveau_oclass *nv1a_fb_oclass;
84extern struct nouveau_oclass nv20_fb_oclass; 84extern struct nouveau_oclass *nv20_fb_oclass;
85extern struct nouveau_oclass nv25_fb_oclass; 85extern struct nouveau_oclass *nv25_fb_oclass;
86extern struct nouveau_oclass nv30_fb_oclass; 86extern struct nouveau_oclass *nv30_fb_oclass;
87extern struct nouveau_oclass nv35_fb_oclass; 87extern struct nouveau_oclass *nv35_fb_oclass;
88extern struct nouveau_oclass nv36_fb_oclass; 88extern struct nouveau_oclass *nv36_fb_oclass;
89extern struct nouveau_oclass nv40_fb_oclass; 89extern struct nouveau_oclass *nv40_fb_oclass;
90extern struct nouveau_oclass nv41_fb_oclass; 90extern struct nouveau_oclass *nv41_fb_oclass;
91extern struct nouveau_oclass nv44_fb_oclass; 91extern struct nouveau_oclass *nv44_fb_oclass;
92extern struct nouveau_oclass nv46_fb_oclass; 92extern struct nouveau_oclass *nv46_fb_oclass;
93extern struct nouveau_oclass nv47_fb_oclass; 93extern struct nouveau_oclass *nv47_fb_oclass;
94extern struct nouveau_oclass nv49_fb_oclass; 94extern struct nouveau_oclass *nv49_fb_oclass;
95extern struct nouveau_oclass nv4e_fb_oclass; 95extern struct nouveau_oclass *nv4e_fb_oclass;
96extern struct nouveau_oclass nv50_fb_oclass; 96extern struct nouveau_oclass *nv50_fb_oclass;
97extern struct nouveau_oclass nvc0_fb_oclass; 97extern struct nouveau_oclass *nvc0_fb_oclass;
98 98
99struct nouveau_ram { 99struct nouveau_ram {
100 struct nouveau_object base; 100 struct nouveau_object base;
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv04.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv04.c
index 1f103c7b89fa..b88e87b70948 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv04.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv04.c
@@ -74,8 +74,8 @@ nv04_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
74 return 0; 74 return 0;
75} 75}
76 76
77struct nouveau_oclass 77struct nouveau_oclass *
78nv04_fb_oclass = { 78nv04_fb_oclass = &(struct nouveau_oclass) {
79 .handle = NV_SUBDEV(FB, 0x04), 79 .handle = NV_SUBDEV(FB, 0x04),
80 .ofuncs = &(struct nouveau_ofuncs) { 80 .ofuncs = &(struct nouveau_ofuncs) {
81 .ctor = nv04_fb_ctor, 81 .ctor = nv04_fb_ctor,
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv10.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv10.c
index be069b5306b6..ab0ea940cd22 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv10.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv10.c
@@ -78,8 +78,8 @@ nv10_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
78 return 0; 78 return 0;
79} 79}
80 80
81struct nouveau_oclass 81struct nouveau_oclass *
82nv10_fb_oclass = { 82nv10_fb_oclass = &(struct nouveau_oclass) {
83 .handle = NV_SUBDEV(FB, 0x10), 83 .handle = NV_SUBDEV(FB, 0x10),
84 .ofuncs = &(struct nouveau_ofuncs) { 84 .ofuncs = &(struct nouveau_ofuncs) {
85 .ctor = nv10_fb_ctor, 85 .ctor = nv10_fb_ctor,
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv1a.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv1a.c
index 57a2af0079b3..5c91131ee471 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv1a.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv1a.c
@@ -51,8 +51,8 @@ nv1a_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
51 return 0; 51 return 0;
52} 52}
53 53
54struct nouveau_oclass 54struct nouveau_oclass *
55nv1a_fb_oclass = { 55nv1a_fb_oclass = &(struct nouveau_oclass) {
56 .handle = NV_SUBDEV(FB, 0x1a), 56 .handle = NV_SUBDEV(FB, 0x1a),
57 .ofuncs = &(struct nouveau_ofuncs) { 57 .ofuncs = &(struct nouveau_ofuncs) {
58 .ctor = nv1a_fb_ctor, 58 .ctor = nv1a_fb_ctor,
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv20.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv20.c
index b18c4e63bb47..4ded3c08d613 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv20.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv20.c
@@ -102,8 +102,8 @@ nv20_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
102 return 0; 102 return 0;
103} 103}
104 104
105struct nouveau_oclass 105struct nouveau_oclass *
106nv20_fb_oclass = { 106nv20_fb_oclass = &(struct nouveau_oclass) {
107 .handle = NV_SUBDEV(FB, 0x20), 107 .handle = NV_SUBDEV(FB, 0x20),
108 .ofuncs = &(struct nouveau_ofuncs) { 108 .ofuncs = &(struct nouveau_ofuncs) {
109 .ctor = nv20_fb_ctor, 109 .ctor = nv20_fb_ctor,
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv25.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv25.c
index 32ccabf10c45..3c3e37b0d081 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv25.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv25.c
@@ -68,8 +68,8 @@ nv25_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
68 return 0; 68 return 0;
69} 69}
70 70
71struct nouveau_oclass 71struct nouveau_oclass *
72nv25_fb_oclass = { 72nv25_fb_oclass = &(struct nouveau_oclass) {
73 .handle = NV_SUBDEV(FB, 0x25), 73 .handle = NV_SUBDEV(FB, 0x25),
74 .ofuncs = &(struct nouveau_ofuncs) { 74 .ofuncs = &(struct nouveau_ofuncs) {
75 .ctor = nv25_fb_ctor, 75 .ctor = nv25_fb_ctor,
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv30.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv30.c
index bef756d43d33..fd05a84a540a 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv30.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv30.c
@@ -146,8 +146,8 @@ nv30_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
146 return 0; 146 return 0;
147} 147}
148 148
149struct nouveau_oclass 149struct nouveau_oclass *
150nv30_fb_oclass = { 150nv30_fb_oclass = &(struct nouveau_oclass) {
151 .handle = NV_SUBDEV(FB, 0x30), 151 .handle = NV_SUBDEV(FB, 0x30),
152 .ofuncs = &(struct nouveau_ofuncs) { 152 .ofuncs = &(struct nouveau_ofuncs) {
153 .ctor = nv30_fb_ctor, 153 .ctor = nv30_fb_ctor,
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv35.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv35.c
index 097d8e3824f2..0c4f82c882f1 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv35.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv35.c
@@ -69,8 +69,8 @@ nv35_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
69 return 0; 69 return 0;
70} 70}
71 71
72struct nouveau_oclass 72struct nouveau_oclass *
73nv35_fb_oclass = { 73nv35_fb_oclass = &(struct nouveau_oclass) {
74 .handle = NV_SUBDEV(FB, 0x35), 74 .handle = NV_SUBDEV(FB, 0x35),
75 .ofuncs = &(struct nouveau_ofuncs) { 75 .ofuncs = &(struct nouveau_ofuncs) {
76 .ctor = nv35_fb_ctor, 76 .ctor = nv35_fb_ctor,
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv36.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv36.c
index 9d6d9df896d9..b3e148a9c752 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv36.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv36.c
@@ -69,8 +69,8 @@ nv36_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
69 return 0; 69 return 0;
70} 70}
71 71
72struct nouveau_oclass 72struct nouveau_oclass *
73nv36_fb_oclass = { 73nv36_fb_oclass = &(struct nouveau_oclass) {
74 .handle = NV_SUBDEV(FB, 0x36), 74 .handle = NV_SUBDEV(FB, 0x36),
75 .ofuncs = &(struct nouveau_ofuncs) { 75 .ofuncs = &(struct nouveau_ofuncs) {
76 .ctor = nv36_fb_ctor, 76 .ctor = nv36_fb_ctor,
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv40.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv40.c
index 33b4393a7829..c35154091318 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv40.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv40.c
@@ -84,8 +84,8 @@ nv40_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
84} 84}
85 85
86 86
87struct nouveau_oclass 87struct nouveau_oclass *
88nv40_fb_oclass = { 88nv40_fb_oclass = &(struct nouveau_oclass) {
89 .handle = NV_SUBDEV(FB, 0x40), 89 .handle = NV_SUBDEV(FB, 0x40),
90 .ofuncs = &(struct nouveau_ofuncs) { 90 .ofuncs = &(struct nouveau_ofuncs) {
91 .ctor = nv40_fb_ctor, 91 .ctor = nv40_fb_ctor,
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv41.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv41.c
index 02cd83789cd4..ee682f5cad02 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv41.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv41.c
@@ -77,8 +77,8 @@ nv41_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
77} 77}
78 78
79 79
80struct nouveau_oclass 80struct nouveau_oclass *
81nv41_fb_oclass = { 81nv41_fb_oclass = &(struct nouveau_oclass) {
82 .handle = NV_SUBDEV(FB, 0x41), 82 .handle = NV_SUBDEV(FB, 0x41),
83 .ofuncs = &(struct nouveau_ofuncs) { 83 .ofuncs = &(struct nouveau_ofuncs) {
84 .ctor = nv41_fb_ctor, 84 .ctor = nv41_fb_ctor,
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv44.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv44.c
index c5246c29f293..92b4d9574494 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv44.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv44.c
@@ -86,8 +86,8 @@ nv44_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
86} 86}
87 87
88 88
89struct nouveau_oclass 89struct nouveau_oclass *
90nv44_fb_oclass = { 90nv44_fb_oclass = &(struct nouveau_oclass) {
91 .handle = NV_SUBDEV(FB, 0x44), 91 .handle = NV_SUBDEV(FB, 0x44),
92 .ofuncs = &(struct nouveau_ofuncs) { 92 .ofuncs = &(struct nouveau_ofuncs) {
93 .ctor = nv44_fb_ctor, 93 .ctor = nv44_fb_ctor,
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv46.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv46.c
index e2b57909bfca..50d93d71f479 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv46.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv46.c
@@ -66,8 +66,8 @@ nv46_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
66} 66}
67 67
68 68
69struct nouveau_oclass 69struct nouveau_oclass *
70nv46_fb_oclass = { 70nv46_fb_oclass = &(struct nouveau_oclass) {
71 .handle = NV_SUBDEV(FB, 0x46), 71 .handle = NV_SUBDEV(FB, 0x46),
72 .ofuncs = &(struct nouveau_ofuncs) { 72 .ofuncs = &(struct nouveau_ofuncs) {
73 .ctor = nv46_fb_ctor, 73 .ctor = nv46_fb_ctor,
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv47.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv47.c
index fe6a2278621d..7c73db284237 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv47.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv47.c
@@ -53,8 +53,8 @@ nv47_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
53} 53}
54 54
55 55
56struct nouveau_oclass 56struct nouveau_oclass *
57nv47_fb_oclass = { 57nv47_fb_oclass = &(struct nouveau_oclass) {
58 .handle = NV_SUBDEV(FB, 0x47), 58 .handle = NV_SUBDEV(FB, 0x47),
59 .ofuncs = &(struct nouveau_ofuncs) { 59 .ofuncs = &(struct nouveau_ofuncs) {
60 .ctor = nv47_fb_ctor, 60 .ctor = nv47_fb_ctor,
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv49.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv49.c
index 5eca99b8c7e2..9f7a22436e53 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv49.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv49.c
@@ -53,8 +53,8 @@ nv49_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
53} 53}
54 54
55 55
56struct nouveau_oclass 56struct nouveau_oclass *
57nv49_fb_oclass = { 57nv49_fb_oclass = &(struct nouveau_oclass) {
58 .handle = NV_SUBDEV(FB, 0x49), 58 .handle = NV_SUBDEV(FB, 0x49),
59 .ofuncs = &(struct nouveau_ofuncs) { 59 .ofuncs = &(struct nouveau_ofuncs) {
60 .ctor = nv49_fb_ctor, 60 .ctor = nv49_fb_ctor,
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv4e.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv4e.c
index 1190b78a1e91..42d7dbf63922 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv4e.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv4e.c
@@ -51,8 +51,8 @@ nv4e_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
51 return 0; 51 return 0;
52} 52}
53 53
54struct nouveau_oclass 54struct nouveau_oclass *
55nv4e_fb_oclass = { 55nv4e_fb_oclass = &(struct nouveau_oclass) {
56 .handle = NV_SUBDEV(FB, 0x4e), 56 .handle = NV_SUBDEV(FB, 0x4e),
57 .ofuncs = &(struct nouveau_ofuncs) { 57 .ofuncs = &(struct nouveau_ofuncs) {
58 .ctor = nv4e_fb_ctor, 58 .ctor = nv4e_fb_ctor,
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c
index da614ec5564b..358632129a7f 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nv50.c
@@ -323,8 +323,8 @@ nv50_fb_init(struct nouveau_object *object)
323 return 0; 323 return 0;
324} 324}
325 325
326struct nouveau_oclass 326struct nouveau_oclass *
327nv50_fb_oclass = { 327nv50_fb_oclass = &(struct nouveau_oclass) {
328 .handle = NV_SUBDEV(FB, 0x50), 328 .handle = NV_SUBDEV(FB, 0x50),
329 .ofuncs = &(struct nouveau_ofuncs) { 329 .ofuncs = &(struct nouveau_ofuncs) {
330 .ctor = nv50_fb_ctor, 330 .ctor = nv50_fb_ctor,
diff --git a/drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c b/drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c
index f35d76fd746d..5dedce9c5183 100644
--- a/drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c
+++ b/drivers/gpu/drm/nouveau/core/subdev/fb/nvc0.c
@@ -98,8 +98,8 @@ nvc0_fb_ctor(struct nouveau_object *parent, struct nouveau_object *engine,
98} 98}
99 99
100 100
101struct nouveau_oclass 101struct nouveau_oclass *
102nvc0_fb_oclass = { 102nvc0_fb_oclass = &(struct nouveau_oclass) {
103 .handle = NV_SUBDEV(FB, 0xc0), 103 .handle = NV_SUBDEV(FB, 0xc0),
104 .ofuncs = &(struct nouveau_ofuncs) { 104 .ofuncs = &(struct nouveau_ofuncs) {
105 .ctor = nvc0_fb_ctor, 105 .ctor = nvc0_fb_ctor,