diff options
author | Dave Airlie <airlied@redhat.com> | 2015-04-08 17:48:27 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2015-04-08 17:48:27 -0400 |
commit | 1d8ac08d498d579aae36221a80b4b724b2f52f39 (patch) | |
tree | 3177ed7b82edbb34055da95c50b418db5cd4ba60 /drivers/gpu | |
parent | 5c7f0c27956a9884e29dbe5f83e56609fa00290f (diff) | |
parent | f22e6e847115abc3a0e2ad7bb18d243d42275af1 (diff) |
Merge tag 'v4.0-rc7' into drm-next
Linux 4.0-rc7
Requested by Alex for fixes -next needs.
Conflicts:
drivers/gpu/drm/i915/intel_sprite.c
Diffstat (limited to 'drivers/gpu')
-rw-r--r-- | drivers/gpu/drm/drm_edid_load.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/drm_probe_helper.c | 1 | ||||
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_drm_fimd.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/exynos/exynos_mixer.c | 17 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_sprite.c | 2 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_mn.c | 11 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_ttm.c | 4 |
7 files changed, 26 insertions, 18 deletions
diff --git a/drivers/gpu/drm/drm_edid_load.c b/drivers/gpu/drm/drm_edid_load.c index 732cb6f8e653..4c0aa97aaf03 100644 --- a/drivers/gpu/drm/drm_edid_load.c +++ b/drivers/gpu/drm/drm_edid_load.c | |||
@@ -287,6 +287,7 @@ int drm_load_edid_firmware(struct drm_connector *connector) | |||
287 | 287 | ||
288 | drm_mode_connector_update_edid_property(connector, edid); | 288 | drm_mode_connector_update_edid_property(connector, edid); |
289 | ret = drm_add_edid_modes(connector, edid); | 289 | ret = drm_add_edid_modes(connector, edid); |
290 | drm_edid_to_eld(connector, edid); | ||
290 | kfree(edid); | 291 | kfree(edid); |
291 | 292 | ||
292 | return ret; | 293 | return ret; |
diff --git a/drivers/gpu/drm/drm_probe_helper.c b/drivers/gpu/drm/drm_probe_helper.c index 6591d48c1b9d..3fee587bc284 100644 --- a/drivers/gpu/drm/drm_probe_helper.c +++ b/drivers/gpu/drm/drm_probe_helper.c | |||
@@ -174,6 +174,7 @@ static int drm_helper_probe_single_connector_modes_merge_bits(struct drm_connect | |||
174 | struct edid *edid = (struct edid *) connector->edid_blob_ptr->data; | 174 | struct edid *edid = (struct edid *) connector->edid_blob_ptr->data; |
175 | 175 | ||
176 | count = drm_add_edid_modes(connector, edid); | 176 | count = drm_add_edid_modes(connector, edid); |
177 | drm_edid_to_eld(connector, edid); | ||
177 | } else | 178 | } else |
178 | count = (*connector_funcs->get_modes)(connector); | 179 | count = (*connector_funcs->get_modes)(connector); |
179 | } | 180 | } |
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c index c300e22da8ac..33a10ce967ea 100644 --- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c +++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c | |||
@@ -147,6 +147,7 @@ struct fimd_win_data { | |||
147 | unsigned int ovl_height; | 147 | unsigned int ovl_height; |
148 | unsigned int fb_width; | 148 | unsigned int fb_width; |
149 | unsigned int fb_height; | 149 | unsigned int fb_height; |
150 | unsigned int fb_pitch; | ||
150 | unsigned int bpp; | 151 | unsigned int bpp; |
151 | unsigned int pixel_format; | 152 | unsigned int pixel_format; |
152 | dma_addr_t dma_addr; | 153 | dma_addr_t dma_addr; |
@@ -532,13 +533,14 @@ static void fimd_win_mode_set(struct exynos_drm_crtc *crtc, | |||
532 | win_data->offset_y = plane->crtc_y; | 533 | win_data->offset_y = plane->crtc_y; |
533 | win_data->ovl_width = plane->crtc_width; | 534 | win_data->ovl_width = plane->crtc_width; |
534 | win_data->ovl_height = plane->crtc_height; | 535 | win_data->ovl_height = plane->crtc_height; |
536 | win_data->fb_pitch = plane->pitch; | ||
535 | win_data->fb_width = plane->fb_width; | 537 | win_data->fb_width = plane->fb_width; |
536 | win_data->fb_height = plane->fb_height; | 538 | win_data->fb_height = plane->fb_height; |
537 | win_data->dma_addr = plane->dma_addr[0] + offset; | 539 | win_data->dma_addr = plane->dma_addr[0] + offset; |
538 | win_data->bpp = plane->bpp; | 540 | win_data->bpp = plane->bpp; |
539 | win_data->pixel_format = plane->pixel_format; | 541 | win_data->pixel_format = plane->pixel_format; |
540 | win_data->buf_offsize = (plane->fb_width - plane->crtc_width) * | 542 | win_data->buf_offsize = |
541 | (plane->bpp >> 3); | 543 | plane->pitch - (plane->crtc_width * (plane->bpp >> 3)); |
542 | win_data->line_size = plane->crtc_width * (plane->bpp >> 3); | 544 | win_data->line_size = plane->crtc_width * (plane->bpp >> 3); |
543 | 545 | ||
544 | DRM_DEBUG_KMS("offset_x = %d, offset_y = %d\n", | 546 | DRM_DEBUG_KMS("offset_x = %d, offset_y = %d\n", |
@@ -704,7 +706,7 @@ static void fimd_win_commit(struct exynos_drm_crtc *crtc, int zpos) | |||
704 | writel(val, ctx->regs + VIDWx_BUF_START(win, 0)); | 706 | writel(val, ctx->regs + VIDWx_BUF_START(win, 0)); |
705 | 707 | ||
706 | /* buffer end address */ | 708 | /* buffer end address */ |
707 | size = win_data->fb_width * win_data->ovl_height * (win_data->bpp >> 3); | 709 | size = win_data->fb_pitch * win_data->ovl_height * (win_data->bpp >> 3); |
708 | val = (unsigned long)(win_data->dma_addr + size); | 710 | val = (unsigned long)(win_data->dma_addr + size); |
709 | writel(val, ctx->regs + VIDWx_BUF_END(win, 0)); | 711 | writel(val, ctx->regs + VIDWx_BUF_END(win, 0)); |
710 | 712 | ||
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c index 3518bc4654c5..2e3bc57ea50e 100644 --- a/drivers/gpu/drm/exynos/exynos_mixer.c +++ b/drivers/gpu/drm/exynos/exynos_mixer.c | |||
@@ -55,6 +55,7 @@ struct hdmi_win_data { | |||
55 | unsigned int fb_x; | 55 | unsigned int fb_x; |
56 | unsigned int fb_y; | 56 | unsigned int fb_y; |
57 | unsigned int fb_width; | 57 | unsigned int fb_width; |
58 | unsigned int fb_pitch; | ||
58 | unsigned int fb_height; | 59 | unsigned int fb_height; |
59 | unsigned int src_width; | 60 | unsigned int src_width; |
60 | unsigned int src_height; | 61 | unsigned int src_height; |
@@ -438,7 +439,7 @@ static void vp_video_buffer(struct mixer_context *ctx, int win) | |||
438 | } else { | 439 | } else { |
439 | luma_addr[0] = win_data->dma_addr; | 440 | luma_addr[0] = win_data->dma_addr; |
440 | chroma_addr[0] = win_data->dma_addr | 441 | chroma_addr[0] = win_data->dma_addr |
441 | + (win_data->fb_width * win_data->fb_height); | 442 | + (win_data->fb_pitch * win_data->fb_height); |
442 | } | 443 | } |
443 | 444 | ||
444 | if (win_data->scan_flags & DRM_MODE_FLAG_INTERLACE) { | 445 | if (win_data->scan_flags & DRM_MODE_FLAG_INTERLACE) { |
@@ -447,8 +448,8 @@ static void vp_video_buffer(struct mixer_context *ctx, int win) | |||
447 | luma_addr[1] = luma_addr[0] + 0x40; | 448 | luma_addr[1] = luma_addr[0] + 0x40; |
448 | chroma_addr[1] = chroma_addr[0] + 0x40; | 449 | chroma_addr[1] = chroma_addr[0] + 0x40; |
449 | } else { | 450 | } else { |
450 | luma_addr[1] = luma_addr[0] + win_data->fb_width; | 451 | luma_addr[1] = luma_addr[0] + win_data->fb_pitch; |
451 | chroma_addr[1] = chroma_addr[0] + win_data->fb_width; | 452 | chroma_addr[1] = chroma_addr[0] + win_data->fb_pitch; |
452 | } | 453 | } |
453 | } else { | 454 | } else { |
454 | ctx->interlace = false; | 455 | ctx->interlace = false; |
@@ -469,10 +470,10 @@ static void vp_video_buffer(struct mixer_context *ctx, int win) | |||
469 | vp_reg_writemask(res, VP_MODE, val, VP_MODE_FMT_MASK); | 470 | vp_reg_writemask(res, VP_MODE, val, VP_MODE_FMT_MASK); |
470 | 471 | ||
471 | /* setting size of input image */ | 472 | /* setting size of input image */ |
472 | vp_reg_write(res, VP_IMG_SIZE_Y, VP_IMG_HSIZE(win_data->fb_width) | | 473 | vp_reg_write(res, VP_IMG_SIZE_Y, VP_IMG_HSIZE(win_data->fb_pitch) | |
473 | VP_IMG_VSIZE(win_data->fb_height)); | 474 | VP_IMG_VSIZE(win_data->fb_height)); |
474 | /* chroma height has to reduced by 2 to avoid chroma distorions */ | 475 | /* chroma height has to reduced by 2 to avoid chroma distorions */ |
475 | vp_reg_write(res, VP_IMG_SIZE_C, VP_IMG_HSIZE(win_data->fb_width) | | 476 | vp_reg_write(res, VP_IMG_SIZE_C, VP_IMG_HSIZE(win_data->fb_pitch) | |
476 | VP_IMG_VSIZE(win_data->fb_height / 2)); | 477 | VP_IMG_VSIZE(win_data->fb_height / 2)); |
477 | 478 | ||
478 | vp_reg_write(res, VP_SRC_WIDTH, win_data->src_width); | 479 | vp_reg_write(res, VP_SRC_WIDTH, win_data->src_width); |
@@ -559,7 +560,7 @@ static void mixer_graph_buffer(struct mixer_context *ctx, int win) | |||
559 | /* converting dma address base and source offset */ | 560 | /* converting dma address base and source offset */ |
560 | dma_addr = win_data->dma_addr | 561 | dma_addr = win_data->dma_addr |
561 | + (win_data->fb_x * win_data->bpp >> 3) | 562 | + (win_data->fb_x * win_data->bpp >> 3) |
562 | + (win_data->fb_y * win_data->fb_width * win_data->bpp >> 3); | 563 | + (win_data->fb_y * win_data->fb_pitch); |
563 | src_x_offset = 0; | 564 | src_x_offset = 0; |
564 | src_y_offset = 0; | 565 | src_y_offset = 0; |
565 | 566 | ||
@@ -576,7 +577,8 @@ static void mixer_graph_buffer(struct mixer_context *ctx, int win) | |||
576 | MXR_GRP_CFG_FORMAT_VAL(fmt), MXR_GRP_CFG_FORMAT_MASK); | 577 | MXR_GRP_CFG_FORMAT_VAL(fmt), MXR_GRP_CFG_FORMAT_MASK); |
577 | 578 | ||
578 | /* setup geometry */ | 579 | /* setup geometry */ |
579 | mixer_reg_write(res, MXR_GRAPHIC_SPAN(win), win_data->fb_width); | 580 | mixer_reg_write(res, MXR_GRAPHIC_SPAN(win), |
581 | win_data->fb_pitch / (win_data->bpp >> 3)); | ||
580 | 582 | ||
581 | /* setup display size */ | 583 | /* setup display size */ |
582 | if (ctx->mxr_ver == MXR_VER_128_0_0_184 && | 584 | if (ctx->mxr_ver == MXR_VER_128_0_0_184 && |
@@ -961,6 +963,7 @@ static void mixer_win_mode_set(struct exynos_drm_crtc *crtc, | |||
961 | win_data->fb_y = plane->fb_y; | 963 | win_data->fb_y = plane->fb_y; |
962 | win_data->fb_width = plane->fb_width; | 964 | win_data->fb_width = plane->fb_width; |
963 | win_data->fb_height = plane->fb_height; | 965 | win_data->fb_height = plane->fb_height; |
966 | win_data->fb_pitch = plane->pitch; | ||
964 | win_data->src_width = plane->src_width; | 967 | win_data->src_width = plane->src_width; |
965 | win_data->src_height = plane->src_height; | 968 | win_data->src_height = plane->src_height; |
966 | 969 | ||
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c index e9ff6fc61267..a4c0a04b5044 100644 --- a/drivers/gpu/drm/i915/intel_sprite.c +++ b/drivers/gpu/drm/i915/intel_sprite.c | |||
@@ -1113,7 +1113,7 @@ int intel_sprite_set_colorkey(struct drm_device *dev, void *data, | |||
1113 | drm_modeset_lock_all(dev); | 1113 | drm_modeset_lock_all(dev); |
1114 | 1114 | ||
1115 | plane = drm_plane_find(dev, set->plane_id); | 1115 | plane = drm_plane_find(dev, set->plane_id); |
1116 | if (!plane) { | 1116 | if (!plane || plane->type != DRM_PLANE_TYPE_OVERLAY) { |
1117 | ret = -ENOENT; | 1117 | ret = -ENOENT; |
1118 | goto out_unlock; | 1118 | goto out_unlock; |
1119 | } | 1119 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_mn.c b/drivers/gpu/drm/radeon/radeon_mn.c index a69bd441dd2d..572b4dbec186 100644 --- a/drivers/gpu/drm/radeon/radeon_mn.c +++ b/drivers/gpu/drm/radeon/radeon_mn.c | |||
@@ -122,7 +122,6 @@ static void radeon_mn_invalidate_range_start(struct mmu_notifier *mn, | |||
122 | it = interval_tree_iter_first(&rmn->objects, start, end); | 122 | it = interval_tree_iter_first(&rmn->objects, start, end); |
123 | while (it) { | 123 | while (it) { |
124 | struct radeon_bo *bo; | 124 | struct radeon_bo *bo; |
125 | struct fence *fence; | ||
126 | int r; | 125 | int r; |
127 | 126 | ||
128 | bo = container_of(it, struct radeon_bo, mn_it); | 127 | bo = container_of(it, struct radeon_bo, mn_it); |
@@ -134,12 +133,10 @@ static void radeon_mn_invalidate_range_start(struct mmu_notifier *mn, | |||
134 | continue; | 133 | continue; |
135 | } | 134 | } |
136 | 135 | ||
137 | fence = reservation_object_get_excl(bo->tbo.resv); | 136 | r = reservation_object_wait_timeout_rcu(bo->tbo.resv, true, |
138 | if (fence) { | 137 | false, MAX_SCHEDULE_TIMEOUT); |
139 | r = radeon_fence_wait((struct radeon_fence *)fence, false); | 138 | if (r) |
140 | if (r) | 139 | DRM_ERROR("(%d) failed to wait for user bo\n", r); |
141 | DRM_ERROR("(%d) failed to wait for user bo\n", r); | ||
142 | } | ||
143 | 140 | ||
144 | radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_CPU); | 141 | radeon_ttm_placement_from_domain(bo, RADEON_GEM_DOMAIN_CPU); |
145 | r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false); | 142 | r = ttm_bo_validate(&bo->tbo, &bo->placement, false, false); |
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index d02aa1d0f588..b292aca0f342 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c | |||
@@ -598,6 +598,10 @@ static void radeon_ttm_tt_unpin_userptr(struct ttm_tt *ttm) | |||
598 | enum dma_data_direction direction = write ? | 598 | enum dma_data_direction direction = write ? |
599 | DMA_BIDIRECTIONAL : DMA_TO_DEVICE; | 599 | DMA_BIDIRECTIONAL : DMA_TO_DEVICE; |
600 | 600 | ||
601 | /* double check that we don't free the table twice */ | ||
602 | if (!ttm->sg->sgl) | ||
603 | return; | ||
604 | |||
601 | /* free the sg table and pages again */ | 605 | /* free the sg table and pages again */ |
602 | dma_unmap_sg(rdev->dev, ttm->sg->sgl, ttm->sg->nents, direction); | 606 | dma_unmap_sg(rdev->dev, ttm->sg->sgl, ttm->sg->nents, direction); |
603 | 607 | ||