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authorJani Nikula <jani.nikula@intel.com>2015-01-16 07:27:27 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2015-01-29 10:57:14 -0500
commit063c86f60ad4064b2cf62041bee8c6389e180b76 (patch)
treeeba21e9c377864825edca6e95150c965f80841d8 /drivers/gpu
parenta2581a9e7cdc6167da779cf149296329371a32be (diff)
drm/i915/dsi: remove intel_dsi_cmd.c and the unused functions therein
The removed functions can be resurrected in intel_dsi.c as need arises. Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-By: Shobhit Kumar <shobhit.kumar@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu')
-rw-r--r--drivers/gpu/drm/i915/Makefile1
-rw-r--r--drivers/gpu/drm/i915/intel_dsi.c1
-rw-r--r--drivers/gpu/drm/i915/intel_dsi_cmd.c117
-rw-r--r--drivers/gpu/drm/i915/intel_dsi_panel_vbt.c1
4 files changed, 0 insertions, 120 deletions
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index c7e2ab59c85e..f01922591679 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -72,7 +72,6 @@ i915-y += dvo_ch7017.o \
72 intel_ddi.o \ 72 intel_ddi.o \
73 intel_dp.o \ 73 intel_dp.o \
74 intel_dp_mst.o \ 74 intel_dp_mst.o \
75 intel_dsi_cmd.o \
76 intel_dsi.o \ 75 intel_dsi.o \
77 intel_dsi_pll.o \ 76 intel_dsi_pll.o \
78 intel_dsi_panel_vbt.o \ 77 intel_dsi_panel_vbt.o \
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 7a75aaf200e3..ef3df5e3d819 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -34,7 +34,6 @@
34#include "i915_drv.h" 34#include "i915_drv.h"
35#include "intel_drv.h" 35#include "intel_drv.h"
36#include "intel_dsi.h" 36#include "intel_dsi.h"
37#include "intel_dsi_cmd.h"
38 37
39static const struct { 38static const struct {
40 u16 panel_id; 39 u16 panel_id;
diff --git a/drivers/gpu/drm/i915/intel_dsi_cmd.c b/drivers/gpu/drm/i915/intel_dsi_cmd.c
deleted file mode 100644
index acdc5da7b46f..000000000000
--- a/drivers/gpu/drm/i915/intel_dsi_cmd.c
+++ /dev/null
@@ -1,117 +0,0 @@
1/*
2 * Copyright © 2013 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Author: Jani Nikula <jani.nikula@intel.com>
24 */
25
26#include <linux/export.h>
27#include <drm/drmP.h>
28#include <drm/drm_crtc.h>
29#include <video/mipi_display.h>
30#include "i915_drv.h"
31#include "intel_drv.h"
32#include "intel_dsi.h"
33#include "intel_dsi_cmd.h"
34
35/*
36 * XXX: MIPI_DATA_ADDRESS, MIPI_DATA_LENGTH, MIPI_COMMAND_LENGTH, and
37 * MIPI_COMMAND_ADDRESS registers.
38 *
39 * Apparently these registers provide a MIPI adapter level way to send (lots of)
40 * commands and data to the receiver, without having to write the commands and
41 * data to MIPI_{HS,LP}_GEN_{CTRL,DATA} registers word by word.
42 *
43 * Presumably for anything other than MIPI_DCS_WRITE_MEMORY_START and
44 * MIPI_DCS_WRITE_MEMORY_CONTINUE (which are used to update the external
45 * framebuffer in command mode displays) these are just an optimization that can
46 * come later.
47 *
48 * For memory writes, these should probably be used for performance.
49 */
50
51static void print_stat(struct intel_dsi *intel_dsi, enum port port)
52{
53 struct drm_encoder *encoder = &intel_dsi->base.base;
54 struct drm_device *dev = encoder->dev;
55 struct drm_i915_private *dev_priv = dev->dev_private;
56 u32 val;
57
58 val = I915_READ(MIPI_INTR_STAT(port));
59
60#define STAT_BIT(val, bit) (val) & (bit) ? " " #bit : ""
61 DRM_DEBUG_KMS("MIPI_INTR_STAT(%c) = %08x"
62 "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s"
63 "\n", port_name(port), val,
64 STAT_BIT(val, TEARING_EFFECT),
65 STAT_BIT(val, SPL_PKT_SENT_INTERRUPT),
66 STAT_BIT(val, GEN_READ_DATA_AVAIL),
67 STAT_BIT(val, LP_GENERIC_WR_FIFO_FULL),
68 STAT_BIT(val, HS_GENERIC_WR_FIFO_FULL),
69 STAT_BIT(val, RX_PROT_VIOLATION),
70 STAT_BIT(val, RX_INVALID_TX_LENGTH),
71 STAT_BIT(val, ACK_WITH_NO_ERROR),
72 STAT_BIT(val, TURN_AROUND_ACK_TIMEOUT),
73 STAT_BIT(val, LP_RX_TIMEOUT),
74 STAT_BIT(val, HS_TX_TIMEOUT),
75 STAT_BIT(val, DPI_FIFO_UNDERRUN),
76 STAT_BIT(val, LOW_CONTENTION),
77 STAT_BIT(val, HIGH_CONTENTION),
78 STAT_BIT(val, TXDSI_VC_ID_INVALID),
79 STAT_BIT(val, TXDSI_DATA_TYPE_NOT_RECOGNISED),
80 STAT_BIT(val, TXCHECKSUM_ERROR),
81 STAT_BIT(val, TXECC_MULTIBIT_ERROR),
82 STAT_BIT(val, TXECC_SINGLE_BIT_ERROR),
83 STAT_BIT(val, TXFALSE_CONTROL_ERROR),
84 STAT_BIT(val, RXDSI_VC_ID_INVALID),
85 STAT_BIT(val, RXDSI_DATA_TYPE_NOT_REGOGNISED),
86 STAT_BIT(val, RXCHECKSUM_ERROR),
87 STAT_BIT(val, RXECC_MULTIBIT_ERROR),
88 STAT_BIT(val, RXECC_SINGLE_BIT_ERROR),
89 STAT_BIT(val, RXFALSE_CONTROL_ERROR),
90 STAT_BIT(val, RXHS_RECEIVE_TIMEOUT_ERROR),
91 STAT_BIT(val, RX_LP_TX_SYNC_ERROR),
92 STAT_BIT(val, RXEXCAPE_MODE_ENTRY_ERROR),
93 STAT_BIT(val, RXEOT_SYNC_ERROR),
94 STAT_BIT(val, RXSOT_SYNC_ERROR),
95 STAT_BIT(val, RXSOT_ERROR));
96#undef STAT_BIT
97}
98
99/* enable or disable command mode hs transmissions */
100void dsi_hs_mode_enable(struct intel_dsi *intel_dsi, bool enable,
101 enum port port)
102{
103 struct drm_encoder *encoder = &intel_dsi->base.base;
104 struct drm_device *dev = encoder->dev;
105 struct drm_i915_private *dev_priv = dev->dev_private;
106 u32 temp;
107 u32 mask = DBI_FIFO_EMPTY;
108
109 if (wait_for((I915_READ(MIPI_GEN_FIFO_STAT(port)) & mask) == mask, 50))
110 DRM_ERROR("Timeout waiting for DBI FIFO empty\n");
111
112 temp = I915_READ(MIPI_HS_LP_DBI_ENABLE(port));
113 temp &= DBI_HS_LP_MODE_MASK;
114 I915_WRITE(MIPI_HS_LP_DBI_ENABLE(port), enable ? DBI_HS_MODE : DBI_LP_MODE);
115
116 intel_dsi->hs = enable;
117}
diff --git a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
index 90b2d0021f8f..d2cd8d5b27a1 100644
--- a/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
+++ b/drivers/gpu/drm/i915/intel_dsi_panel_vbt.c
@@ -36,7 +36,6 @@
36#include "i915_drv.h" 36#include "i915_drv.h"
37#include "intel_drv.h" 37#include "intel_drv.h"
38#include "intel_dsi.h" 38#include "intel_dsi.h"
39#include "intel_dsi_cmd.h"
40 39
41struct vbt_panel { 40struct vbt_panel {
42 struct drm_panel panel; 41 struct drm_panel panel;