diff options
| author | Arto Merilainen <amerilainen@nvidia.com> | 2013-05-29 06:26:08 -0400 |
|---|---|---|
| committer | Thierry Reding <thierry.reding@gmail.com> | 2013-06-22 06:43:55 -0400 |
| commit | ebae30b1fbcc2cc991ce705cc82e16d1e5ddbf51 (patch) | |
| tree | 9a483e8a9ad7b41ef69784afe1b106a6ec168bac /drivers/gpu/host1x | |
| parent | ece66891ff452d5643ac5a61649f632984d83c10 (diff) | |
gpu: host1x: Rework CPU syncpoint increment
This patch merges host1x_syncpt_cpu_incr to host1x_syncpt_incr() as
they are in practise doing the same thing. host1x_syncpt_incr() is
also modified to return error codes. User space interface is modified
accordingly to pass return values.
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Acked-By: Terje Bergstrom <tbergstrom@nvidia.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'drivers/gpu/host1x')
| -rw-r--r-- | drivers/gpu/host1x/dev.h | 8 | ||||
| -rw-r--r-- | drivers/gpu/host1x/drm/drm.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/host1x/hw/cdma_hw.c | 2 | ||||
| -rw-r--r-- | drivers/gpu/host1x/hw/syncpt_hw.c | 12 | ||||
| -rw-r--r-- | drivers/gpu/host1x/syncpt.c | 15 | ||||
| -rw-r--r-- | drivers/gpu/host1x/syncpt.h | 7 |
6 files changed, 15 insertions, 32 deletions
diff --git a/drivers/gpu/host1x/dev.h b/drivers/gpu/host1x/dev.h index a1607d6e135b..790ddf114e58 100644 --- a/drivers/gpu/host1x/dev.h +++ b/drivers/gpu/host1x/dev.h | |||
| @@ -73,7 +73,7 @@ struct host1x_syncpt_ops { | |||
| 73 | void (*restore_wait_base)(struct host1x_syncpt *syncpt); | 73 | void (*restore_wait_base)(struct host1x_syncpt *syncpt); |
| 74 | void (*load_wait_base)(struct host1x_syncpt *syncpt); | 74 | void (*load_wait_base)(struct host1x_syncpt *syncpt); |
| 75 | u32 (*load)(struct host1x_syncpt *syncpt); | 75 | u32 (*load)(struct host1x_syncpt *syncpt); |
| 76 | void (*cpu_incr)(struct host1x_syncpt *syncpt); | 76 | int (*cpu_incr)(struct host1x_syncpt *syncpt); |
| 77 | int (*patch_wait)(struct host1x_syncpt *syncpt, void *patch_addr); | 77 | int (*patch_wait)(struct host1x_syncpt *syncpt, void *patch_addr); |
| 78 | }; | 78 | }; |
| 79 | 79 | ||
| @@ -157,10 +157,10 @@ static inline u32 host1x_hw_syncpt_load(struct host1x *host, | |||
| 157 | return host->syncpt_op->load(sp); | 157 | return host->syncpt_op->load(sp); |
| 158 | } | 158 | } |
| 159 | 159 | ||
| 160 | static inline void host1x_hw_syncpt_cpu_incr(struct host1x *host, | 160 | static inline int host1x_hw_syncpt_cpu_incr(struct host1x *host, |
| 161 | struct host1x_syncpt *sp) | 161 | struct host1x_syncpt *sp) |
| 162 | { | 162 | { |
| 163 | host->syncpt_op->cpu_incr(sp); | 163 | return host->syncpt_op->cpu_incr(sp); |
| 164 | } | 164 | } |
| 165 | 165 | ||
| 166 | static inline int host1x_hw_syncpt_patch_wait(struct host1x *host, | 166 | static inline int host1x_hw_syncpt_patch_wait(struct host1x *host, |
diff --git a/drivers/gpu/host1x/drm/drm.c b/drivers/gpu/host1x/drm/drm.c index c171a07f47bf..e184b00faacd 100644 --- a/drivers/gpu/host1x/drm/drm.c +++ b/drivers/gpu/host1x/drm/drm.c | |||
| @@ -387,8 +387,7 @@ static int tegra_syncpt_incr(struct drm_device *drm, void *data, | |||
| 387 | if (!sp) | 387 | if (!sp) |
| 388 | return -EINVAL; | 388 | return -EINVAL; |
| 389 | 389 | ||
| 390 | host1x_syncpt_incr(sp); | 390 | return host1x_syncpt_incr(sp); |
| 391 | return 0; | ||
| 392 | } | 391 | } |
| 393 | 392 | ||
| 394 | static int tegra_syncpt_wait(struct drm_device *drm, void *data, | 393 | static int tegra_syncpt_wait(struct drm_device *drm, void *data, |
diff --git a/drivers/gpu/host1x/hw/cdma_hw.c b/drivers/gpu/host1x/hw/cdma_hw.c index 590b69d91dab..2ee4ad55c4db 100644 --- a/drivers/gpu/host1x/hw/cdma_hw.c +++ b/drivers/gpu/host1x/hw/cdma_hw.c | |||
| @@ -44,7 +44,7 @@ static void cdma_timeout_cpu_incr(struct host1x_cdma *cdma, u32 getptr, | |||
| 44 | u32 i; | 44 | u32 i; |
| 45 | 45 | ||
| 46 | for (i = 0; i < syncpt_incrs; i++) | 46 | for (i = 0; i < syncpt_incrs; i++) |
| 47 | host1x_syncpt_cpu_incr(cdma->timeout.syncpt); | 47 | host1x_syncpt_incr(cdma->timeout.syncpt); |
| 48 | 48 | ||
| 49 | /* after CPU incr, ensure shadow is up to date */ | 49 | /* after CPU incr, ensure shadow is up to date */ |
| 50 | host1x_syncpt_load(cdma->timeout.syncpt); | 50 | host1x_syncpt_load(cdma->timeout.syncpt); |
diff --git a/drivers/gpu/host1x/hw/syncpt_hw.c b/drivers/gpu/host1x/hw/syncpt_hw.c index 61174990102a..0cf6095d3367 100644 --- a/drivers/gpu/host1x/hw/syncpt_hw.c +++ b/drivers/gpu/host1x/hw/syncpt_hw.c | |||
| @@ -77,21 +77,19 @@ static u32 syncpt_load(struct host1x_syncpt *sp) | |||
| 77 | * Write a cpu syncpoint increment to the hardware, without touching | 77 | * Write a cpu syncpoint increment to the hardware, without touching |
| 78 | * the cache. | 78 | * the cache. |
| 79 | */ | 79 | */ |
| 80 | static void syncpt_cpu_incr(struct host1x_syncpt *sp) | 80 | static int syncpt_cpu_incr(struct host1x_syncpt *sp) |
| 81 | { | 81 | { |
| 82 | struct host1x *host = sp->host; | 82 | struct host1x *host = sp->host; |
| 83 | u32 reg_offset = sp->id / 32; | 83 | u32 reg_offset = sp->id / 32; |
| 84 | 84 | ||
| 85 | if (!host1x_syncpt_client_managed(sp) && | 85 | if (!host1x_syncpt_client_managed(sp) && |
| 86 | host1x_syncpt_idle(sp)) { | 86 | host1x_syncpt_idle(sp)) |
| 87 | dev_err(host->dev, "Trying to increment syncpoint id %d beyond max\n", | 87 | return -EINVAL; |
| 88 | sp->id); | ||
| 89 | host1x_debug_dump(sp->host); | ||
| 90 | return; | ||
| 91 | } | ||
| 92 | host1x_sync_writel(host, BIT_MASK(sp->id), | 88 | host1x_sync_writel(host, BIT_MASK(sp->id), |
| 93 | HOST1X_SYNC_SYNCPT_CPU_INCR(reg_offset)); | 89 | HOST1X_SYNC_SYNCPT_CPU_INCR(reg_offset)); |
| 94 | wmb(); | 90 | wmb(); |
| 91 | |||
| 92 | return 0; | ||
| 95 | } | 93 | } |
| 96 | 94 | ||
| 97 | /* remove a wait pointed to by patch_addr */ | 95 | /* remove a wait pointed to by patch_addr */ |
diff --git a/drivers/gpu/host1x/syncpt.c b/drivers/gpu/host1x/syncpt.c index 27201b51d808..409745b949db 100644 --- a/drivers/gpu/host1x/syncpt.c +++ b/drivers/gpu/host1x/syncpt.c | |||
| @@ -129,22 +129,11 @@ u32 host1x_syncpt_load_wait_base(struct host1x_syncpt *sp) | |||
| 129 | } | 129 | } |
| 130 | 130 | ||
| 131 | /* | 131 | /* |
| 132 | * Write a cpu syncpoint increment to the hardware, without touching | ||
| 133 | * the cache. Caller is responsible for host being powered. | ||
| 134 | */ | ||
| 135 | void host1x_syncpt_cpu_incr(struct host1x_syncpt *sp) | ||
| 136 | { | ||
| 137 | host1x_hw_syncpt_cpu_incr(sp->host, sp); | ||
| 138 | } | ||
| 139 | |||
| 140 | /* | ||
| 141 | * Increment syncpoint value from cpu, updating cache | 132 | * Increment syncpoint value from cpu, updating cache |
| 142 | */ | 133 | */ |
| 143 | void host1x_syncpt_incr(struct host1x_syncpt *sp) | 134 | int host1x_syncpt_incr(struct host1x_syncpt *sp) |
| 144 | { | 135 | { |
| 145 | if (host1x_syncpt_client_managed(sp)) | 136 | return host1x_hw_syncpt_cpu_incr(sp->host, sp); |
| 146 | host1x_syncpt_incr_max(sp, 1); | ||
| 147 | host1x_syncpt_cpu_incr(sp); | ||
| 148 | } | 137 | } |
| 149 | 138 | ||
| 150 | /* | 139 | /* |
diff --git a/drivers/gpu/host1x/syncpt.h b/drivers/gpu/host1x/syncpt.h index d00e758352eb..267c0b9d3647 100644 --- a/drivers/gpu/host1x/syncpt.h +++ b/drivers/gpu/host1x/syncpt.h | |||
| @@ -115,9 +115,6 @@ static inline bool host1x_syncpt_idle(struct host1x_syncpt *sp) | |||
| 115 | /* Return pointer to struct denoting sync point id. */ | 115 | /* Return pointer to struct denoting sync point id. */ |
| 116 | struct host1x_syncpt *host1x_syncpt_get(struct host1x *host, u32 id); | 116 | struct host1x_syncpt *host1x_syncpt_get(struct host1x *host, u32 id); |
| 117 | 117 | ||
| 118 | /* Request incrementing a sync point. */ | ||
| 119 | void host1x_syncpt_cpu_incr(struct host1x_syncpt *sp); | ||
| 120 | |||
| 121 | /* Load current value from hardware to the shadow register. */ | 118 | /* Load current value from hardware to the shadow register. */ |
| 122 | u32 host1x_syncpt_load(struct host1x_syncpt *sp); | 119 | u32 host1x_syncpt_load(struct host1x_syncpt *sp); |
| 123 | 120 | ||
| @@ -133,8 +130,8 @@ void host1x_syncpt_restore(struct host1x *host); | |||
| 133 | /* Read current wait base value into shadow register and return it. */ | 130 | /* Read current wait base value into shadow register and return it. */ |
| 134 | u32 host1x_syncpt_load_wait_base(struct host1x_syncpt *sp); | 131 | u32 host1x_syncpt_load_wait_base(struct host1x_syncpt *sp); |
| 135 | 132 | ||
| 136 | /* Increment sync point and its max. */ | 133 | /* Request incrementing a sync point. */ |
| 137 | void host1x_syncpt_incr(struct host1x_syncpt *sp); | 134 | int host1x_syncpt_incr(struct host1x_syncpt *sp); |
| 138 | 135 | ||
| 139 | /* Indicate future operations by incrementing the sync point max. */ | 136 | /* Indicate future operations by incrementing the sync point max. */ |
| 140 | u32 host1x_syncpt_incr_max(struct host1x_syncpt *sp, u32 incrs); | 137 | u32 host1x_syncpt_incr_max(struct host1x_syncpt *sp, u32 incrs); |
