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authorMatt Roper <matthew.d.roper@intel.com>2014-04-01 18:22:40 -0400
committerRob Clark <robdclark@gmail.com>2014-04-01 20:18:28 -0400
commitf4510a2752b75ad5847b7935b68c233cab497f97 (patch)
tree0104efe442302d22b705f34605070a009cc633c9 /drivers/gpu/drm
parent2d82d188b2cb11b6b221eb84dda2344ef3cd1bb4 (diff)
drm: Replace crtc fb with primary plane fb (v3)
Now that CRTC's have a primary plane, there's no need to track the framebuffer in the CRTC. Replace all references to the CRTC fb with the primary plane's fb. This patch was generated by the Coccinelle semantic patching tool using the following rules: @@ struct drm_crtc C; @@ - (C).fb + C.primary->fb @@ struct drm_crtc *C; @@ - (C)->fb + C->primary->fb v3: Generate patch via coccinelle. Actual removal of crtc->fb has been moved to a subsequent patch. v2: Fixup several lingering crtc->fb instances that were missed in the first patch iteration. [Rob Clark] Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Rob Clark <robdclark@gmail.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/armada/armada_crtc.c23
-rw-r--r--drivers/gpu/drm/ast/ast_mode.c12
-rw-r--r--drivers/gpu/drm/bochs/bochs_kms.c4
-rw-r--r--drivers/gpu/drm/cirrus/cirrus_mode.c10
-rw-r--r--drivers/gpu/drm/drm_crtc.c26
-rw-r--r--drivers/gpu/drm/drm_crtc_helper.c20
-rw-r--r--drivers/gpu/drm/drm_fb_helper.c6
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_crtc.c20
-rw-r--r--drivers/gpu/drm/gma500/cdv_intel_display.c2
-rw-r--r--drivers/gpu/drm/gma500/cdv_intel_dp.c2
-rw-r--r--drivers/gpu/drm/gma500/cdv_intel_hdmi.c2
-rw-r--r--drivers/gpu/drm/gma500/cdv_intel_lvds.c2
-rw-r--r--drivers/gpu/drm/gma500/gma_display.c16
-rw-r--r--drivers/gpu/drm/gma500/mdfld_dsi_output.c2
-rw-r--r--drivers/gpu/drm/gma500/mdfld_intel_display.c16
-rw-r--r--drivers/gpu/drm/gma500/oaktrail_crtc.c12
-rw-r--r--drivers/gpu/drm/gma500/psb_intel_display.c2
-rw-r--r--drivers/gpu/drm/gma500/psb_intel_lvds.c2
-rw-r--r--drivers/gpu/drm/gma500/psb_intel_sdvo.c2
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c4
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c4
-rw-r--r--drivers/gpu/drm/i915/intel_display.c52
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c4
-rw-r--r--drivers/gpu/drm/i915/intel_overlay.c4
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c36
-rw-r--r--drivers/gpu/drm/mgag200/mgag200_mode.c26
-rw-r--r--drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c28
-rw-r--r--drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c22
-rw-r--r--drivers/gpu/drm/nouveau/dispnv04/crtc.c20
-rw-r--r--drivers/gpu/drm/nouveau/dispnv04/dfp.c2
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_display.c8
-rw-r--r--drivers/gpu/drm/nouveau/nv50_display.c17
-rw-r--r--drivers/gpu/drm/omapdrm/omap_crtc.c13
-rw-r--r--drivers/gpu/drm/omapdrm/omap_fb.c2
-rw-r--r--drivers/gpu/drm/qxl/qxl_display.c10
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c20
-rw-r--r--drivers/gpu/drm/radeon/r100.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_connectors.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_display.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_crtc.c16
-rw-r--r--drivers/gpu/drm/rcar-du/rcar_du_crtc.c10
-rw-r--r--drivers/gpu/drm/shmobile/shmob_drm_crtc.c14
-rw-r--r--drivers/gpu/drm/tegra/dc.c16
-rw-r--r--drivers/gpu/drm/tilcdc/tilcdc_crtc.c8
-rw-r--r--drivers/gpu/drm/udl/udl_modeset.c2
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_kms.c14
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c8
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c8
49 files changed, 282 insertions, 279 deletions
diff --git a/drivers/gpu/drm/armada/armada_crtc.c b/drivers/gpu/drm/armada/armada_crtc.c
index d8e398275ca8..5831e4109e75 100644
--- a/drivers/gpu/drm/armada/armada_crtc.c
+++ b/drivers/gpu/drm/armada/armada_crtc.c
@@ -478,11 +478,12 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
478 unsigned i; 478 unsigned i;
479 bool interlaced; 479 bool interlaced;
480 480
481 drm_framebuffer_reference(crtc->fb); 481 drm_framebuffer_reference(crtc->primary->fb);
482 482
483 interlaced = !!(adj->flags & DRM_MODE_FLAG_INTERLACE); 483 interlaced = !!(adj->flags & DRM_MODE_FLAG_INTERLACE);
484 484
485 i = armada_drm_crtc_calc_fb(dcrtc->crtc.fb, x, y, regs, interlaced); 485 i = armada_drm_crtc_calc_fb(dcrtc->crtc.primary->fb,
486 x, y, regs, interlaced);
486 487
487 rm = adj->crtc_hsync_start - adj->crtc_hdisplay; 488 rm = adj->crtc_hsync_start - adj->crtc_hdisplay;
488 lm = adj->crtc_htotal - adj->crtc_hsync_end; 489 lm = adj->crtc_htotal - adj->crtc_hsync_end;
@@ -567,10 +568,10 @@ static int armada_drm_crtc_mode_set(struct drm_crtc *crtc,
567 } 568 }
568 569
569 val = CFG_GRA_ENA | CFG_GRA_HSMOOTH; 570 val = CFG_GRA_ENA | CFG_GRA_HSMOOTH;
570 val |= CFG_GRA_FMT(drm_fb_to_armada_fb(dcrtc->crtc.fb)->fmt); 571 val |= CFG_GRA_FMT(drm_fb_to_armada_fb(dcrtc->crtc.primary->fb)->fmt);
571 val |= CFG_GRA_MOD(drm_fb_to_armada_fb(dcrtc->crtc.fb)->mod); 572 val |= CFG_GRA_MOD(drm_fb_to_armada_fb(dcrtc->crtc.primary->fb)->mod);
572 573
573 if (drm_fb_to_armada_fb(dcrtc->crtc.fb)->fmt > CFG_420) 574 if (drm_fb_to_armada_fb(dcrtc->crtc.primary->fb)->fmt > CFG_420)
574 val |= CFG_PALETTE_ENA; 575 val |= CFG_PALETTE_ENA;
575 576
576 if (interlaced) 577 if (interlaced)
@@ -608,7 +609,7 @@ static int armada_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
608 struct armada_regs regs[4]; 609 struct armada_regs regs[4];
609 unsigned i; 610 unsigned i;
610 611
611 i = armada_drm_crtc_calc_fb(crtc->fb, crtc->x, crtc->y, regs, 612 i = armada_drm_crtc_calc_fb(crtc->primary->fb, crtc->x, crtc->y, regs,
612 dcrtc->interlaced); 613 dcrtc->interlaced);
613 armada_reg_queue_end(regs, i); 614 armada_reg_queue_end(regs, i);
614 615
@@ -616,7 +617,7 @@ static int armada_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
616 wait_event(dcrtc->frame_wait, !dcrtc->frame_work); 617 wait_event(dcrtc->frame_wait, !dcrtc->frame_work);
617 618
618 /* Take a reference to the new fb as we're using it */ 619 /* Take a reference to the new fb as we're using it */
619 drm_framebuffer_reference(crtc->fb); 620 drm_framebuffer_reference(crtc->primary->fb);
620 621
621 /* Update the base in the CRTC */ 622 /* Update the base in the CRTC */
622 armada_drm_crtc_update_regs(dcrtc, regs); 623 armada_drm_crtc_update_regs(dcrtc, regs);
@@ -637,7 +638,7 @@ static void armada_drm_crtc_disable(struct drm_crtc *crtc)
637 struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc); 638 struct armada_crtc *dcrtc = drm_to_armada_crtc(crtc);
638 639
639 armada_drm_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); 640 armada_drm_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
640 armada_drm_crtc_finish_fb(dcrtc, crtc->fb, true); 641 armada_drm_crtc_finish_fb(dcrtc, crtc->primary->fb, true);
641 642
642 /* Power down most RAMs and FIFOs */ 643 /* Power down most RAMs and FIFOs */
643 writel_relaxed(CFG_PDWN256x32 | CFG_PDWN256x24 | CFG_PDWN256x8 | 644 writel_relaxed(CFG_PDWN256x32 | CFG_PDWN256x24 | CFG_PDWN256x8 |
@@ -904,7 +905,7 @@ static int armada_drm_crtc_page_flip(struct drm_crtc *crtc,
904 int ret; 905 int ret;
905 906
906 /* We don't support changing the pixel format */ 907 /* We don't support changing the pixel format */
907 if (fb->pixel_format != crtc->fb->pixel_format) 908 if (fb->pixel_format != crtc->primary->fb->pixel_format)
908 return -EINVAL; 909 return -EINVAL;
909 910
910 work = kmalloc(sizeof(*work), GFP_KERNEL); 911 work = kmalloc(sizeof(*work), GFP_KERNEL);
@@ -912,7 +913,7 @@ static int armada_drm_crtc_page_flip(struct drm_crtc *crtc,
912 return -ENOMEM; 913 return -ENOMEM;
913 914
914 work->event = event; 915 work->event = event;
915 work->old_fb = dcrtc->crtc.fb; 916 work->old_fb = dcrtc->crtc.primary->fb;
916 917
917 i = armada_drm_crtc_calc_fb(fb, crtc->x, crtc->y, work->regs, 918 i = armada_drm_crtc_calc_fb(fb, crtc->x, crtc->y, work->regs,
918 dcrtc->interlaced); 919 dcrtc->interlaced);
@@ -941,7 +942,7 @@ static int armada_drm_crtc_page_flip(struct drm_crtc *crtc,
941 * will _not_ drop that reference on successful return from this 942 * will _not_ drop that reference on successful return from this
942 * function. Simply mark this new framebuffer as the current one. 943 * function. Simply mark this new framebuffer as the current one.
943 */ 944 */
944 dcrtc->crtc.fb = fb; 945 dcrtc->crtc.primary->fb = fb;
945 946
946 /* 947 /*
947 * Finally, if the display is blanked, we won't receive an 948 * Finally, if the display is blanked, we won't receive an
diff --git a/drivers/gpu/drm/ast/ast_mode.c b/drivers/gpu/drm/ast/ast_mode.c
index cca063b11083..a4afdc8bb578 100644
--- a/drivers/gpu/drm/ast/ast_mode.c
+++ b/drivers/gpu/drm/ast/ast_mode.c
@@ -81,7 +81,7 @@ static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct drm_display_mo
81 u32 refresh_rate_index = 0, mode_id, color_index, refresh_rate; 81 u32 refresh_rate_index = 0, mode_id, color_index, refresh_rate;
82 u32 hborder, vborder; 82 u32 hborder, vborder;
83 83
84 switch (crtc->fb->bits_per_pixel) { 84 switch (crtc->primary->fb->bits_per_pixel) {
85 case 8: 85 case 8:
86 vbios_mode->std_table = &vbios_stdtable[VGAModeIndex]; 86 vbios_mode->std_table = &vbios_stdtable[VGAModeIndex];
87 color_index = VGAModeIndex - 1; 87 color_index = VGAModeIndex - 1;
@@ -176,7 +176,7 @@ static bool ast_get_vbios_mode_info(struct drm_crtc *crtc, struct drm_display_mo
176 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff); 176 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x8e, mode_id & 0xff);
177 177
178 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8); 178 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x91, 0xa8);
179 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92, crtc->fb->bits_per_pixel); 179 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x92, crtc->primary->fb->bits_per_pixel);
180 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000); 180 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x93, adjusted_mode->clock / 1000);
181 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay); 181 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x94, adjusted_mode->crtc_hdisplay);
182 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8); 182 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x95, adjusted_mode->crtc_hdisplay >> 8);
@@ -340,7 +340,7 @@ static void ast_set_offset_reg(struct drm_crtc *crtc)
340 340
341 u16 offset; 341 u16 offset;
342 342
343 offset = crtc->fb->pitches[0] >> 3; 343 offset = crtc->primary->fb->pitches[0] >> 3;
344 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff)); 344 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0x13, (offset & 0xff));
345 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f); 345 ast_set_index_reg(ast, AST_IO_CRTC_PORT, 0xb0, (offset >> 8) & 0x3f);
346} 346}
@@ -365,7 +365,7 @@ static void ast_set_ext_reg(struct drm_crtc *crtc, struct drm_display_mode *mode
365 struct ast_private *ast = crtc->dev->dev_private; 365 struct ast_private *ast = crtc->dev->dev_private;
366 u8 jregA0 = 0, jregA3 = 0, jregA8 = 0; 366 u8 jregA0 = 0, jregA3 = 0, jregA8 = 0;
367 367
368 switch (crtc->fb->bits_per_pixel) { 368 switch (crtc->primary->fb->bits_per_pixel) {
369 case 8: 369 case 8:
370 jregA0 = 0x70; 370 jregA0 = 0x70;
371 jregA3 = 0x01; 371 jregA3 = 0x01;
@@ -418,7 +418,7 @@ static void ast_set_sync_reg(struct drm_device *dev, struct drm_display_mode *mo
418static bool ast_set_dac_reg(struct drm_crtc *crtc, struct drm_display_mode *mode, 418static bool ast_set_dac_reg(struct drm_crtc *crtc, struct drm_display_mode *mode,
419 struct ast_vbios_mode_info *vbios_mode) 419 struct ast_vbios_mode_info *vbios_mode)
420{ 420{
421 switch (crtc->fb->bits_per_pixel) { 421 switch (crtc->primary->fb->bits_per_pixel) {
422 case 8: 422 case 8:
423 break; 423 break;
424 default: 424 default:
@@ -490,7 +490,7 @@ static int ast_crtc_do_set_base(struct drm_crtc *crtc,
490 ast_bo_unreserve(bo); 490 ast_bo_unreserve(bo);
491 } 491 }
492 492
493 ast_fb = to_ast_framebuffer(crtc->fb); 493 ast_fb = to_ast_framebuffer(crtc->primary->fb);
494 obj = ast_fb->obj; 494 obj = ast_fb->obj;
495 bo = gem_to_ast_bo(obj); 495 bo = gem_to_ast_bo(obj);
496 496
diff --git a/drivers/gpu/drm/bochs/bochs_kms.c b/drivers/gpu/drm/bochs/bochs_kms.c
index 62ec7d4b3816..dcf2e55f4ae9 100644
--- a/drivers/gpu/drm/bochs/bochs_kms.c
+++ b/drivers/gpu/drm/bochs/bochs_kms.c
@@ -62,10 +62,10 @@ static int bochs_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
62 } 62 }
63 } 63 }
64 64
65 if (WARN_ON(crtc->fb == NULL)) 65 if (WARN_ON(crtc->primary->fb == NULL))
66 return -EINVAL; 66 return -EINVAL;
67 67
68 bochs_fb = to_bochs_framebuffer(crtc->fb); 68 bochs_fb = to_bochs_framebuffer(crtc->primary->fb);
69 bo = gem_to_bochs_bo(bochs_fb->obj); 69 bo = gem_to_bochs_bo(bochs_fb->obj);
70 ret = ttm_bo_reserve(&bo->bo, true, false, false, 0); 70 ret = ttm_bo_reserve(&bo->bo, true, false, false, 0);
71 if (ret) 71 if (ret)
diff --git a/drivers/gpu/drm/cirrus/cirrus_mode.c b/drivers/gpu/drm/cirrus/cirrus_mode.c
index 530f78f84dee..2d64aea83df2 100644
--- a/drivers/gpu/drm/cirrus/cirrus_mode.c
+++ b/drivers/gpu/drm/cirrus/cirrus_mode.c
@@ -149,7 +149,7 @@ static int cirrus_crtc_do_set_base(struct drm_crtc *crtc,
149 cirrus_bo_unreserve(bo); 149 cirrus_bo_unreserve(bo);
150 } 150 }
151 151
152 cirrus_fb = to_cirrus_framebuffer(crtc->fb); 152 cirrus_fb = to_cirrus_framebuffer(crtc->primary->fb);
153 obj = cirrus_fb->obj; 153 obj = cirrus_fb->obj;
154 bo = gem_to_cirrus_bo(obj); 154 bo = gem_to_cirrus_bo(obj);
155 155
@@ -268,7 +268,7 @@ static int cirrus_crtc_mode_set(struct drm_crtc *crtc,
268 sr07 = RREG8(SEQ_DATA); 268 sr07 = RREG8(SEQ_DATA);
269 sr07 &= 0xe0; 269 sr07 &= 0xe0;
270 hdr = 0; 270 hdr = 0;
271 switch (crtc->fb->bits_per_pixel) { 271 switch (crtc->primary->fb->bits_per_pixel) {
272 case 8: 272 case 8:
273 sr07 |= 0x11; 273 sr07 |= 0x11;
274 break; 274 break;
@@ -291,13 +291,13 @@ static int cirrus_crtc_mode_set(struct drm_crtc *crtc,
291 WREG_SEQ(0x7, sr07); 291 WREG_SEQ(0x7, sr07);
292 292
293 /* Program the pitch */ 293 /* Program the pitch */
294 tmp = crtc->fb->pitches[0] / 8; 294 tmp = crtc->primary->fb->pitches[0] / 8;
295 WREG_CRT(VGA_CRTC_OFFSET, tmp); 295 WREG_CRT(VGA_CRTC_OFFSET, tmp);
296 296
297 /* Enable extended blanking and pitch bits, and enable full memory */ 297 /* Enable extended blanking and pitch bits, and enable full memory */
298 tmp = 0x22; 298 tmp = 0x22;
299 tmp |= (crtc->fb->pitches[0] >> 7) & 0x10; 299 tmp |= (crtc->primary->fb->pitches[0] >> 7) & 0x10;
300 tmp |= (crtc->fb->pitches[0] >> 6) & 0x40; 300 tmp |= (crtc->primary->fb->pitches[0] >> 6) & 0x40;
301 WREG_CRT(0x1b, tmp); 301 WREG_CRT(0x1b, tmp);
302 302
303 /* Enable high-colour modes */ 303 /* Enable high-colour modes */
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 110e5ce117f5..18321fb16e8c 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -669,7 +669,7 @@ void drm_framebuffer_remove(struct drm_framebuffer *fb)
669 drm_modeset_lock_all(dev); 669 drm_modeset_lock_all(dev);
670 /* remove from any CRTC */ 670 /* remove from any CRTC */
671 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 671 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
672 if (crtc->fb == fb) { 672 if (crtc->primary->fb == fb) {
673 /* should turn off the crtc */ 673 /* should turn off the crtc */
674 memset(&set, 0, sizeof(struct drm_mode_set)); 674 memset(&set, 0, sizeof(struct drm_mode_set));
675 set.crtc = crtc; 675 set.crtc = crtc;
@@ -1714,8 +1714,8 @@ int drm_mode_getcrtc(struct drm_device *dev,
1714 crtc_resp->x = crtc->x; 1714 crtc_resp->x = crtc->x;
1715 crtc_resp->y = crtc->y; 1715 crtc_resp->y = crtc->y;
1716 crtc_resp->gamma_size = crtc->gamma_size; 1716 crtc_resp->gamma_size = crtc->gamma_size;
1717 if (crtc->fb) 1717 if (crtc->primary->fb)
1718 crtc_resp->fb_id = crtc->fb->base.id; 1718 crtc_resp->fb_id = crtc->primary->fb->base.id;
1719 else 1719 else
1720 crtc_resp->fb_id = 0; 1720 crtc_resp->fb_id = 0;
1721 1721
@@ -2222,7 +2222,7 @@ int drm_mode_set_config_internal(struct drm_mode_set *set)
2222 * crtcs. Atomic modeset will have saner semantics ... 2222 * crtcs. Atomic modeset will have saner semantics ...
2223 */ 2223 */
2224 list_for_each_entry(tmp, &crtc->dev->mode_config.crtc_list, head) 2224 list_for_each_entry(tmp, &crtc->dev->mode_config.crtc_list, head)
2225 tmp->old_fb = tmp->fb; 2225 tmp->old_fb = tmp->primary->fb;
2226 2226
2227 fb = set->fb; 2227 fb = set->fb;
2228 2228
@@ -2231,12 +2231,12 @@ int drm_mode_set_config_internal(struct drm_mode_set *set)
2231 crtc->primary->crtc = crtc; 2231 crtc->primary->crtc = crtc;
2232 2232
2233 /* crtc->fb must be updated by ->set_config, enforces this. */ 2233 /* crtc->fb must be updated by ->set_config, enforces this. */
2234 WARN_ON(fb != crtc->fb); 2234 WARN_ON(fb != crtc->primary->fb);
2235 } 2235 }
2236 2236
2237 list_for_each_entry(tmp, &crtc->dev->mode_config.crtc_list, head) { 2237 list_for_each_entry(tmp, &crtc->dev->mode_config.crtc_list, head) {
2238 if (tmp->fb) 2238 if (tmp->primary->fb)
2239 drm_framebuffer_reference(tmp->fb); 2239 drm_framebuffer_reference(tmp->primary->fb);
2240 if (tmp->old_fb) 2240 if (tmp->old_fb)
2241 drm_framebuffer_unreference(tmp->old_fb); 2241 drm_framebuffer_unreference(tmp->old_fb);
2242 } 2242 }
@@ -2340,12 +2340,12 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
2340 /* If we have a mode we need a framebuffer. */ 2340 /* If we have a mode we need a framebuffer. */
2341 /* If we pass -1, set the mode with the currently bound fb */ 2341 /* If we pass -1, set the mode with the currently bound fb */
2342 if (crtc_req->fb_id == -1) { 2342 if (crtc_req->fb_id == -1) {
2343 if (!crtc->fb) { 2343 if (!crtc->primary->fb) {
2344 DRM_DEBUG_KMS("CRTC doesn't have current FB\n"); 2344 DRM_DEBUG_KMS("CRTC doesn't have current FB\n");
2345 ret = -EINVAL; 2345 ret = -EINVAL;
2346 goto out; 2346 goto out;
2347 } 2347 }
2348 fb = crtc->fb; 2348 fb = crtc->primary->fb;
2349 /* Make refcounting symmetric with the lookup path. */ 2349 /* Make refcounting symmetric with the lookup path. */
2350 drm_framebuffer_reference(fb); 2350 drm_framebuffer_reference(fb);
2351 } else { 2351 } else {
@@ -4139,7 +4139,7 @@ int drm_mode_page_flip_ioctl(struct drm_device *dev,
4139 crtc = obj_to_crtc(obj); 4139 crtc = obj_to_crtc(obj);
4140 4140
4141 mutex_lock(&crtc->mutex); 4141 mutex_lock(&crtc->mutex);
4142 if (crtc->fb == NULL) { 4142 if (crtc->primary->fb == NULL) {
4143 /* The framebuffer is currently unbound, presumably 4143 /* The framebuffer is currently unbound, presumably
4144 * due to a hotplug event, that userspace has not 4144 * due to a hotplug event, that userspace has not
4145 * yet discovered. 4145 * yet discovered.
@@ -4161,7 +4161,7 @@ int drm_mode_page_flip_ioctl(struct drm_device *dev,
4161 if (ret) 4161 if (ret)
4162 goto out; 4162 goto out;
4163 4163
4164 if (crtc->fb->pixel_format != fb->pixel_format) { 4164 if (crtc->primary->fb->pixel_format != fb->pixel_format) {
4165 DRM_DEBUG_KMS("Page flip is not allowed to change frame buffer format.\n"); 4165 DRM_DEBUG_KMS("Page flip is not allowed to change frame buffer format.\n");
4166 ret = -EINVAL; 4166 ret = -EINVAL;
4167 goto out; 4167 goto out;
@@ -4194,7 +4194,7 @@ int drm_mode_page_flip_ioctl(struct drm_device *dev,
4194 (void (*) (struct drm_pending_event *)) kfree; 4194 (void (*) (struct drm_pending_event *)) kfree;
4195 } 4195 }
4196 4196
4197 old_fb = crtc->fb; 4197 old_fb = crtc->primary->fb;
4198 ret = crtc->funcs->page_flip(crtc, fb, e, page_flip->flags); 4198 ret = crtc->funcs->page_flip(crtc, fb, e, page_flip->flags);
4199 if (ret) { 4199 if (ret) {
4200 if (page_flip->flags & DRM_MODE_PAGE_FLIP_EVENT) { 4200 if (page_flip->flags & DRM_MODE_PAGE_FLIP_EVENT) {
@@ -4212,7 +4212,7 @@ int drm_mode_page_flip_ioctl(struct drm_device *dev,
4212 * Failing to do so will screw with the reference counting 4212 * Failing to do so will screw with the reference counting
4213 * on framebuffers. 4213 * on framebuffers.
4214 */ 4214 */
4215 WARN_ON(crtc->fb != fb); 4215 WARN_ON(crtc->primary->fb != fb);
4216 /* Unref only the old framebuffer. */ 4216 /* Unref only the old framebuffer. */
4217 fb = NULL; 4217 fb = NULL;
4218 } 4218 }
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index c0f2d6266070..2dd806b9bcd2 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -309,7 +309,7 @@ static void __drm_helper_disable_unused_functions(struct drm_device *dev)
309 (*crtc_funcs->disable)(crtc); 309 (*crtc_funcs->disable)(crtc);
310 else 310 else
311 (*crtc_funcs->dpms)(crtc, DRM_MODE_DPMS_OFF); 311 (*crtc_funcs->dpms)(crtc, DRM_MODE_DPMS_OFF);
312 crtc->fb = NULL; 312 crtc->primary->fb = NULL;
313 } 313 }
314 } 314 }
315} 315}
@@ -653,19 +653,19 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
653 save_set.mode = &set->crtc->mode; 653 save_set.mode = &set->crtc->mode;
654 save_set.x = set->crtc->x; 654 save_set.x = set->crtc->x;
655 save_set.y = set->crtc->y; 655 save_set.y = set->crtc->y;
656 save_set.fb = set->crtc->fb; 656 save_set.fb = set->crtc->primary->fb;
657 657
658 /* We should be able to check here if the fb has the same properties 658 /* We should be able to check here if the fb has the same properties
659 * and then just flip_or_move it */ 659 * and then just flip_or_move it */
660 if (set->crtc->fb != set->fb) { 660 if (set->crtc->primary->fb != set->fb) {
661 /* If we have no fb then treat it as a full mode set */ 661 /* If we have no fb then treat it as a full mode set */
662 if (set->crtc->fb == NULL) { 662 if (set->crtc->primary->fb == NULL) {
663 DRM_DEBUG_KMS("crtc has no fb, full mode set\n"); 663 DRM_DEBUG_KMS("crtc has no fb, full mode set\n");
664 mode_changed = true; 664 mode_changed = true;
665 } else if (set->fb == NULL) { 665 } else if (set->fb == NULL) {
666 mode_changed = true; 666 mode_changed = true;
667 } else if (set->fb->pixel_format != 667 } else if (set->fb->pixel_format !=
668 set->crtc->fb->pixel_format) { 668 set->crtc->primary->fb->pixel_format) {
669 mode_changed = true; 669 mode_changed = true;
670 } else 670 } else
671 fb_changed = true; 671 fb_changed = true;
@@ -766,13 +766,13 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
766 DRM_DEBUG_KMS("attempting to set mode from" 766 DRM_DEBUG_KMS("attempting to set mode from"
767 " userspace\n"); 767 " userspace\n");
768 drm_mode_debug_printmodeline(set->mode); 768 drm_mode_debug_printmodeline(set->mode);
769 set->crtc->fb = set->fb; 769 set->crtc->primary->fb = set->fb;
770 if (!drm_crtc_helper_set_mode(set->crtc, set->mode, 770 if (!drm_crtc_helper_set_mode(set->crtc, set->mode,
771 set->x, set->y, 771 set->x, set->y,
772 save_set.fb)) { 772 save_set.fb)) {
773 DRM_ERROR("failed to set mode on [CRTC:%d]\n", 773 DRM_ERROR("failed to set mode on [CRTC:%d]\n",
774 set->crtc->base.id); 774 set->crtc->base.id);
775 set->crtc->fb = save_set.fb; 775 set->crtc->primary->fb = save_set.fb;
776 ret = -EINVAL; 776 ret = -EINVAL;
777 goto fail; 777 goto fail;
778 } 778 }
@@ -787,13 +787,13 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
787 } else if (fb_changed) { 787 } else if (fb_changed) {
788 set->crtc->x = set->x; 788 set->crtc->x = set->x;
789 set->crtc->y = set->y; 789 set->crtc->y = set->y;
790 set->crtc->fb = set->fb; 790 set->crtc->primary->fb = set->fb;
791 ret = crtc_funcs->mode_set_base(set->crtc, 791 ret = crtc_funcs->mode_set_base(set->crtc,
792 set->x, set->y, save_set.fb); 792 set->x, set->y, save_set.fb);
793 if (ret != 0) { 793 if (ret != 0) {
794 set->crtc->x = save_set.x; 794 set->crtc->x = save_set.x;
795 set->crtc->y = save_set.y; 795 set->crtc->y = save_set.y;
796 set->crtc->fb = save_set.fb; 796 set->crtc->primary->fb = save_set.fb;
797 goto fail; 797 goto fail;
798 } 798 }
799 } 799 }
@@ -990,7 +990,7 @@ void drm_helper_resume_force_mode(struct drm_device *dev)
990 continue; 990 continue;
991 991
992 ret = drm_crtc_helper_set_mode(crtc, &crtc->mode, 992 ret = drm_crtc_helper_set_mode(crtc, &crtc->mode,
993 crtc->x, crtc->y, crtc->fb); 993 crtc->x, crtc->y, crtc->primary->fb);
994 994
995 /* Restoring the old config should never fail! */ 995 /* Restoring the old config should never fail! */
996 if (ret == false) 996 if (ret == false)
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index f30bf7b723d5..9795c0636da2 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -232,7 +232,7 @@ static struct drm_framebuffer *drm_mode_config_fb(struct drm_crtc *crtc)
232 232
233 list_for_each_entry(c, &dev->mode_config.crtc_list, head) { 233 list_for_each_entry(c, &dev->mode_config.crtc_list, head) {
234 if (crtc->base.id == c->base.id) 234 if (crtc->base.id == c->base.id)
235 return c->fb; 235 return c->primary->fb;
236 } 236 }
237 237
238 return NULL; 238 return NULL;
@@ -366,9 +366,9 @@ static bool drm_fb_helper_is_bound(struct drm_fb_helper *fb_helper)
366 return false; 366 return false;
367 367
368 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 368 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
369 if (crtc->fb) 369 if (crtc->primary->fb)
370 crtcs_bound++; 370 crtcs_bound++;
371 if (crtc->fb == fb_helper->fb) 371 if (crtc->primary->fb == fb_helper->fb)
372 bound++; 372 bound++;
373 } 373 }
374 374
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index 5c9afa198b2f..e930d4fe29c7 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -132,19 +132,19 @@ exynos_drm_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
132 */ 132 */
133 memcpy(&crtc->mode, adjusted_mode, sizeof(*adjusted_mode)); 133 memcpy(&crtc->mode, adjusted_mode, sizeof(*adjusted_mode));
134 134
135 crtc_w = crtc->fb->width - x; 135 crtc_w = crtc->primary->fb->width - x;
136 crtc_h = crtc->fb->height - y; 136 crtc_h = crtc->primary->fb->height - y;
137 137
138 if (manager->ops->mode_set) 138 if (manager->ops->mode_set)
139 manager->ops->mode_set(manager, &crtc->mode); 139 manager->ops->mode_set(manager, &crtc->mode);
140 140
141 ret = exynos_plane_mode_set(plane, crtc, crtc->fb, 0, 0, crtc_w, crtc_h, 141 ret = exynos_plane_mode_set(plane, crtc, crtc->primary->fb, 0, 0, crtc_w, crtc_h,
142 x, y, crtc_w, crtc_h); 142 x, y, crtc_w, crtc_h);
143 if (ret) 143 if (ret)
144 return ret; 144 return ret;
145 145
146 plane->crtc = crtc; 146 plane->crtc = crtc;
147 plane->fb = crtc->fb; 147 plane->fb = crtc->primary->fb;
148 148
149 return 0; 149 return 0;
150} 150}
@@ -164,10 +164,10 @@ static int exynos_drm_crtc_mode_set_commit(struct drm_crtc *crtc, int x, int y,
164 return -EPERM; 164 return -EPERM;
165 } 165 }
166 166
167 crtc_w = crtc->fb->width - x; 167 crtc_w = crtc->primary->fb->width - x;
168 crtc_h = crtc->fb->height - y; 168 crtc_h = crtc->primary->fb->height - y;
169 169
170 ret = exynos_plane_mode_set(plane, crtc, crtc->fb, 0, 0, crtc_w, crtc_h, 170 ret = exynos_plane_mode_set(plane, crtc, crtc->primary->fb, 0, 0, crtc_w, crtc_h,
171 x, y, crtc_w, crtc_h); 171 x, y, crtc_w, crtc_h);
172 if (ret) 172 if (ret)
173 return ret; 173 return ret;
@@ -218,7 +218,7 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
218 struct drm_device *dev = crtc->dev; 218 struct drm_device *dev = crtc->dev;
219 struct exynos_drm_private *dev_priv = dev->dev_private; 219 struct exynos_drm_private *dev_priv = dev->dev_private;
220 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc); 220 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
221 struct drm_framebuffer *old_fb = crtc->fb; 221 struct drm_framebuffer *old_fb = crtc->primary->fb;
222 int ret = -EINVAL; 222 int ret = -EINVAL;
223 223
224 /* when the page flip is requested, crtc's dpms should be on */ 224 /* when the page flip is requested, crtc's dpms should be on */
@@ -249,11 +249,11 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
249 atomic_set(&exynos_crtc->pending_flip, 1); 249 atomic_set(&exynos_crtc->pending_flip, 1);
250 spin_unlock_irq(&dev->event_lock); 250 spin_unlock_irq(&dev->event_lock);
251 251
252 crtc->fb = fb; 252 crtc->primary->fb = fb;
253 ret = exynos_drm_crtc_mode_set_commit(crtc, crtc->x, crtc->y, 253 ret = exynos_drm_crtc_mode_set_commit(crtc, crtc->x, crtc->y,
254 NULL); 254 NULL);
255 if (ret) { 255 if (ret) {
256 crtc->fb = old_fb; 256 crtc->primary->fb = old_fb;
257 257
258 spin_lock_irq(&dev->event_lock); 258 spin_lock_irq(&dev->event_lock);
259 drm_vblank_put(dev, exynos_crtc->pipe); 259 drm_vblank_put(dev, exynos_crtc->pipe);
diff --git a/drivers/gpu/drm/gma500/cdv_intel_display.c b/drivers/gpu/drm/gma500/cdv_intel_display.c
index 7ff91ce3b12a..66727328832d 100644
--- a/drivers/gpu/drm/gma500/cdv_intel_display.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_display.c
@@ -469,7 +469,7 @@ static bool cdv_intel_pipe_enabled(struct drm_device *dev, int pipe)
469 crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 469 crtc = dev_priv->pipe_to_crtc_mapping[pipe];
470 gma_crtc = to_gma_crtc(crtc); 470 gma_crtc = to_gma_crtc(crtc);
471 471
472 if (crtc->fb == NULL || !gma_crtc->active) 472 if (crtc->primary->fb == NULL || !gma_crtc->active)
473 return false; 473 return false;
474 return true; 474 return true;
475} 475}
diff --git a/drivers/gpu/drm/gma500/cdv_intel_dp.c b/drivers/gpu/drm/gma500/cdv_intel_dp.c
index 0490ce36b53f..9ff30c2efadb 100644
--- a/drivers/gpu/drm/gma500/cdv_intel_dp.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_dp.c
@@ -1693,7 +1693,7 @@ done:
1693 struct drm_crtc *crtc = encoder->base.crtc; 1693 struct drm_crtc *crtc = encoder->base.crtc;
1694 drm_crtc_helper_set_mode(crtc, &crtc->mode, 1694 drm_crtc_helper_set_mode(crtc, &crtc->mode,
1695 crtc->x, crtc->y, 1695 crtc->x, crtc->y,
1696 crtc->fb); 1696 crtc->primary->fb);
1697 } 1697 }
1698 1698
1699 return 0; 1699 return 0;
diff --git a/drivers/gpu/drm/gma500/cdv_intel_hdmi.c b/drivers/gpu/drm/gma500/cdv_intel_hdmi.c
index 968b42a5a32b..b99084b3f706 100644
--- a/drivers/gpu/drm/gma500/cdv_intel_hdmi.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_hdmi.c
@@ -192,7 +192,7 @@ static int cdv_hdmi_set_property(struct drm_connector *connector,
192 crtc->saved_mode.vdisplay != 0) { 192 crtc->saved_mode.vdisplay != 0) {
193 if (centre) { 193 if (centre) {
194 if (!drm_crtc_helper_set_mode(encoder->crtc, &crtc->saved_mode, 194 if (!drm_crtc_helper_set_mode(encoder->crtc, &crtc->saved_mode,
195 encoder->crtc->x, encoder->crtc->y, encoder->crtc->fb)) 195 encoder->crtc->x, encoder->crtc->y, encoder->crtc->primary->fb))
196 return -1; 196 return -1;
197 } else { 197 } else {
198 struct drm_encoder_helper_funcs *helpers 198 struct drm_encoder_helper_funcs *helpers
diff --git a/drivers/gpu/drm/gma500/cdv_intel_lvds.c b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
index 66a41c026834..8ecc920fc26d 100644
--- a/drivers/gpu/drm/gma500/cdv_intel_lvds.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_lvds.c
@@ -494,7 +494,7 @@ static int cdv_intel_lvds_set_property(struct drm_connector *connector,
494 &crtc->saved_mode, 494 &crtc->saved_mode,
495 encoder->crtc->x, 495 encoder->crtc->x,
496 encoder->crtc->y, 496 encoder->crtc->y,
497 encoder->crtc->fb)) 497 encoder->crtc->primary->fb))
498 return -1; 498 return -1;
499 } 499 }
500 } else if (!strcmp(property->name, "backlight") && encoder) { 500 } else if (!strcmp(property->name, "backlight") && encoder) {
diff --git a/drivers/gpu/drm/gma500/gma_display.c b/drivers/gpu/drm/gma500/gma_display.c
index d45476b72aad..9bb9bddd881a 100644
--- a/drivers/gpu/drm/gma500/gma_display.c
+++ b/drivers/gpu/drm/gma500/gma_display.c
@@ -59,7 +59,7 @@ int gma_pipe_set_base(struct drm_crtc *crtc, int x, int y,
59 struct drm_device *dev = crtc->dev; 59 struct drm_device *dev = crtc->dev;
60 struct drm_psb_private *dev_priv = dev->dev_private; 60 struct drm_psb_private *dev_priv = dev->dev_private;
61 struct gma_crtc *gma_crtc = to_gma_crtc(crtc); 61 struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
62 struct psb_framebuffer *psbfb = to_psb_fb(crtc->fb); 62 struct psb_framebuffer *psbfb = to_psb_fb(crtc->primary->fb);
63 int pipe = gma_crtc->pipe; 63 int pipe = gma_crtc->pipe;
64 const struct psb_offset *map = &dev_priv->regmap[pipe]; 64 const struct psb_offset *map = &dev_priv->regmap[pipe];
65 unsigned long start, offset; 65 unsigned long start, offset;
@@ -70,7 +70,7 @@ int gma_pipe_set_base(struct drm_crtc *crtc, int x, int y,
70 return 0; 70 return 0;
71 71
72 /* no fb bound */ 72 /* no fb bound */
73 if (!crtc->fb) { 73 if (!crtc->primary->fb) {
74 dev_err(dev->dev, "No FB bound\n"); 74 dev_err(dev->dev, "No FB bound\n");
75 goto gma_pipe_cleaner; 75 goto gma_pipe_cleaner;
76 } 76 }
@@ -81,19 +81,19 @@ int gma_pipe_set_base(struct drm_crtc *crtc, int x, int y,
81 if (ret < 0) 81 if (ret < 0)
82 goto gma_pipe_set_base_exit; 82 goto gma_pipe_set_base_exit;
83 start = psbfb->gtt->offset; 83 start = psbfb->gtt->offset;
84 offset = y * crtc->fb->pitches[0] + x * (crtc->fb->bits_per_pixel / 8); 84 offset = y * crtc->primary->fb->pitches[0] + x * (crtc->primary->fb->bits_per_pixel / 8);
85 85
86 REG_WRITE(map->stride, crtc->fb->pitches[0]); 86 REG_WRITE(map->stride, crtc->primary->fb->pitches[0]);
87 87
88 dspcntr = REG_READ(map->cntr); 88 dspcntr = REG_READ(map->cntr);
89 dspcntr &= ~DISPPLANE_PIXFORMAT_MASK; 89 dspcntr &= ~DISPPLANE_PIXFORMAT_MASK;
90 90
91 switch (crtc->fb->bits_per_pixel) { 91 switch (crtc->primary->fb->bits_per_pixel) {
92 case 8: 92 case 8:
93 dspcntr |= DISPPLANE_8BPP; 93 dspcntr |= DISPPLANE_8BPP;
94 break; 94 break;
95 case 16: 95 case 16:
96 if (crtc->fb->depth == 15) 96 if (crtc->primary->fb->depth == 15)
97 dspcntr |= DISPPLANE_15_16BPP; 97 dspcntr |= DISPPLANE_15_16BPP;
98 else 98 else
99 dspcntr |= DISPPLANE_16BPP; 99 dspcntr |= DISPPLANE_16BPP;
@@ -518,8 +518,8 @@ void gma_crtc_disable(struct drm_crtc *crtc)
518 518
519 crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF); 519 crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
520 520
521 if (crtc->fb) { 521 if (crtc->primary->fb) {
522 gt = to_psb_fb(crtc->fb)->gtt; 522 gt = to_psb_fb(crtc->primary->fb)->gtt;
523 psb_gtt_unpin(gt); 523 psb_gtt_unpin(gt);
524 } 524 }
525} 525}
diff --git a/drivers/gpu/drm/gma500/mdfld_dsi_output.c b/drivers/gpu/drm/gma500/mdfld_dsi_output.c
index 860a4ee9baaf..6e91b20ce2e5 100644
--- a/drivers/gpu/drm/gma500/mdfld_dsi_output.c
+++ b/drivers/gpu/drm/gma500/mdfld_dsi_output.c
@@ -287,7 +287,7 @@ static int mdfld_dsi_connector_set_property(struct drm_connector *connector,
287 &gma_crtc->saved_mode, 287 &gma_crtc->saved_mode,
288 encoder->crtc->x, 288 encoder->crtc->x,
289 encoder->crtc->y, 289 encoder->crtc->y,
290 encoder->crtc->fb)) 290 encoder->crtc->primary->fb))
291 goto set_prop_error; 291 goto set_prop_error;
292 } else { 292 } else {
293 struct drm_encoder_helper_funcs *funcs = 293 struct drm_encoder_helper_funcs *funcs =
diff --git a/drivers/gpu/drm/gma500/mdfld_intel_display.c b/drivers/gpu/drm/gma500/mdfld_intel_display.c
index 321c00a944e9..8cc8a5abbc7b 100644
--- a/drivers/gpu/drm/gma500/mdfld_intel_display.c
+++ b/drivers/gpu/drm/gma500/mdfld_intel_display.c
@@ -166,7 +166,7 @@ static int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
166 struct drm_device *dev = crtc->dev; 166 struct drm_device *dev = crtc->dev;
167 struct drm_psb_private *dev_priv = dev->dev_private; 167 struct drm_psb_private *dev_priv = dev->dev_private;
168 struct gma_crtc *gma_crtc = to_gma_crtc(crtc); 168 struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
169 struct psb_framebuffer *psbfb = to_psb_fb(crtc->fb); 169 struct psb_framebuffer *psbfb = to_psb_fb(crtc->primary->fb);
170 int pipe = gma_crtc->pipe; 170 int pipe = gma_crtc->pipe;
171 const struct psb_offset *map = &dev_priv->regmap[pipe]; 171 const struct psb_offset *map = &dev_priv->regmap[pipe];
172 unsigned long start, offset; 172 unsigned long start, offset;
@@ -178,12 +178,12 @@ static int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
178 dev_dbg(dev->dev, "pipe = 0x%x.\n", pipe); 178 dev_dbg(dev->dev, "pipe = 0x%x.\n", pipe);
179 179
180 /* no fb bound */ 180 /* no fb bound */
181 if (!crtc->fb) { 181 if (!crtc->primary->fb) {
182 dev_dbg(dev->dev, "No FB bound\n"); 182 dev_dbg(dev->dev, "No FB bound\n");
183 return 0; 183 return 0;
184 } 184 }
185 185
186 ret = check_fb(crtc->fb); 186 ret = check_fb(crtc->primary->fb);
187 if (ret) 187 if (ret)
188 return ret; 188 return ret;
189 189
@@ -196,18 +196,18 @@ static int mdfld__intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
196 return 0; 196 return 0;
197 197
198 start = psbfb->gtt->offset; 198 start = psbfb->gtt->offset;
199 offset = y * crtc->fb->pitches[0] + x * (crtc->fb->bits_per_pixel / 8); 199 offset = y * crtc->primary->fb->pitches[0] + x * (crtc->primary->fb->bits_per_pixel / 8);
200 200
201 REG_WRITE(map->stride, crtc->fb->pitches[0]); 201 REG_WRITE(map->stride, crtc->primary->fb->pitches[0]);
202 dspcntr = REG_READ(map->cntr); 202 dspcntr = REG_READ(map->cntr);
203 dspcntr &= ~DISPPLANE_PIXFORMAT_MASK; 203 dspcntr &= ~DISPPLANE_PIXFORMAT_MASK;
204 204
205 switch (crtc->fb->bits_per_pixel) { 205 switch (crtc->primary->fb->bits_per_pixel) {
206 case 8: 206 case 8:
207 dspcntr |= DISPPLANE_8BPP; 207 dspcntr |= DISPPLANE_8BPP;
208 break; 208 break;
209 case 16: 209 case 16:
210 if (crtc->fb->depth == 15) 210 if (crtc->primary->fb->depth == 15)
211 dspcntr |= DISPPLANE_15_16BPP; 211 dspcntr |= DISPPLANE_15_16BPP;
212 else 212 else
213 dspcntr |= DISPPLANE_16BPP; 213 dspcntr |= DISPPLANE_16BPP;
@@ -700,7 +700,7 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,
700 } 700 }
701#endif 701#endif
702 702
703 ret = check_fb(crtc->fb); 703 ret = check_fb(crtc->primary->fb);
704 if (ret) 704 if (ret)
705 return ret; 705 return ret;
706 706
diff --git a/drivers/gpu/drm/gma500/oaktrail_crtc.c b/drivers/gpu/drm/gma500/oaktrail_crtc.c
index 8195e8592107..2de216c2374f 100644
--- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
@@ -599,7 +599,7 @@ static int oaktrail_pipe_set_base(struct drm_crtc *crtc,
599 struct drm_device *dev = crtc->dev; 599 struct drm_device *dev = crtc->dev;
600 struct drm_psb_private *dev_priv = dev->dev_private; 600 struct drm_psb_private *dev_priv = dev->dev_private;
601 struct gma_crtc *gma_crtc = to_gma_crtc(crtc); 601 struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
602 struct psb_framebuffer *psbfb = to_psb_fb(crtc->fb); 602 struct psb_framebuffer *psbfb = to_psb_fb(crtc->primary->fb);
603 int pipe = gma_crtc->pipe; 603 int pipe = gma_crtc->pipe;
604 const struct psb_offset *map = &dev_priv->regmap[pipe]; 604 const struct psb_offset *map = &dev_priv->regmap[pipe];
605 unsigned long start, offset; 605 unsigned long start, offset;
@@ -608,7 +608,7 @@ static int oaktrail_pipe_set_base(struct drm_crtc *crtc,
608 int ret = 0; 608 int ret = 0;
609 609
610 /* no fb bound */ 610 /* no fb bound */
611 if (!crtc->fb) { 611 if (!crtc->primary->fb) {
612 dev_dbg(dev->dev, "No FB bound\n"); 612 dev_dbg(dev->dev, "No FB bound\n");
613 return 0; 613 return 0;
614 } 614 }
@@ -617,19 +617,19 @@ static int oaktrail_pipe_set_base(struct drm_crtc *crtc,
617 return 0; 617 return 0;
618 618
619 start = psbfb->gtt->offset; 619 start = psbfb->gtt->offset;
620 offset = y * crtc->fb->pitches[0] + x * (crtc->fb->bits_per_pixel / 8); 620 offset = y * crtc->primary->fb->pitches[0] + x * (crtc->primary->fb->bits_per_pixel / 8);
621 621
622 REG_WRITE(map->stride, crtc->fb->pitches[0]); 622 REG_WRITE(map->stride, crtc->primary->fb->pitches[0]);
623 623
624 dspcntr = REG_READ(map->cntr); 624 dspcntr = REG_READ(map->cntr);
625 dspcntr &= ~DISPPLANE_PIXFORMAT_MASK; 625 dspcntr &= ~DISPPLANE_PIXFORMAT_MASK;
626 626
627 switch (crtc->fb->bits_per_pixel) { 627 switch (crtc->primary->fb->bits_per_pixel) {
628 case 8: 628 case 8:
629 dspcntr |= DISPPLANE_8BPP; 629 dspcntr |= DISPPLANE_8BPP;
630 break; 630 break;
631 case 16: 631 case 16:
632 if (crtc->fb->depth == 15) 632 if (crtc->primary->fb->depth == 15)
633 dspcntr |= DISPPLANE_15_16BPP; 633 dspcntr |= DISPPLANE_15_16BPP;
634 else 634 else
635 dspcntr |= DISPPLANE_16BPP; 635 dspcntr |= DISPPLANE_16BPP;
diff --git a/drivers/gpu/drm/gma500/psb_intel_display.c b/drivers/gpu/drm/gma500/psb_intel_display.c
index 21aed85eb96e..87b50ba64ed4 100644
--- a/drivers/gpu/drm/gma500/psb_intel_display.c
+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
@@ -120,7 +120,7 @@ static int psb_intel_crtc_mode_set(struct drm_crtc *crtc,
120 const struct gma_limit_t *limit; 120 const struct gma_limit_t *limit;
121 121
122 /* No scan out no play */ 122 /* No scan out no play */
123 if (crtc->fb == NULL) { 123 if (crtc->primary->fb == NULL) {
124 crtc_funcs->mode_set_base(crtc, x, y, old_fb); 124 crtc_funcs->mode_set_base(crtc, x, y, old_fb);
125 return 0; 125 return 0;
126 } 126 }
diff --git a/drivers/gpu/drm/gma500/psb_intel_lvds.c b/drivers/gpu/drm/gma500/psb_intel_lvds.c
index 891a028a0826..d7778d0472c1 100644
--- a/drivers/gpu/drm/gma500/psb_intel_lvds.c
+++ b/drivers/gpu/drm/gma500/psb_intel_lvds.c
@@ -614,7 +614,7 @@ int psb_intel_lvds_set_property(struct drm_connector *connector,
614 &crtc->saved_mode, 614 &crtc->saved_mode,
615 encoder->crtc->x, 615 encoder->crtc->x,
616 encoder->crtc->y, 616 encoder->crtc->y,
617 encoder->crtc->fb)) 617 encoder->crtc->primary->fb))
618 goto set_prop_error; 618 goto set_prop_error;
619 } 619 }
620 } else if (!strcmp(property->name, "backlight")) { 620 } else if (!strcmp(property->name, "backlight")) {
diff --git a/drivers/gpu/drm/gma500/psb_intel_sdvo.c b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
index 681efecb718b..deeb0829b129 100644
--- a/drivers/gpu/drm/gma500/psb_intel_sdvo.c
+++ b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
@@ -1844,7 +1844,7 @@ done:
1844 if (psb_intel_sdvo->base.base.crtc) { 1844 if (psb_intel_sdvo->base.base.crtc) {
1845 struct drm_crtc *crtc = psb_intel_sdvo->base.base.crtc; 1845 struct drm_crtc *crtc = psb_intel_sdvo->base.base.crtc;
1846 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, 1846 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1847 crtc->y, crtc->fb); 1847 crtc->y, crtc->primary->fb);
1848 } 1848 }
1849 1849
1850 return 0; 1850 return 0;
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index a90d31c78643..cacd4974cf23 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2172,8 +2172,8 @@ static void intel_crtc_info(struct seq_file *m, struct intel_crtc *intel_crtc)
2172 struct intel_encoder *intel_encoder; 2172 struct intel_encoder *intel_encoder;
2173 2173
2174 seq_printf(m, "\tfb: %d, pos: %dx%d, size: %dx%d\n", 2174 seq_printf(m, "\tfb: %d, pos: %dx%d, size: %dx%d\n",
2175 crtc->fb->base.id, crtc->x, crtc->y, 2175 crtc->primary->fb->base.id, crtc->x, crtc->y,
2176 crtc->fb->width, crtc->fb->height); 2176 crtc->primary->fb->width, crtc->primary->fb->height);
2177 for_each_encoder_on_crtc(dev, crtc, intel_encoder) 2177 for_each_encoder_on_crtc(dev, crtc, intel_encoder)
2178 intel_encoder_info(m, intel_crtc, intel_encoder); 2178 intel_encoder_info(m, intel_crtc, intel_encoder);
2179} 2179}
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index be2713f12e08..15d5e61eb415 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2367,8 +2367,8 @@ static void __always_unused i915_pageflip_stall_check(struct drm_device *dev, in
2367 } else { 2367 } else {
2368 int dspaddr = DSPADDR(intel_crtc->plane); 2368 int dspaddr = DSPADDR(intel_crtc->plane);
2369 stall_detected = I915_READ(dspaddr) == (i915_gem_obj_ggtt_offset(obj) + 2369 stall_detected = I915_READ(dspaddr) == (i915_gem_obj_ggtt_offset(obj) +
2370 crtc->y * crtc->fb->pitches[0] + 2370 crtc->y * crtc->primary->fb->pitches[0] +
2371 crtc->x * crtc->fb->bits_per_pixel/8); 2371 crtc->x * crtc->primary->fb->bits_per_pixel/8);
2372 } 2372 }
2373 2373
2374 spin_unlock_irqrestore(&dev->event_lock, flags); 2374 spin_unlock_irqrestore(&dev->event_lock, flags);
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index ea66dc2a1b59..3ffe5a6124f1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -744,7 +744,7 @@ bool intel_crtc_active(struct drm_crtc *crtc)
744 * We can ditch the crtc->fb check as soon as we can 744 * We can ditch the crtc->fb check as soon as we can
745 * properly reconstruct framebuffers. 745 * properly reconstruct framebuffers.
746 */ 746 */
747 return intel_crtc->active && crtc->fb && 747 return intel_crtc->active && crtc->primary->fb &&
748 intel_crtc->config.adjusted_mode.crtc_clock; 748 intel_crtc->config.adjusted_mode.crtc_clock;
749} 749}
750 750
@@ -2291,8 +2291,8 @@ void intel_display_handle_reset(struct drm_device *dev)
2291 * disabling them without disabling the entire crtc) allow again 2291 * disabling them without disabling the entire crtc) allow again
2292 * a NULL crtc->fb. 2292 * a NULL crtc->fb.
2293 */ 2293 */
2294 if (intel_crtc->active && crtc->fb) 2294 if (intel_crtc->active && crtc->primary->fb)
2295 dev_priv->display.update_plane(crtc, crtc->fb, 2295 dev_priv->display.update_plane(crtc, crtc->primary->fb,
2296 crtc->x, crtc->y); 2296 crtc->x, crtc->y);
2297 mutex_unlock(&crtc->mutex); 2297 mutex_unlock(&crtc->mutex);
2298 } 2298 }
@@ -2417,8 +2417,8 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
2417 return ret; 2417 return ret;
2418 } 2418 }
2419 2419
2420 old_fb = crtc->fb; 2420 old_fb = crtc->primary->fb;
2421 crtc->fb = fb; 2421 crtc->primary->fb = fb;
2422 crtc->x = x; 2422 crtc->x = x;
2423 crtc->y = y; 2423 crtc->y = y;
2424 2424
@@ -3009,7 +3009,7 @@ static void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc)
3009 struct drm_device *dev = crtc->dev; 3009 struct drm_device *dev = crtc->dev;
3010 struct drm_i915_private *dev_priv = dev->dev_private; 3010 struct drm_i915_private *dev_priv = dev->dev_private;
3011 3011
3012 if (crtc->fb == NULL) 3012 if (crtc->primary->fb == NULL)
3013 return; 3013 return;
3014 3014
3015 WARN_ON(waitqueue_active(&dev_priv->pending_flip_queue)); 3015 WARN_ON(waitqueue_active(&dev_priv->pending_flip_queue));
@@ -3018,7 +3018,7 @@ static void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc)
3018 !intel_crtc_has_pending_flip(crtc)); 3018 !intel_crtc_has_pending_flip(crtc));
3019 3019
3020 mutex_lock(&dev->struct_mutex); 3020 mutex_lock(&dev->struct_mutex);
3021 intel_finish_fb(crtc->fb); 3021 intel_finish_fb(crtc->primary->fb);
3022 mutex_unlock(&dev->struct_mutex); 3022 mutex_unlock(&dev->struct_mutex);
3023} 3023}
3024 3024
@@ -4466,11 +4466,11 @@ static void intel_crtc_disable(struct drm_crtc *crtc)
4466 assert_cursor_disabled(dev_priv, to_intel_crtc(crtc)->pipe); 4466 assert_cursor_disabled(dev_priv, to_intel_crtc(crtc)->pipe);
4467 assert_pipe_disabled(dev->dev_private, to_intel_crtc(crtc)->pipe); 4467 assert_pipe_disabled(dev->dev_private, to_intel_crtc(crtc)->pipe);
4468 4468
4469 if (crtc->fb) { 4469 if (crtc->primary->fb) {
4470 mutex_lock(&dev->struct_mutex); 4470 mutex_lock(&dev->struct_mutex);
4471 intel_unpin_fb_obj(to_intel_framebuffer(crtc->fb)->obj); 4471 intel_unpin_fb_obj(to_intel_framebuffer(crtc->primary->fb)->obj);
4472 mutex_unlock(&dev->struct_mutex); 4472 mutex_unlock(&dev->struct_mutex);
4473 crtc->fb = NULL; 4473 crtc->primary->fb = NULL;
4474 } 4474 }
4475 4475
4476 /* Update computed state. */ 4476 /* Update computed state. */
@@ -8249,7 +8249,7 @@ void intel_mark_idle(struct drm_device *dev)
8249 goto out; 8249 goto out;
8250 8250
8251 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 8251 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
8252 if (!crtc->fb) 8252 if (!crtc->primary->fb)
8253 continue; 8253 continue;
8254 8254
8255 intel_decrease_pllclock(crtc); 8255 intel_decrease_pllclock(crtc);
@@ -8272,10 +8272,10 @@ void intel_mark_fb_busy(struct drm_i915_gem_object *obj,
8272 return; 8272 return;
8273 8273
8274 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 8274 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
8275 if (!crtc->fb) 8275 if (!crtc->primary->fb)
8276 continue; 8276 continue;
8277 8277
8278 if (to_intel_framebuffer(crtc->fb)->obj != obj) 8278 if (to_intel_framebuffer(crtc->primary->fb)->obj != obj)
8279 continue; 8279 continue;
8280 8280
8281 intel_increase_pllclock(crtc); 8281 intel_increase_pllclock(crtc);
@@ -8703,7 +8703,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
8703{ 8703{
8704 struct drm_device *dev = crtc->dev; 8704 struct drm_device *dev = crtc->dev;
8705 struct drm_i915_private *dev_priv = dev->dev_private; 8705 struct drm_i915_private *dev_priv = dev->dev_private;
8706 struct drm_framebuffer *old_fb = crtc->fb; 8706 struct drm_framebuffer *old_fb = crtc->primary->fb;
8707 struct drm_i915_gem_object *obj = to_intel_framebuffer(fb)->obj; 8707 struct drm_i915_gem_object *obj = to_intel_framebuffer(fb)->obj;
8708 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 8708 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
8709 struct intel_unpin_work *work; 8709 struct intel_unpin_work *work;
@@ -8711,7 +8711,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
8711 int ret; 8711 int ret;
8712 8712
8713 /* Can't change pixel format via MI display flips. */ 8713 /* Can't change pixel format via MI display flips. */
8714 if (fb->pixel_format != crtc->fb->pixel_format) 8714 if (fb->pixel_format != crtc->primary->fb->pixel_format)
8715 return -EINVAL; 8715 return -EINVAL;
8716 8716
8717 /* 8717 /*
@@ -8719,8 +8719,8 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
8719 * Note that pitch changes could also affect these register. 8719 * Note that pitch changes could also affect these register.
8720 */ 8720 */
8721 if (INTEL_INFO(dev)->gen > 3 && 8721 if (INTEL_INFO(dev)->gen > 3 &&
8722 (fb->offsets[0] != crtc->fb->offsets[0] || 8722 (fb->offsets[0] != crtc->primary->fb->offsets[0] ||
8723 fb->pitches[0] != crtc->fb->pitches[0])) 8723 fb->pitches[0] != crtc->primary->fb->pitches[0]))
8724 return -EINVAL; 8724 return -EINVAL;
8725 8725
8726 if (i915_terminally_wedged(&dev_priv->gpu_error)) 8726 if (i915_terminally_wedged(&dev_priv->gpu_error))
@@ -8763,7 +8763,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
8763 drm_gem_object_reference(&work->old_fb_obj->base); 8763 drm_gem_object_reference(&work->old_fb_obj->base);
8764 drm_gem_object_reference(&obj->base); 8764 drm_gem_object_reference(&obj->base);
8765 8765
8766 crtc->fb = fb; 8766 crtc->primary->fb = fb;
8767 8767
8768 work->pending_flip_obj = obj; 8768 work->pending_flip_obj = obj;
8769 8769
@@ -8786,7 +8786,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
8786 8786
8787cleanup_pending: 8787cleanup_pending:
8788 atomic_dec(&intel_crtc->unpin_work_count); 8788 atomic_dec(&intel_crtc->unpin_work_count);
8789 crtc->fb = old_fb; 8789 crtc->primary->fb = old_fb;
8790 drm_gem_object_unreference(&work->old_fb_obj->base); 8790 drm_gem_object_unreference(&work->old_fb_obj->base);
8791 drm_gem_object_unreference(&obj->base); 8791 drm_gem_object_unreference(&obj->base);
8792 mutex_unlock(&dev->struct_mutex); 8792 mutex_unlock(&dev->struct_mutex);
@@ -9803,7 +9803,7 @@ static int intel_set_mode(struct drm_crtc *crtc,
9803 9803
9804void intel_crtc_restore_mode(struct drm_crtc *crtc) 9804void intel_crtc_restore_mode(struct drm_crtc *crtc)
9805{ 9805{
9806 intel_set_mode(crtc, &crtc->mode, crtc->x, crtc->y, crtc->fb); 9806 intel_set_mode(crtc, &crtc->mode, crtc->x, crtc->y, crtc->primary->fb);
9807} 9807}
9808 9808
9809#undef for_each_intel_crtc_masked 9809#undef for_each_intel_crtc_masked
@@ -9927,9 +9927,9 @@ intel_set_config_compute_mode_changes(struct drm_mode_set *set,
9927 * and then just flip_or_move it */ 9927 * and then just flip_or_move it */
9928 if (is_crtc_connector_off(set)) { 9928 if (is_crtc_connector_off(set)) {
9929 config->mode_changed = true; 9929 config->mode_changed = true;
9930 } else if (set->crtc->fb != set->fb) { 9930 } else if (set->crtc->primary->fb != set->fb) {
9931 /* If we have no fb then treat it as a full mode set */ 9931 /* If we have no fb then treat it as a full mode set */
9932 if (set->crtc->fb == NULL) { 9932 if (set->crtc->primary->fb == NULL) {
9933 struct intel_crtc *intel_crtc = 9933 struct intel_crtc *intel_crtc =
9934 to_intel_crtc(set->crtc); 9934 to_intel_crtc(set->crtc);
9935 9935
@@ -9943,7 +9943,7 @@ intel_set_config_compute_mode_changes(struct drm_mode_set *set,
9943 } else if (set->fb == NULL) { 9943 } else if (set->fb == NULL) {
9944 config->mode_changed = true; 9944 config->mode_changed = true;
9945 } else if (set->fb->pixel_format != 9945 } else if (set->fb->pixel_format !=
9946 set->crtc->fb->pixel_format) { 9946 set->crtc->primary->fb->pixel_format) {
9947 config->mode_changed = true; 9947 config->mode_changed = true;
9948 } else { 9948 } else {
9949 config->fb_changed = true; 9949 config->fb_changed = true;
@@ -10156,7 +10156,7 @@ static int intel_crtc_set_config(struct drm_mode_set *set)
10156 save_set.mode = &set->crtc->mode; 10156 save_set.mode = &set->crtc->mode;
10157 save_set.x = set->crtc->x; 10157 save_set.x = set->crtc->x;
10158 save_set.y = set->crtc->y; 10158 save_set.y = set->crtc->y;
10159 save_set.fb = set->crtc->fb; 10159 save_set.fb = set->crtc->primary->fb;
10160 10160
10161 /* Compute whether we need a full modeset, only an fb base update or no 10161 /* Compute whether we need a full modeset, only an fb base update or no
10162 * change at all. In the future we might also check whether only the 10162 * change at all. In the future we might also check whether only the
@@ -11473,7 +11473,7 @@ void intel_modeset_setup_hw_state(struct drm_device *dev,
11473 dev_priv->pipe_to_crtc_mapping[pipe]; 11473 dev_priv->pipe_to_crtc_mapping[pipe];
11474 11474
11475 __intel_set_mode(crtc, &crtc->mode, crtc->x, crtc->y, 11475 __intel_set_mode(crtc, &crtc->mode, crtc->x, crtc->y,
11476 crtc->fb); 11476 crtc->primary->fb);
11477 } 11477 }
11478 } else { 11478 } else {
11479 intel_modeset_update_staged_output_state(dev); 11479 intel_modeset_update_staged_output_state(dev);
@@ -11522,7 +11522,7 @@ void intel_modeset_cleanup(struct drm_device *dev)
11522 11522
11523 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 11523 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
11524 /* Skip inactive CRTCs */ 11524 /* Skip inactive CRTCs */
11525 if (!crtc->fb) 11525 if (!crtc->primary->fb)
11526 continue; 11526 continue;
11527 11527
11528 intel_increase_pllclock(crtc); 11528 intel_increase_pllclock(crtc);
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f2833de3f7a9..f2fedc06976b 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1744,7 +1744,7 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
1744 struct drm_i915_private *dev_priv = dev->dev_private; 1744 struct drm_i915_private *dev_priv = dev->dev_private;
1745 struct drm_crtc *crtc = dig_port->base.base.crtc; 1745 struct drm_crtc *crtc = dig_port->base.base.crtc;
1746 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 1746 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1747 struct drm_i915_gem_object *obj = to_intel_framebuffer(crtc->fb)->obj; 1747 struct drm_i915_gem_object *obj = to_intel_framebuffer(crtc->primary->fb)->obj;
1748 struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base; 1748 struct intel_encoder *intel_encoder = &dp_to_dig_port(intel_dp)->base;
1749 1749
1750 dev_priv->psr.source_ok = false; 1750 dev_priv->psr.source_ok = false;
@@ -1777,7 +1777,7 @@ static bool intel_edp_psr_match_conditions(struct intel_dp *intel_dp)
1777 return false; 1777 return false;
1778 } 1778 }
1779 1779
1780 obj = to_intel_framebuffer(crtc->fb)->obj; 1780 obj = to_intel_framebuffer(crtc->primary->fb)->obj;
1781 if (obj->tiling_mode != I915_TILING_X || 1781 if (obj->tiling_mode != I915_TILING_X ||
1782 obj->fence_reg == I915_FENCE_REG_NONE) { 1782 obj->fence_reg == I915_FENCE_REG_NONE) {
1783 DRM_DEBUG_KMS("PSR condition failed: fb not tiled or fenced\n"); 1783 DRM_DEBUG_KMS("PSR condition failed: fb not tiled or fenced\n");
diff --git a/drivers/gpu/drm/i915/intel_overlay.c b/drivers/gpu/drm/i915/intel_overlay.c
index 312961a8472e..623cd328b196 100644
--- a/drivers/gpu/drm/i915/intel_overlay.c
+++ b/drivers/gpu/drm/i915/intel_overlay.c
@@ -606,14 +606,14 @@ static void update_colorkey(struct intel_overlay *overlay,
606{ 606{
607 u32 key = overlay->color_key; 607 u32 key = overlay->color_key;
608 608
609 switch (overlay->crtc->base.fb->bits_per_pixel) { 609 switch (overlay->crtc->base.primary->fb->bits_per_pixel) {
610 case 8: 610 case 8:
611 iowrite32(0, &regs->DCLRKV); 611 iowrite32(0, &regs->DCLRKV);
612 iowrite32(CLK_RGB8I_MASK | DST_KEY_ENABLE, &regs->DCLRKM); 612 iowrite32(CLK_RGB8I_MASK | DST_KEY_ENABLE, &regs->DCLRKM);
613 break; 613 break;
614 614
615 case 16: 615 case 16:
616 if (overlay->crtc->base.fb->depth == 15) { 616 if (overlay->crtc->base.primary->fb->depth == 15) {
617 iowrite32(RGB15_TO_COLORKEY(key), &regs->DCLRKV); 617 iowrite32(RGB15_TO_COLORKEY(key), &regs->DCLRKV);
618 iowrite32(CLK_RGB15_MASK | DST_KEY_ENABLE, 618 iowrite32(CLK_RGB15_MASK | DST_KEY_ENABLE,
619 &regs->DCLRKM); 619 &regs->DCLRKM);
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 66f9565875ff..f070d5d769ce 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -92,7 +92,7 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc)
92{ 92{
93 struct drm_device *dev = crtc->dev; 93 struct drm_device *dev = crtc->dev;
94 struct drm_i915_private *dev_priv = dev->dev_private; 94 struct drm_i915_private *dev_priv = dev->dev_private;
95 struct drm_framebuffer *fb = crtc->fb; 95 struct drm_framebuffer *fb = crtc->primary->fb;
96 struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); 96 struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
97 struct drm_i915_gem_object *obj = intel_fb->obj; 97 struct drm_i915_gem_object *obj = intel_fb->obj;
98 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 98 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
@@ -149,7 +149,7 @@ static void g4x_enable_fbc(struct drm_crtc *crtc)
149{ 149{
150 struct drm_device *dev = crtc->dev; 150 struct drm_device *dev = crtc->dev;
151 struct drm_i915_private *dev_priv = dev->dev_private; 151 struct drm_i915_private *dev_priv = dev->dev_private;
152 struct drm_framebuffer *fb = crtc->fb; 152 struct drm_framebuffer *fb = crtc->primary->fb;
153 struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); 153 struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
154 struct drm_i915_gem_object *obj = intel_fb->obj; 154 struct drm_i915_gem_object *obj = intel_fb->obj;
155 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 155 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
@@ -221,7 +221,7 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc)
221{ 221{
222 struct drm_device *dev = crtc->dev; 222 struct drm_device *dev = crtc->dev;
223 struct drm_i915_private *dev_priv = dev->dev_private; 223 struct drm_i915_private *dev_priv = dev->dev_private;
224 struct drm_framebuffer *fb = crtc->fb; 224 struct drm_framebuffer *fb = crtc->primary->fb;
225 struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); 225 struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
226 struct drm_i915_gem_object *obj = intel_fb->obj; 226 struct drm_i915_gem_object *obj = intel_fb->obj;
227 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 227 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
@@ -277,7 +277,7 @@ static void gen7_enable_fbc(struct drm_crtc *crtc)
277{ 277{
278 struct drm_device *dev = crtc->dev; 278 struct drm_device *dev = crtc->dev;
279 struct drm_i915_private *dev_priv = dev->dev_private; 279 struct drm_i915_private *dev_priv = dev->dev_private;
280 struct drm_framebuffer *fb = crtc->fb; 280 struct drm_framebuffer *fb = crtc->primary->fb;
281 struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb); 281 struct intel_framebuffer *intel_fb = to_intel_framebuffer(fb);
282 struct drm_i915_gem_object *obj = intel_fb->obj; 282 struct drm_i915_gem_object *obj = intel_fb->obj;
283 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 283 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
@@ -336,11 +336,11 @@ static void intel_fbc_work_fn(struct work_struct *__work)
336 /* Double check that we haven't switched fb without cancelling 336 /* Double check that we haven't switched fb without cancelling
337 * the prior work. 337 * the prior work.
338 */ 338 */
339 if (work->crtc->fb == work->fb) { 339 if (work->crtc->primary->fb == work->fb) {
340 dev_priv->display.enable_fbc(work->crtc); 340 dev_priv->display.enable_fbc(work->crtc);
341 341
342 dev_priv->fbc.plane = to_intel_crtc(work->crtc)->plane; 342 dev_priv->fbc.plane = to_intel_crtc(work->crtc)->plane;
343 dev_priv->fbc.fb_id = work->crtc->fb->base.id; 343 dev_priv->fbc.fb_id = work->crtc->primary->fb->base.id;
344 dev_priv->fbc.y = work->crtc->y; 344 dev_priv->fbc.y = work->crtc->y;
345 } 345 }
346 346
@@ -393,7 +393,7 @@ static void intel_enable_fbc(struct drm_crtc *crtc)
393 } 393 }
394 394
395 work->crtc = crtc; 395 work->crtc = crtc;
396 work->fb = crtc->fb; 396 work->fb = crtc->primary->fb;
397 INIT_DELAYED_WORK(&work->work, intel_fbc_work_fn); 397 INIT_DELAYED_WORK(&work->work, intel_fbc_work_fn);
398 398
399 dev_priv->fbc.fbc_work = work; 399 dev_priv->fbc.fbc_work = work;
@@ -499,14 +499,14 @@ void intel_update_fbc(struct drm_device *dev)
499 } 499 }
500 } 500 }
501 501
502 if (!crtc || crtc->fb == NULL) { 502 if (!crtc || crtc->primary->fb == NULL) {
503 if (set_no_fbc_reason(dev_priv, FBC_NO_OUTPUT)) 503 if (set_no_fbc_reason(dev_priv, FBC_NO_OUTPUT))
504 DRM_DEBUG_KMS("no output, disabling\n"); 504 DRM_DEBUG_KMS("no output, disabling\n");
505 goto out_disable; 505 goto out_disable;
506 } 506 }
507 507
508 intel_crtc = to_intel_crtc(crtc); 508 intel_crtc = to_intel_crtc(crtc);
509 fb = crtc->fb; 509 fb = crtc->primary->fb;
510 intel_fb = to_intel_framebuffer(fb); 510 intel_fb = to_intel_framebuffer(fb);
511 obj = intel_fb->obj; 511 obj = intel_fb->obj;
512 adjusted_mode = &intel_crtc->config.adjusted_mode; 512 adjusted_mode = &intel_crtc->config.adjusted_mode;
@@ -1041,7 +1041,7 @@ static void pineview_update_wm(struct drm_crtc *unused_crtc)
1041 crtc = single_enabled_crtc(dev); 1041 crtc = single_enabled_crtc(dev);
1042 if (crtc) { 1042 if (crtc) {
1043 const struct drm_display_mode *adjusted_mode; 1043 const struct drm_display_mode *adjusted_mode;
1044 int pixel_size = crtc->fb->bits_per_pixel / 8; 1044 int pixel_size = crtc->primary->fb->bits_per_pixel / 8;
1045 int clock; 1045 int clock;
1046 1046
1047 adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode; 1047 adjusted_mode = &to_intel_crtc(crtc)->config.adjusted_mode;
@@ -1121,7 +1121,7 @@ static bool g4x_compute_wm0(struct drm_device *dev,
1121 clock = adjusted_mode->crtc_clock; 1121 clock = adjusted_mode->crtc_clock;
1122 htotal = adjusted_mode->crtc_htotal; 1122 htotal = adjusted_mode->crtc_htotal;
1123 hdisplay = to_intel_crtc(crtc)->config.pipe_src_w; 1123 hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
1124 pixel_size = crtc->fb->bits_per_pixel / 8; 1124 pixel_size = crtc->primary->fb->bits_per_pixel / 8;
1125 1125
1126 /* Use the small buffer method to calculate plane watermark */ 1126 /* Use the small buffer method to calculate plane watermark */
1127 entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000; 1127 entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000;
@@ -1208,7 +1208,7 @@ static bool g4x_compute_srwm(struct drm_device *dev,
1208 clock = adjusted_mode->crtc_clock; 1208 clock = adjusted_mode->crtc_clock;
1209 htotal = adjusted_mode->crtc_htotal; 1209 htotal = adjusted_mode->crtc_htotal;
1210 hdisplay = to_intel_crtc(crtc)->config.pipe_src_w; 1210 hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
1211 pixel_size = crtc->fb->bits_per_pixel / 8; 1211 pixel_size = crtc->primary->fb->bits_per_pixel / 8;
1212 1212
1213 line_time_us = max(htotal * 1000 / clock, 1); 1213 line_time_us = max(htotal * 1000 / clock, 1);
1214 line_count = (latency_ns / line_time_us + 1000) / 1000; 1214 line_count = (latency_ns / line_time_us + 1000) / 1000;
@@ -1247,7 +1247,7 @@ static bool vlv_compute_drain_latency(struct drm_device *dev,
1247 return false; 1247 return false;
1248 1248
1249 clock = to_intel_crtc(crtc)->config.adjusted_mode.crtc_clock; 1249 clock = to_intel_crtc(crtc)->config.adjusted_mode.crtc_clock;
1250 pixel_size = crtc->fb->bits_per_pixel / 8; /* BPP */ 1250 pixel_size = crtc->primary->fb->bits_per_pixel / 8; /* BPP */
1251 1251
1252 entries = (clock / 1000) * pixel_size; 1252 entries = (clock / 1000) * pixel_size;
1253 *plane_prec_mult = (entries > 256) ? 1253 *plane_prec_mult = (entries > 256) ?
@@ -1439,7 +1439,7 @@ static void i965_update_wm(struct drm_crtc *unused_crtc)
1439 int clock = adjusted_mode->crtc_clock; 1439 int clock = adjusted_mode->crtc_clock;
1440 int htotal = adjusted_mode->crtc_htotal; 1440 int htotal = adjusted_mode->crtc_htotal;
1441 int hdisplay = to_intel_crtc(crtc)->config.pipe_src_w; 1441 int hdisplay = to_intel_crtc(crtc)->config.pipe_src_w;
1442 int pixel_size = crtc->fb->bits_per_pixel / 8; 1442 int pixel_size = crtc->primary->fb->bits_per_pixel / 8;
1443 unsigned long line_time_us; 1443 unsigned long line_time_us;
1444 int entries; 1444 int entries;
1445 1445
@@ -1512,7 +1512,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
1512 crtc = intel_get_crtc_for_plane(dev, 0); 1512 crtc = intel_get_crtc_for_plane(dev, 0);
1513 if (intel_crtc_active(crtc)) { 1513 if (intel_crtc_active(crtc)) {
1514 const struct drm_display_mode *adjusted_mode; 1514 const struct drm_display_mode *adjusted_mode;
1515 int cpp = crtc->fb->bits_per_pixel / 8; 1515 int cpp = crtc->primary->fb->bits_per_pixel / 8;
1516 if (IS_GEN2(dev)) 1516 if (IS_GEN2(dev))
1517 cpp = 4; 1517 cpp = 4;
1518 1518
@@ -1528,7 +1528,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
1528 crtc = intel_get_crtc_for_plane(dev, 1); 1528 crtc = intel_get_crtc_for_plane(dev, 1);
1529 if (intel_crtc_active(crtc)) { 1529 if (intel_crtc_active(crtc)) {
1530 const struct drm_display_mode *adjusted_mode; 1530 const struct drm_display_mode *adjusted_mode;
1531 int cpp = crtc->fb->bits_per_pixel / 8; 1531 int cpp = crtc->primary->fb->bits_per_pixel / 8;
1532 if (IS_GEN2(dev)) 1532 if (IS_GEN2(dev))
1533 cpp = 4; 1533 cpp = 4;
1534 1534
@@ -1565,7 +1565,7 @@ static void i9xx_update_wm(struct drm_crtc *unused_crtc)
1565 int clock = adjusted_mode->crtc_clock; 1565 int clock = adjusted_mode->crtc_clock;
1566 int htotal = adjusted_mode->crtc_htotal; 1566 int htotal = adjusted_mode->crtc_htotal;
1567 int hdisplay = to_intel_crtc(enabled)->config.pipe_src_w; 1567 int hdisplay = to_intel_crtc(enabled)->config.pipe_src_w;
1568 int pixel_size = enabled->fb->bits_per_pixel / 8; 1568 int pixel_size = enabled->primary->fb->bits_per_pixel / 8;
1569 unsigned long line_time_us; 1569 unsigned long line_time_us;
1570 int entries; 1570 int entries;
1571 1571
@@ -2117,7 +2117,7 @@ static void ilk_compute_wm_parameters(struct drm_crtc *crtc,
2117 if (p->active) { 2117 if (p->active) {
2118 p->pipe_htotal = intel_crtc->config.adjusted_mode.crtc_htotal; 2118 p->pipe_htotal = intel_crtc->config.adjusted_mode.crtc_htotal;
2119 p->pixel_rate = ilk_pipe_pixel_rate(dev, crtc); 2119 p->pixel_rate = ilk_pipe_pixel_rate(dev, crtc);
2120 p->pri.bytes_per_pixel = crtc->fb->bits_per_pixel / 8; 2120 p->pri.bytes_per_pixel = crtc->primary->fb->bits_per_pixel / 8;
2121 p->cur.bytes_per_pixel = 4; 2121 p->cur.bytes_per_pixel = 4;
2122 p->pri.horiz_pixels = intel_crtc->config.pipe_src_w; 2122 p->pri.horiz_pixels = intel_crtc->config.pipe_src_w;
2123 p->cur.horiz_pixels = 64; 2123 p->cur.horiz_pixels = 64;
diff --git a/drivers/gpu/drm/mgag200/mgag200_mode.c b/drivers/gpu/drm/mgag200/mgag200_mode.c
index 968374776db9..a034ed408252 100644
--- a/drivers/gpu/drm/mgag200/mgag200_mode.c
+++ b/drivers/gpu/drm/mgag200/mgag200_mode.c
@@ -29,7 +29,7 @@ static void mga_crtc_load_lut(struct drm_crtc *crtc)
29 struct mga_crtc *mga_crtc = to_mga_crtc(crtc); 29 struct mga_crtc *mga_crtc = to_mga_crtc(crtc);
30 struct drm_device *dev = crtc->dev; 30 struct drm_device *dev = crtc->dev;
31 struct mga_device *mdev = dev->dev_private; 31 struct mga_device *mdev = dev->dev_private;
32 struct drm_framebuffer *fb = crtc->fb; 32 struct drm_framebuffer *fb = crtc->primary->fb;
33 int i; 33 int i;
34 34
35 if (!crtc->enabled) 35 if (!crtc->enabled)
@@ -742,7 +742,7 @@ static int mga_crtc_do_set_base(struct drm_crtc *crtc,
742 mgag200_bo_unreserve(bo); 742 mgag200_bo_unreserve(bo);
743 } 743 }
744 744
745 mga_fb = to_mga_framebuffer(crtc->fb); 745 mga_fb = to_mga_framebuffer(crtc->primary->fb);
746 obj = mga_fb->obj; 746 obj = mga_fb->obj;
747 bo = gem_to_mga_bo(obj); 747 bo = gem_to_mga_bo(obj);
748 748
@@ -805,7 +805,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
805 /* 0x48: */ 0, 0, 0, 0, 0, 0, 0, 0 805 /* 0x48: */ 0, 0, 0, 0, 0, 0, 0, 0
806 }; 806 };
807 807
808 bppshift = mdev->bpp_shifts[(crtc->fb->bits_per_pixel >> 3) - 1]; 808 bppshift = mdev->bpp_shifts[(crtc->primary->fb->bits_per_pixel >> 3) - 1];
809 809
810 switch (mdev->type) { 810 switch (mdev->type) {
811 case G200_SE_A: 811 case G200_SE_A:
@@ -843,12 +843,12 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
843 break; 843 break;
844 } 844 }
845 845
846 switch (crtc->fb->bits_per_pixel) { 846 switch (crtc->primary->fb->bits_per_pixel) {
847 case 8: 847 case 8:
848 dacvalue[MGA1064_MUL_CTL] = MGA1064_MUL_CTL_8bits; 848 dacvalue[MGA1064_MUL_CTL] = MGA1064_MUL_CTL_8bits;
849 break; 849 break;
850 case 16: 850 case 16:
851 if (crtc->fb->depth == 15) 851 if (crtc->primary->fb->depth == 15)
852 dacvalue[MGA1064_MUL_CTL] = MGA1064_MUL_CTL_15bits; 852 dacvalue[MGA1064_MUL_CTL] = MGA1064_MUL_CTL_15bits;
853 else 853 else
854 dacvalue[MGA1064_MUL_CTL] = MGA1064_MUL_CTL_16bits; 854 dacvalue[MGA1064_MUL_CTL] = MGA1064_MUL_CTL_16bits;
@@ -896,8 +896,8 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
896 WREG_SEQ(3, 0); 896 WREG_SEQ(3, 0);
897 WREG_SEQ(4, 0xe); 897 WREG_SEQ(4, 0xe);
898 898
899 pitch = crtc->fb->pitches[0] / (crtc->fb->bits_per_pixel / 8); 899 pitch = crtc->primary->fb->pitches[0] / (crtc->primary->fb->bits_per_pixel / 8);
900 if (crtc->fb->bits_per_pixel == 24) 900 if (crtc->primary->fb->bits_per_pixel == 24)
901 pitch = (pitch * 3) >> (4 - bppshift); 901 pitch = (pitch * 3) >> (4 - bppshift);
902 else 902 else
903 pitch = pitch >> (4 - bppshift); 903 pitch = pitch >> (4 - bppshift);
@@ -974,7 +974,7 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
974 ((vdisplay & 0xc00) >> 7) | 974 ((vdisplay & 0xc00) >> 7) |
975 ((vsyncstart & 0xc00) >> 5) | 975 ((vsyncstart & 0xc00) >> 5) |
976 ((vdisplay & 0x400) >> 3); 976 ((vdisplay & 0x400) >> 3);
977 if (crtc->fb->bits_per_pixel == 24) 977 if (crtc->primary->fb->bits_per_pixel == 24)
978 ext_vga[3] = (((1 << bppshift) * 3) - 1) | 0x80; 978 ext_vga[3] = (((1 << bppshift) * 3) - 1) | 0x80;
979 else 979 else
980 ext_vga[3] = ((1 << bppshift) - 1) | 0x80; 980 ext_vga[3] = ((1 << bppshift) - 1) | 0x80;
@@ -1034,9 +1034,9 @@ static int mga_crtc_mode_set(struct drm_crtc *crtc,
1034 u32 bpp; 1034 u32 bpp;
1035 u32 mb; 1035 u32 mb;
1036 1036
1037 if (crtc->fb->bits_per_pixel > 16) 1037 if (crtc->primary->fb->bits_per_pixel > 16)
1038 bpp = 32; 1038 bpp = 32;
1039 else if (crtc->fb->bits_per_pixel > 8) 1039 else if (crtc->primary->fb->bits_per_pixel > 8)
1040 bpp = 16; 1040 bpp = 16;
1041 else 1041 else
1042 bpp = 8; 1042 bpp = 8;
@@ -1277,8 +1277,8 @@ static void mga_crtc_disable(struct drm_crtc *crtc)
1277 int ret; 1277 int ret;
1278 DRM_DEBUG_KMS("\n"); 1278 DRM_DEBUG_KMS("\n");
1279 mga_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); 1279 mga_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
1280 if (crtc->fb) { 1280 if (crtc->primary->fb) {
1281 struct mga_framebuffer *mga_fb = to_mga_framebuffer(crtc->fb); 1281 struct mga_framebuffer *mga_fb = to_mga_framebuffer(crtc->primary->fb);
1282 struct drm_gem_object *obj = mga_fb->obj; 1282 struct drm_gem_object *obj = mga_fb->obj;
1283 struct mgag200_bo *bo = gem_to_mga_bo(obj); 1283 struct mgag200_bo *bo = gem_to_mga_bo(obj);
1284 ret = mgag200_bo_reserve(bo, false); 1284 ret = mgag200_bo_reserve(bo, false);
@@ -1287,7 +1287,7 @@ static void mga_crtc_disable(struct drm_crtc *crtc)
1287 mgag200_bo_push_sysram(bo); 1287 mgag200_bo_push_sysram(bo);
1288 mgag200_bo_unreserve(bo); 1288 mgag200_bo_unreserve(bo);
1289 } 1289 }
1290 crtc->fb = NULL; 1290 crtc->primary->fb = NULL;
1291} 1291}
1292 1292
1293/* These provide the minimum set of functions required to handle a CRTC */ 1293/* These provide the minimum set of functions required to handle a CRTC */
diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c
index fc1cdfa371ce..3e6c0f3ed592 100644
--- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c
+++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_crtc.c
@@ -120,7 +120,7 @@ static void update_fb(struct drm_crtc *crtc, struct drm_framebuffer *new_fb)
120 120
121 /* grab reference to incoming scanout fb: */ 121 /* grab reference to incoming scanout fb: */
122 drm_framebuffer_reference(new_fb); 122 drm_framebuffer_reference(new_fb);
123 mdp4_crtc->base.fb = new_fb; 123 mdp4_crtc->base.primary->fb = new_fb;
124 mdp4_crtc->fb = new_fb; 124 mdp4_crtc->fb = new_fb;
125 125
126 if (old_fb) 126 if (old_fb)
@@ -182,7 +182,7 @@ static void pageflip_cb(struct msm_fence_cb *cb)
182 struct mdp4_crtc *mdp4_crtc = 182 struct mdp4_crtc *mdp4_crtc =
183 container_of(cb, struct mdp4_crtc, pageflip_cb); 183 container_of(cb, struct mdp4_crtc, pageflip_cb);
184 struct drm_crtc *crtc = &mdp4_crtc->base; 184 struct drm_crtc *crtc = &mdp4_crtc->base;
185 struct drm_framebuffer *fb = crtc->fb; 185 struct drm_framebuffer *fb = crtc->primary->fb;
186 186
187 if (!fb) 187 if (!fb)
188 return; 188 return;
@@ -348,14 +348,14 @@ static int mdp4_crtc_mode_set(struct drm_crtc *crtc,
348 mode->type, mode->flags); 348 mode->type, mode->flags);
349 349
350 /* grab extra ref for update_scanout() */ 350 /* grab extra ref for update_scanout() */
351 drm_framebuffer_reference(crtc->fb); 351 drm_framebuffer_reference(crtc->primary->fb);
352 352
353 ret = mdp4_plane_mode_set(mdp4_crtc->plane, crtc, crtc->fb, 353 ret = mdp4_plane_mode_set(mdp4_crtc->plane, crtc, crtc->primary->fb,
354 0, 0, mode->hdisplay, mode->vdisplay, 354 0, 0, mode->hdisplay, mode->vdisplay,
355 x << 16, y << 16, 355 x << 16, y << 16,
356 mode->hdisplay << 16, mode->vdisplay << 16); 356 mode->hdisplay << 16, mode->vdisplay << 16);
357 if (ret) { 357 if (ret) {
358 drm_framebuffer_unreference(crtc->fb); 358 drm_framebuffer_unreference(crtc->primary->fb);
359 dev_err(crtc->dev->dev, "%s: failed to set mode on plane: %d\n", 359 dev_err(crtc->dev->dev, "%s: failed to set mode on plane: %d\n",
360 mdp4_crtc->name, ret); 360 mdp4_crtc->name, ret);
361 return ret; 361 return ret;
@@ -368,7 +368,7 @@ static int mdp4_crtc_mode_set(struct drm_crtc *crtc,
368 /* take data from pipe: */ 368 /* take data from pipe: */
369 mdp4_write(mdp4_kms, REG_MDP4_DMA_SRC_BASE(dma), 0); 369 mdp4_write(mdp4_kms, REG_MDP4_DMA_SRC_BASE(dma), 0);
370 mdp4_write(mdp4_kms, REG_MDP4_DMA_SRC_STRIDE(dma), 370 mdp4_write(mdp4_kms, REG_MDP4_DMA_SRC_STRIDE(dma),
371 crtc->fb->pitches[0]); 371 crtc->primary->fb->pitches[0]);
372 mdp4_write(mdp4_kms, REG_MDP4_DMA_DST_SIZE(dma), 372 mdp4_write(mdp4_kms, REG_MDP4_DMA_DST_SIZE(dma),
373 MDP4_DMA_DST_SIZE_WIDTH(0) | 373 MDP4_DMA_DST_SIZE_WIDTH(0) |
374 MDP4_DMA_DST_SIZE_HEIGHT(0)); 374 MDP4_DMA_DST_SIZE_HEIGHT(0));
@@ -378,7 +378,7 @@ static int mdp4_crtc_mode_set(struct drm_crtc *crtc,
378 MDP4_OVLP_SIZE_WIDTH(mode->hdisplay) | 378 MDP4_OVLP_SIZE_WIDTH(mode->hdisplay) |
379 MDP4_OVLP_SIZE_HEIGHT(mode->vdisplay)); 379 MDP4_OVLP_SIZE_HEIGHT(mode->vdisplay));
380 mdp4_write(mdp4_kms, REG_MDP4_OVLP_STRIDE(ovlp), 380 mdp4_write(mdp4_kms, REG_MDP4_OVLP_STRIDE(ovlp),
381 crtc->fb->pitches[0]); 381 crtc->primary->fb->pitches[0]);
382 382
383 mdp4_write(mdp4_kms, REG_MDP4_OVLP_CFG(ovlp), 1); 383 mdp4_write(mdp4_kms, REG_MDP4_OVLP_CFG(ovlp), 1);
384 384
@@ -388,8 +388,8 @@ static int mdp4_crtc_mode_set(struct drm_crtc *crtc,
388 mdp4_write(mdp4_kms, REG_MDP4_DMA_E_QUANT(2), 0x00ff0000); 388 mdp4_write(mdp4_kms, REG_MDP4_DMA_E_QUANT(2), 0x00ff0000);
389 } 389 }
390 390
391 update_fb(crtc, crtc->fb); 391 update_fb(crtc, crtc->primary->fb);
392 update_scanout(crtc, crtc->fb); 392 update_scanout(crtc, crtc->primary->fb);
393 393
394 return 0; 394 return 0;
395} 395}
@@ -420,19 +420,19 @@ static int mdp4_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
420 int ret; 420 int ret;
421 421
422 /* grab extra ref for update_scanout() */ 422 /* grab extra ref for update_scanout() */
423 drm_framebuffer_reference(crtc->fb); 423 drm_framebuffer_reference(crtc->primary->fb);
424 424
425 ret = mdp4_plane_mode_set(plane, crtc, crtc->fb, 425 ret = mdp4_plane_mode_set(plane, crtc, crtc->primary->fb,
426 0, 0, mode->hdisplay, mode->vdisplay, 426 0, 0, mode->hdisplay, mode->vdisplay,
427 x << 16, y << 16, 427 x << 16, y << 16,
428 mode->hdisplay << 16, mode->vdisplay << 16); 428 mode->hdisplay << 16, mode->vdisplay << 16);
429 if (ret) { 429 if (ret) {
430 drm_framebuffer_unreference(crtc->fb); 430 drm_framebuffer_unreference(crtc->primary->fb);
431 return ret; 431 return ret;
432 } 432 }
433 433
434 update_fb(crtc, crtc->fb); 434 update_fb(crtc, crtc->primary->fb);
435 update_scanout(crtc, crtc->fb); 435 update_scanout(crtc, crtc->primary->fb);
436 436
437 return 0; 437 return 0;
438} 438}
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
index 54afdb2fc32e..6ea10bdb6e8f 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
@@ -102,7 +102,7 @@ static void update_fb(struct drm_crtc *crtc, struct drm_framebuffer *new_fb)
102 102
103 /* grab reference to incoming scanout fb: */ 103 /* grab reference to incoming scanout fb: */
104 drm_framebuffer_reference(new_fb); 104 drm_framebuffer_reference(new_fb);
105 mdp5_crtc->base.fb = new_fb; 105 mdp5_crtc->base.primary->fb = new_fb;
106 mdp5_crtc->fb = new_fb; 106 mdp5_crtc->fb = new_fb;
107 107
108 if (old_fb) 108 if (old_fb)
@@ -289,14 +289,14 @@ static int mdp5_crtc_mode_set(struct drm_crtc *crtc,
289 mode->type, mode->flags); 289 mode->type, mode->flags);
290 290
291 /* grab extra ref for update_scanout() */ 291 /* grab extra ref for update_scanout() */
292 drm_framebuffer_reference(crtc->fb); 292 drm_framebuffer_reference(crtc->primary->fb);
293 293
294 ret = mdp5_plane_mode_set(mdp5_crtc->plane, crtc, crtc->fb, 294 ret = mdp5_plane_mode_set(mdp5_crtc->plane, crtc, crtc->primary->fb,
295 0, 0, mode->hdisplay, mode->vdisplay, 295 0, 0, mode->hdisplay, mode->vdisplay,
296 x << 16, y << 16, 296 x << 16, y << 16,
297 mode->hdisplay << 16, mode->vdisplay << 16); 297 mode->hdisplay << 16, mode->vdisplay << 16);
298 if (ret) { 298 if (ret) {
299 drm_framebuffer_unreference(crtc->fb); 299 drm_framebuffer_unreference(crtc->primary->fb);
300 dev_err(crtc->dev->dev, "%s: failed to set mode on plane: %d\n", 300 dev_err(crtc->dev->dev, "%s: failed to set mode on plane: %d\n",
301 mdp5_crtc->name, ret); 301 mdp5_crtc->name, ret);
302 return ret; 302 return ret;
@@ -306,8 +306,8 @@ static int mdp5_crtc_mode_set(struct drm_crtc *crtc,
306 MDP5_LM_OUT_SIZE_WIDTH(mode->hdisplay) | 306 MDP5_LM_OUT_SIZE_WIDTH(mode->hdisplay) |
307 MDP5_LM_OUT_SIZE_HEIGHT(mode->vdisplay)); 307 MDP5_LM_OUT_SIZE_HEIGHT(mode->vdisplay));
308 308
309 update_fb(crtc, crtc->fb); 309 update_fb(crtc, crtc->primary->fb);
310 update_scanout(crtc, crtc->fb); 310 update_scanout(crtc, crtc->primary->fb);
311 311
312 return 0; 312 return 0;
313} 313}
@@ -338,19 +338,19 @@ static int mdp5_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
338 int ret; 338 int ret;
339 339
340 /* grab extra ref for update_scanout() */ 340 /* grab extra ref for update_scanout() */
341 drm_framebuffer_reference(crtc->fb); 341 drm_framebuffer_reference(crtc->primary->fb);
342 342
343 ret = mdp5_plane_mode_set(plane, crtc, crtc->fb, 343 ret = mdp5_plane_mode_set(plane, crtc, crtc->primary->fb,
344 0, 0, mode->hdisplay, mode->vdisplay, 344 0, 0, mode->hdisplay, mode->vdisplay,
345 x << 16, y << 16, 345 x << 16, y << 16,
346 mode->hdisplay << 16, mode->vdisplay << 16); 346 mode->hdisplay << 16, mode->vdisplay << 16);
347 if (ret) { 347 if (ret) {
348 drm_framebuffer_unreference(crtc->fb); 348 drm_framebuffer_unreference(crtc->primary->fb);
349 return ret; 349 return ret;
350 } 350 }
351 351
352 update_fb(crtc, crtc->fb); 352 update_fb(crtc, crtc->primary->fb);
353 update_scanout(crtc, crtc->fb); 353 update_scanout(crtc, crtc->primary->fb);
354 354
355 return 0; 355 return 0;
356} 356}
diff --git a/drivers/gpu/drm/nouveau/dispnv04/crtc.c b/drivers/gpu/drm/nouveau/dispnv04/crtc.c
index 1caef1fd139e..41be3424c906 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/crtc.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/crtc.c
@@ -239,7 +239,7 @@ nv_crtc_mode_set_vga(struct drm_crtc *crtc, struct drm_display_mode *mode)
239 struct drm_device *dev = crtc->dev; 239 struct drm_device *dev = crtc->dev;
240 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 240 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
241 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index]; 241 struct nv04_crtc_reg *regp = &nv04_display(dev)->mode_reg.crtc_reg[nv_crtc->index];
242 struct drm_framebuffer *fb = crtc->fb; 242 struct drm_framebuffer *fb = crtc->primary->fb;
243 243
244 /* Calculate our timings */ 244 /* Calculate our timings */
245 int horizDisplay = (mode->crtc_hdisplay >> 3) - 1; 245 int horizDisplay = (mode->crtc_hdisplay >> 3) - 1;
@@ -574,7 +574,7 @@ nv_crtc_mode_set_regs(struct drm_crtc *crtc, struct drm_display_mode * mode)
574 regp->CRTC[NV_CIO_CRE_86] = 0x1; 574 regp->CRTC[NV_CIO_CRE_86] = 0x1;
575 } 575 }
576 576
577 regp->CRTC[NV_CIO_CRE_PIXEL_INDEX] = (crtc->fb->depth + 1) / 8; 577 regp->CRTC[NV_CIO_CRE_PIXEL_INDEX] = (crtc->primary->fb->depth + 1) / 8;
578 /* Enable slaved mode (called MODE_TV in nv4ref.h) */ 578 /* Enable slaved mode (called MODE_TV in nv4ref.h) */
579 if (lvds_output || tmds_output || tv_output) 579 if (lvds_output || tmds_output || tv_output)
580 regp->CRTC[NV_CIO_CRE_PIXEL_INDEX] |= (1 << 7); 580 regp->CRTC[NV_CIO_CRE_PIXEL_INDEX] |= (1 << 7);
@@ -588,7 +588,7 @@ nv_crtc_mode_set_regs(struct drm_crtc *crtc, struct drm_display_mode * mode)
588 regp->ramdac_gen_ctrl = NV_PRAMDAC_GENERAL_CONTROL_BPC_8BITS | 588 regp->ramdac_gen_ctrl = NV_PRAMDAC_GENERAL_CONTROL_BPC_8BITS |
589 NV_PRAMDAC_GENERAL_CONTROL_VGA_STATE_SEL | 589 NV_PRAMDAC_GENERAL_CONTROL_VGA_STATE_SEL |
590 NV_PRAMDAC_GENERAL_CONTROL_PIXMIX_ON; 590 NV_PRAMDAC_GENERAL_CONTROL_PIXMIX_ON;
591 if (crtc->fb->depth == 16) 591 if (crtc->primary->fb->depth == 16)
592 regp->ramdac_gen_ctrl |= NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_SEL; 592 regp->ramdac_gen_ctrl |= NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_SEL;
593 if (nv_device(drm->device)->chipset >= 0x11) 593 if (nv_device(drm->device)->chipset >= 0x11)
594 regp->ramdac_gen_ctrl |= NV_PRAMDAC_GENERAL_CONTROL_PIPE_LONG; 594 regp->ramdac_gen_ctrl |= NV_PRAMDAC_GENERAL_CONTROL_PIPE_LONG;
@@ -609,7 +609,7 @@ static int
609nv_crtc_swap_fbs(struct drm_crtc *crtc, struct drm_framebuffer *old_fb) 609nv_crtc_swap_fbs(struct drm_crtc *crtc, struct drm_framebuffer *old_fb)
610{ 610{
611 struct nv04_display *disp = nv04_display(crtc->dev); 611 struct nv04_display *disp = nv04_display(crtc->dev);
612 struct nouveau_framebuffer *nvfb = nouveau_framebuffer(crtc->fb); 612 struct nouveau_framebuffer *nvfb = nouveau_framebuffer(crtc->primary->fb);
613 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 613 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
614 int ret; 614 int ret;
615 615
@@ -808,7 +808,7 @@ nv_crtc_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b, uint32_t start,
808 * mark the lut values as dirty by setting depth==0, and it'll be 808 * mark the lut values as dirty by setting depth==0, and it'll be
809 * uploaded on the first mode_set_base() 809 * uploaded on the first mode_set_base()
810 */ 810 */
811 if (!nv_crtc->base.fb) { 811 if (!nv_crtc->base.primary->fb) {
812 nv_crtc->lut.depth = 0; 812 nv_crtc->lut.depth = 0;
813 return; 813 return;
814 } 814 }
@@ -832,7 +832,7 @@ nv04_crtc_do_mode_set_base(struct drm_crtc *crtc,
832 NV_DEBUG(drm, "index %d\n", nv_crtc->index); 832 NV_DEBUG(drm, "index %d\n", nv_crtc->index);
833 833
834 /* no fb bound */ 834 /* no fb bound */
835 if (!atomic && !crtc->fb) { 835 if (!atomic && !crtc->primary->fb) {
836 NV_DEBUG(drm, "No FB bound\n"); 836 NV_DEBUG(drm, "No FB bound\n");
837 return 0; 837 return 0;
838 } 838 }
@@ -844,8 +844,8 @@ nv04_crtc_do_mode_set_base(struct drm_crtc *crtc,
844 drm_fb = passed_fb; 844 drm_fb = passed_fb;
845 fb = nouveau_framebuffer(passed_fb); 845 fb = nouveau_framebuffer(passed_fb);
846 } else { 846 } else {
847 drm_fb = crtc->fb; 847 drm_fb = crtc->primary->fb;
848 fb = nouveau_framebuffer(crtc->fb); 848 fb = nouveau_framebuffer(crtc->primary->fb);
849 } 849 }
850 850
851 nv_crtc->fb.offset = fb->nvbo->bo.offset; 851 nv_crtc->fb.offset = fb->nvbo->bo.offset;
@@ -857,9 +857,9 @@ nv04_crtc_do_mode_set_base(struct drm_crtc *crtc,
857 857
858 /* Update the framebuffer format. */ 858 /* Update the framebuffer format. */
859 regp->CRTC[NV_CIO_CRE_PIXEL_INDEX] &= ~3; 859 regp->CRTC[NV_CIO_CRE_PIXEL_INDEX] &= ~3;
860 regp->CRTC[NV_CIO_CRE_PIXEL_INDEX] |= (crtc->fb->depth + 1) / 8; 860 regp->CRTC[NV_CIO_CRE_PIXEL_INDEX] |= (crtc->primary->fb->depth + 1) / 8;
861 regp->ramdac_gen_ctrl &= ~NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_SEL; 861 regp->ramdac_gen_ctrl &= ~NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_SEL;
862 if (crtc->fb->depth == 16) 862 if (crtc->primary->fb->depth == 16)
863 regp->ramdac_gen_ctrl |= NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_SEL; 863 regp->ramdac_gen_ctrl |= NV_PRAMDAC_GENERAL_CONTROL_ALT_MODE_SEL;
864 crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_PIXEL_INDEX); 864 crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_PIXEL_INDEX);
865 NVWriteRAMDAC(dev, nv_crtc->index, NV_PRAMDAC_GENERAL_CONTROL, 865 NVWriteRAMDAC(dev, nv_crtc->index, NV_PRAMDAC_GENERAL_CONTROL,
diff --git a/drivers/gpu/drm/nouveau/dispnv04/dfp.c b/drivers/gpu/drm/nouveau/dispnv04/dfp.c
index 7fdc51e2a571..a2d669b4acf2 100644
--- a/drivers/gpu/drm/nouveau/dispnv04/dfp.c
+++ b/drivers/gpu/drm/nouveau/dispnv04/dfp.c
@@ -415,7 +415,7 @@ static void nv04_dfp_mode_set(struct drm_encoder *encoder,
415 /* Output property. */ 415 /* Output property. */
416 if ((nv_connector->dithering_mode == DITHERING_MODE_ON) || 416 if ((nv_connector->dithering_mode == DITHERING_MODE_ON) ||
417 (nv_connector->dithering_mode == DITHERING_MODE_AUTO && 417 (nv_connector->dithering_mode == DITHERING_MODE_AUTO &&
418 encoder->crtc->fb->depth > connector->display_info.bpc * 3)) { 418 encoder->crtc->primary->fb->depth > connector->display_info.bpc * 3)) {
419 if (nv_device(drm->device)->chipset == 0x11) 419 if (nv_device(drm->device)->chipset == 0x11)
420 regp->dither = savep->dither | 0x00010000; 420 regp->dither = savep->dither | 0x00010000;
421 else { 421 else {
diff --git a/drivers/gpu/drm/nouveau/nouveau_display.c b/drivers/gpu/drm/nouveau/nouveau_display.c
index b1547b032150..3ff030dc1ee3 100644
--- a/drivers/gpu/drm/nouveau/nouveau_display.c
+++ b/drivers/gpu/drm/nouveau/nouveau_display.c
@@ -571,7 +571,7 @@ nouveau_display_suspend(struct drm_device *dev)
571 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 571 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
572 struct nouveau_framebuffer *nouveau_fb; 572 struct nouveau_framebuffer *nouveau_fb;
573 573
574 nouveau_fb = nouveau_framebuffer(crtc->fb); 574 nouveau_fb = nouveau_framebuffer(crtc->primary->fb);
575 if (!nouveau_fb || !nouveau_fb->nvbo) 575 if (!nouveau_fb || !nouveau_fb->nvbo)
576 continue; 576 continue;
577 577
@@ -598,7 +598,7 @@ nouveau_display_repin(struct drm_device *dev)
598 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 598 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
599 struct nouveau_framebuffer *nouveau_fb; 599 struct nouveau_framebuffer *nouveau_fb;
600 600
601 nouveau_fb = nouveau_framebuffer(crtc->fb); 601 nouveau_fb = nouveau_framebuffer(crtc->primary->fb);
602 if (!nouveau_fb || !nouveau_fb->nvbo) 602 if (!nouveau_fb || !nouveau_fb->nvbo)
603 continue; 603 continue;
604 604
@@ -695,7 +695,7 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
695 const int swap_interval = (flags & DRM_MODE_PAGE_FLIP_ASYNC) ? 0 : 1; 695 const int swap_interval = (flags & DRM_MODE_PAGE_FLIP_ASYNC) ? 0 : 1;
696 struct drm_device *dev = crtc->dev; 696 struct drm_device *dev = crtc->dev;
697 struct nouveau_drm *drm = nouveau_drm(dev); 697 struct nouveau_drm *drm = nouveau_drm(dev);
698 struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->fb)->nvbo; 698 struct nouveau_bo *old_bo = nouveau_framebuffer(crtc->primary->fb)->nvbo;
699 struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo; 699 struct nouveau_bo *new_bo = nouveau_framebuffer(fb)->nvbo;
700 struct nouveau_page_flip_state *s; 700 struct nouveau_page_flip_state *s;
701 struct nouveau_channel *chan = drm->channel; 701 struct nouveau_channel *chan = drm->channel;
@@ -769,7 +769,7 @@ nouveau_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
769 goto fail_unreserve; 769 goto fail_unreserve;
770 770
771 /* Update the crtc struct and cleanup */ 771 /* Update the crtc struct and cleanup */
772 crtc->fb = fb; 772 crtc->primary->fb = fb;
773 773
774 nouveau_bo_fence(old_bo, fence); 774 nouveau_bo_fence(old_bo, fence);
775 ttm_bo_unreserve(&old_bo->bo); 775 ttm_bo_unreserve(&old_bo->bo);
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index 2dccafc6e9db..58af547b0b93 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -651,7 +651,7 @@ nv50_crtc_set_dither(struct nouveau_crtc *nv_crtc, bool update)
651 nv_connector = nouveau_crtc_connector_get(nv_crtc); 651 nv_connector = nouveau_crtc_connector_get(nv_crtc);
652 connector = &nv_connector->base; 652 connector = &nv_connector->base;
653 if (nv_connector->dithering_mode == DITHERING_MODE_AUTO) { 653 if (nv_connector->dithering_mode == DITHERING_MODE_AUTO) {
654 if (nv_crtc->base.fb->depth > connector->display_info.bpc * 3) 654 if (nv_crtc->base.primary->fb->depth > connector->display_info.bpc * 3)
655 mode = DITHERING_MODE_DYNAMIC2X2; 655 mode = DITHERING_MODE_DYNAMIC2X2;
656 } else { 656 } else {
657 mode = nv_connector->dithering_mode; 657 mode = nv_connector->dithering_mode;
@@ -785,7 +785,8 @@ nv50_crtc_set_scale(struct nouveau_crtc *nv_crtc, bool update)
785 785
786 if (update) { 786 if (update) {
787 nv50_display_flip_stop(crtc); 787 nv50_display_flip_stop(crtc);
788 nv50_display_flip_next(crtc, crtc->fb, NULL, 1); 788 nv50_display_flip_next(crtc, crtc->primary->fb,
789 NULL, 1);
789 } 790 }
790 } 791 }
791 792
@@ -1028,7 +1029,7 @@ nv50_crtc_commit(struct drm_crtc *crtc)
1028 } 1029 }
1029 1030
1030 nv50_crtc_cursor_show_hide(nv_crtc, nv_crtc->cursor.visible, true); 1031 nv50_crtc_cursor_show_hide(nv_crtc, nv_crtc->cursor.visible, true);
1031 nv50_display_flip_next(crtc, crtc->fb, NULL, 1); 1032 nv50_display_flip_next(crtc, crtc->primary->fb, NULL, 1);
1032} 1033}
1033 1034
1034static bool 1035static bool
@@ -1042,7 +1043,7 @@ nv50_crtc_mode_fixup(struct drm_crtc *crtc, const struct drm_display_mode *mode,
1042static int 1043static int
1043nv50_crtc_swap_fbs(struct drm_crtc *crtc, struct drm_framebuffer *old_fb) 1044nv50_crtc_swap_fbs(struct drm_crtc *crtc, struct drm_framebuffer *old_fb)
1044{ 1045{
1045 struct nouveau_framebuffer *nvfb = nouveau_framebuffer(crtc->fb); 1046 struct nouveau_framebuffer *nvfb = nouveau_framebuffer(crtc->primary->fb);
1046 struct nv50_head *head = nv50_head(crtc); 1047 struct nv50_head *head = nv50_head(crtc);
1047 int ret; 1048 int ret;
1048 1049
@@ -1139,7 +1140,7 @@ nv50_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *umode,
1139 nv50_crtc_set_dither(nv_crtc, false); 1140 nv50_crtc_set_dither(nv_crtc, false);
1140 nv50_crtc_set_scale(nv_crtc, false); 1141 nv50_crtc_set_scale(nv_crtc, false);
1141 nv50_crtc_set_color_vibrance(nv_crtc, false); 1142 nv50_crtc_set_color_vibrance(nv_crtc, false);
1142 nv50_crtc_set_image(nv_crtc, crtc->fb, x, y, false); 1143 nv50_crtc_set_image(nv_crtc, crtc->primary->fb, x, y, false);
1143 return 0; 1144 return 0;
1144} 1145}
1145 1146
@@ -1151,7 +1152,7 @@ nv50_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
1151 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc); 1152 struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
1152 int ret; 1153 int ret;
1153 1154
1154 if (!crtc->fb) { 1155 if (!crtc->primary->fb) {
1155 NV_DEBUG(drm, "No FB bound\n"); 1156 NV_DEBUG(drm, "No FB bound\n");
1156 return 0; 1157 return 0;
1157 } 1158 }
@@ -1161,8 +1162,8 @@ nv50_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
1161 return ret; 1162 return ret;
1162 1163
1163 nv50_display_flip_stop(crtc); 1164 nv50_display_flip_stop(crtc);
1164 nv50_crtc_set_image(nv_crtc, crtc->fb, x, y, true); 1165 nv50_crtc_set_image(nv_crtc, crtc->primary->fb, x, y, true);
1165 nv50_display_flip_next(crtc, crtc->fb, NULL, 1); 1166 nv50_display_flip_next(crtc, crtc->primary->fb, NULL, 1);
1166 return 0; 1167 return 0;
1167} 1168}
1168 1169
diff --git a/drivers/gpu/drm/omapdrm/omap_crtc.c b/drivers/gpu/drm/omapdrm/omap_crtc.c
index 4313bb0a49a6..355157e4f78d 100644
--- a/drivers/gpu/drm/omapdrm/omap_crtc.c
+++ b/drivers/gpu/drm/omapdrm/omap_crtc.c
@@ -245,7 +245,7 @@ static int omap_crtc_mode_set(struct drm_crtc *crtc,
245 copy_timings_drm_to_omap(&omap_crtc->timings, mode); 245 copy_timings_drm_to_omap(&omap_crtc->timings, mode);
246 omap_crtc->full_update = true; 246 omap_crtc->full_update = true;
247 247
248 return omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb, 248 return omap_plane_mode_set(omap_crtc->plane, crtc, crtc->primary->fb,
249 0, 0, mode->hdisplay, mode->vdisplay, 249 0, 0, mode->hdisplay, mode->vdisplay,
250 x << 16, y << 16, 250 x << 16, y << 16,
251 mode->hdisplay << 16, mode->vdisplay << 16, 251 mode->hdisplay << 16, mode->vdisplay << 16,
@@ -273,7 +273,7 @@ static int omap_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
273 struct drm_plane *plane = omap_crtc->plane; 273 struct drm_plane *plane = omap_crtc->plane;
274 struct drm_display_mode *mode = &crtc->mode; 274 struct drm_display_mode *mode = &crtc->mode;
275 275
276 return omap_plane_mode_set(plane, crtc, crtc->fb, 276 return omap_plane_mode_set(plane, crtc, crtc->primary->fb,
277 0, 0, mode->hdisplay, mode->vdisplay, 277 0, 0, mode->hdisplay, mode->vdisplay,
278 x << 16, y << 16, 278 x << 16, y << 16,
279 mode->hdisplay << 16, mode->vdisplay << 16, 279 mode->hdisplay << 16, mode->vdisplay << 16,
@@ -308,14 +308,14 @@ static void page_flip_worker(struct work_struct *work)
308 struct drm_gem_object *bo; 308 struct drm_gem_object *bo;
309 309
310 mutex_lock(&crtc->mutex); 310 mutex_lock(&crtc->mutex);
311 omap_plane_mode_set(omap_crtc->plane, crtc, crtc->fb, 311 omap_plane_mode_set(omap_crtc->plane, crtc, crtc->primary->fb,
312 0, 0, mode->hdisplay, mode->vdisplay, 312 0, 0, mode->hdisplay, mode->vdisplay,
313 crtc->x << 16, crtc->y << 16, 313 crtc->x << 16, crtc->y << 16,
314 mode->hdisplay << 16, mode->vdisplay << 16, 314 mode->hdisplay << 16, mode->vdisplay << 16,
315 vblank_cb, crtc); 315 vblank_cb, crtc);
316 mutex_unlock(&crtc->mutex); 316 mutex_unlock(&crtc->mutex);
317 317
318 bo = omap_framebuffer_bo(crtc->fb, 0); 318 bo = omap_framebuffer_bo(crtc->primary->fb, 0);
319 drm_gem_object_unreference_unlocked(bo); 319 drm_gem_object_unreference_unlocked(bo);
320} 320}
321 321
@@ -336,9 +336,10 @@ static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
336{ 336{
337 struct drm_device *dev = crtc->dev; 337 struct drm_device *dev = crtc->dev;
338 struct omap_crtc *omap_crtc = to_omap_crtc(crtc); 338 struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
339 struct drm_plane *primary = crtc->primary;
339 struct drm_gem_object *bo; 340 struct drm_gem_object *bo;
340 341
341 DBG("%d -> %d (event=%p)", crtc->fb ? crtc->fb->base.id : -1, 342 DBG("%d -> %d (event=%p)", primary->fb ? primary->fb->base.id : -1,
342 fb->base.id, event); 343 fb->base.id, event);
343 344
344 if (omap_crtc->old_fb) { 345 if (omap_crtc->old_fb) {
@@ -347,7 +348,7 @@ static int omap_crtc_page_flip_locked(struct drm_crtc *crtc,
347 } 348 }
348 349
349 omap_crtc->event = event; 350 omap_crtc->event = event;
350 crtc->fb = fb; 351 primary->fb = fb;
351 352
352 /* 353 /*
353 * Hold a reference temporarily until the crtc is updated 354 * Hold a reference temporarily until the crtc is updated
diff --git a/drivers/gpu/drm/omapdrm/omap_fb.c b/drivers/gpu/drm/omapdrm/omap_fb.c
index f466c4aaee94..0d5e9b7e8bbf 100644
--- a/drivers/gpu/drm/omapdrm/omap_fb.c
+++ b/drivers/gpu/drm/omapdrm/omap_fb.c
@@ -312,7 +312,7 @@ struct drm_connector *omap_framebuffer_get_next_connector(
312 if (connector != from) { 312 if (connector != from) {
313 struct drm_encoder *encoder = connector->encoder; 313 struct drm_encoder *encoder = connector->encoder;
314 struct drm_crtc *crtc = encoder ? encoder->crtc : NULL; 314 struct drm_crtc *crtc = encoder ? encoder->crtc : NULL;
315 if (crtc && crtc->fb == fb) 315 if (crtc && crtc->primary->fb == fb)
316 return connector; 316 return connector;
317 317
318 } 318 }
diff --git a/drivers/gpu/drm/qxl/qxl_display.c b/drivers/gpu/drm/qxl/qxl_display.c
index 798bde2e5881..41bdd174657e 100644
--- a/drivers/gpu/drm/qxl/qxl_display.c
+++ b/drivers/gpu/drm/qxl/qxl_display.c
@@ -527,7 +527,7 @@ static int qxl_crtc_mode_set(struct drm_crtc *crtc,
527 bool recreate_primary = false; 527 bool recreate_primary = false;
528 int ret; 528 int ret;
529 int surf_id; 529 int surf_id;
530 if (!crtc->fb) { 530 if (!crtc->primary->fb) {
531 DRM_DEBUG_KMS("No FB bound\n"); 531 DRM_DEBUG_KMS("No FB bound\n");
532 return 0; 532 return 0;
533 } 533 }
@@ -536,7 +536,7 @@ static int qxl_crtc_mode_set(struct drm_crtc *crtc,
536 qfb = to_qxl_framebuffer(old_fb); 536 qfb = to_qxl_framebuffer(old_fb);
537 old_bo = gem_to_qxl_bo(qfb->obj); 537 old_bo = gem_to_qxl_bo(qfb->obj);
538 } 538 }
539 qfb = to_qxl_framebuffer(crtc->fb); 539 qfb = to_qxl_framebuffer(crtc->primary->fb);
540 bo = gem_to_qxl_bo(qfb->obj); 540 bo = gem_to_qxl_bo(qfb->obj);
541 if (!m) 541 if (!m)
542 /* and do we care? */ 542 /* and do we care? */
@@ -609,14 +609,14 @@ static void qxl_crtc_disable(struct drm_crtc *crtc)
609 struct qxl_crtc *qcrtc = to_qxl_crtc(crtc); 609 struct qxl_crtc *qcrtc = to_qxl_crtc(crtc);
610 struct drm_device *dev = crtc->dev; 610 struct drm_device *dev = crtc->dev;
611 struct qxl_device *qdev = dev->dev_private; 611 struct qxl_device *qdev = dev->dev_private;
612 if (crtc->fb) { 612 if (crtc->primary->fb) {
613 struct qxl_framebuffer *qfb = to_qxl_framebuffer(crtc->fb); 613 struct qxl_framebuffer *qfb = to_qxl_framebuffer(crtc->primary->fb);
614 struct qxl_bo *bo = gem_to_qxl_bo(qfb->obj); 614 struct qxl_bo *bo = gem_to_qxl_bo(qfb->obj);
615 int ret; 615 int ret;
616 ret = qxl_bo_reserve(bo, false); 616 ret = qxl_bo_reserve(bo, false);
617 qxl_bo_unpin(bo); 617 qxl_bo_unpin(bo);
618 qxl_bo_unreserve(bo); 618 qxl_bo_unreserve(bo);
619 crtc->fb = NULL; 619 crtc->primary->fb = NULL;
620 } 620 }
621 621
622 qxl_monitors_config_set(qdev, qcrtc->index, 0, 0, 0, 0, 0); 622 qxl_monitors_config_set(qdev, qcrtc->index, 0, 0, 0, 0, 0);
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index daa4dd375ab1..fb187c78978f 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1106,7 +1106,7 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
1106 int r; 1106 int r;
1107 1107
1108 /* no fb bound */ 1108 /* no fb bound */
1109 if (!atomic && !crtc->fb) { 1109 if (!atomic && !crtc->primary->fb) {
1110 DRM_DEBUG_KMS("No FB bound\n"); 1110 DRM_DEBUG_KMS("No FB bound\n");
1111 return 0; 1111 return 0;
1112 } 1112 }
@@ -1116,8 +1116,8 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
1116 target_fb = fb; 1116 target_fb = fb;
1117 } 1117 }
1118 else { 1118 else {
1119 radeon_fb = to_radeon_framebuffer(crtc->fb); 1119 radeon_fb = to_radeon_framebuffer(crtc->primary->fb);
1120 target_fb = crtc->fb; 1120 target_fb = crtc->primary->fb;
1121 } 1121 }
1122 1122
1123 /* If atomic, assume fb object is pinned & idle & fenced and 1123 /* If atomic, assume fb object is pinned & idle & fenced and
@@ -1316,7 +1316,7 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
1316 /* set pageflip to happen anywhere in vblank interval */ 1316 /* set pageflip to happen anywhere in vblank interval */
1317 WREG32(EVERGREEN_MASTER_UPDATE_MODE + radeon_crtc->crtc_offset, 0); 1317 WREG32(EVERGREEN_MASTER_UPDATE_MODE + radeon_crtc->crtc_offset, 0);
1318 1318
1319 if (!atomic && fb && fb != crtc->fb) { 1319 if (!atomic && fb && fb != crtc->primary->fb) {
1320 radeon_fb = to_radeon_framebuffer(fb); 1320 radeon_fb = to_radeon_framebuffer(fb);
1321 rbo = gem_to_radeon_bo(radeon_fb->obj); 1321 rbo = gem_to_radeon_bo(radeon_fb->obj);
1322 r = radeon_bo_reserve(rbo, false); 1322 r = radeon_bo_reserve(rbo, false);
@@ -1350,7 +1350,7 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
1350 int r; 1350 int r;
1351 1351
1352 /* no fb bound */ 1352 /* no fb bound */
1353 if (!atomic && !crtc->fb) { 1353 if (!atomic && !crtc->primary->fb) {
1354 DRM_DEBUG_KMS("No FB bound\n"); 1354 DRM_DEBUG_KMS("No FB bound\n");
1355 return 0; 1355 return 0;
1356 } 1356 }
@@ -1360,8 +1360,8 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
1360 target_fb = fb; 1360 target_fb = fb;
1361 } 1361 }
1362 else { 1362 else {
1363 radeon_fb = to_radeon_framebuffer(crtc->fb); 1363 radeon_fb = to_radeon_framebuffer(crtc->primary->fb);
1364 target_fb = crtc->fb; 1364 target_fb = crtc->primary->fb;
1365 } 1365 }
1366 1366
1367 obj = radeon_fb->obj; 1367 obj = radeon_fb->obj;
@@ -1485,7 +1485,7 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc,
1485 /* set pageflip to happen anywhere in vblank interval */ 1485 /* set pageflip to happen anywhere in vblank interval */
1486 WREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + radeon_crtc->crtc_offset, 0); 1486 WREG32(AVIVO_D1MODE_MASTER_UPDATE_MODE + radeon_crtc->crtc_offset, 0);
1487 1487
1488 if (!atomic && fb && fb != crtc->fb) { 1488 if (!atomic && fb && fb != crtc->primary->fb) {
1489 radeon_fb = to_radeon_framebuffer(fb); 1489 radeon_fb = to_radeon_framebuffer(fb);
1490 rbo = gem_to_radeon_bo(radeon_fb->obj); 1490 rbo = gem_to_radeon_bo(radeon_fb->obj);
1491 r = radeon_bo_reserve(rbo, false); 1491 r = radeon_bo_reserve(rbo, false);
@@ -1972,12 +1972,12 @@ static void atombios_crtc_disable(struct drm_crtc *crtc)
1972 int i; 1972 int i;
1973 1973
1974 atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); 1974 atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
1975 if (crtc->fb) { 1975 if (crtc->primary->fb) {
1976 int r; 1976 int r;
1977 struct radeon_framebuffer *radeon_fb; 1977 struct radeon_framebuffer *radeon_fb;
1978 struct radeon_bo *rbo; 1978 struct radeon_bo *rbo;
1979 1979
1980 radeon_fb = to_radeon_framebuffer(crtc->fb); 1980 radeon_fb = to_radeon_framebuffer(crtc->primary->fb);
1981 rbo = gem_to_radeon_bo(radeon_fb->obj); 1981 rbo = gem_to_radeon_bo(radeon_fb->obj);
1982 r = radeon_bo_reserve(rbo, false); 1982 r = radeon_bo_reserve(rbo, false);
1983 if (unlikely(r)) 1983 if (unlikely(r))
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 030f8e49c5ee..b6c32640df20 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -3220,12 +3220,12 @@ void r100_bandwidth_update(struct radeon_device *rdev)
3220 3220
3221 if (rdev->mode_info.crtcs[0]->base.enabled) { 3221 if (rdev->mode_info.crtcs[0]->base.enabled) {
3222 mode1 = &rdev->mode_info.crtcs[0]->base.mode; 3222 mode1 = &rdev->mode_info.crtcs[0]->base.mode;
3223 pixel_bytes1 = rdev->mode_info.crtcs[0]->base.fb->bits_per_pixel / 8; 3223 pixel_bytes1 = rdev->mode_info.crtcs[0]->base.primary->fb->bits_per_pixel / 8;
3224 } 3224 }
3225 if (!(rdev->flags & RADEON_SINGLE_CRTC)) { 3225 if (!(rdev->flags & RADEON_SINGLE_CRTC)) {
3226 if (rdev->mode_info.crtcs[1]->base.enabled) { 3226 if (rdev->mode_info.crtcs[1]->base.enabled) {
3227 mode2 = &rdev->mode_info.crtcs[1]->base.mode; 3227 mode2 = &rdev->mode_info.crtcs[1]->base.mode;
3228 pixel_bytes2 = rdev->mode_info.crtcs[1]->base.fb->bits_per_pixel / 8; 3228 pixel_bytes2 = rdev->mode_info.crtcs[1]->base.primary->fb->bits_per_pixel / 8;
3229 } 3229 }
3230 } 3230 }
3231 3231
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index ec958e86fd8b..c566b486ca08 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -89,7 +89,7 @@ static void radeon_property_change_mode(struct drm_encoder *encoder)
89 89
90 if (crtc && crtc->enabled) { 90 if (crtc && crtc->enabled) {
91 drm_crtc_helper_set_mode(crtc, &crtc->mode, 91 drm_crtc_helper_set_mode(crtc, &crtc->mode,
92 crtc->x, crtc->y, crtc->fb); 92 crtc->x, crtc->y, crtc->primary->fb);
93 } 93 }
94} 94}
95 95
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 2e72dcd94b13..15f954cd81cb 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -1424,7 +1424,7 @@ int radeon_suspend_kms(struct drm_device *dev, bool suspend, bool fbcon)
1424 1424
1425 /* unpin the front buffers */ 1425 /* unpin the front buffers */
1426 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 1426 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
1427 struct radeon_framebuffer *rfb = to_radeon_framebuffer(crtc->fb); 1427 struct radeon_framebuffer *rfb = to_radeon_framebuffer(crtc->primary->fb);
1428 struct radeon_bo *robj; 1428 struct radeon_bo *robj;
1429 1429
1430 if (rfb == NULL || rfb->obj == NULL) { 1430 if (rfb == NULL || rfb->obj == NULL) {
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index fbd8b930f2be..5701fbb36b3c 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -369,7 +369,7 @@ static int radeon_crtc_page_flip(struct drm_crtc *crtc,
369 work->event = event; 369 work->event = event;
370 work->rdev = rdev; 370 work->rdev = rdev;
371 work->crtc_id = radeon_crtc->crtc_id; 371 work->crtc_id = radeon_crtc->crtc_id;
372 old_radeon_fb = to_radeon_framebuffer(crtc->fb); 372 old_radeon_fb = to_radeon_framebuffer(crtc->primary->fb);
373 new_radeon_fb = to_radeon_framebuffer(fb); 373 new_radeon_fb = to_radeon_framebuffer(fb);
374 /* schedule unpin of the old buffer */ 374 /* schedule unpin of the old buffer */
375 obj = old_radeon_fb->obj; 375 obj = old_radeon_fb->obj;
@@ -460,7 +460,7 @@ static int radeon_crtc_page_flip(struct drm_crtc *crtc,
460 spin_unlock_irqrestore(&dev->event_lock, flags); 460 spin_unlock_irqrestore(&dev->event_lock, flags);
461 461
462 /* update crtc fb */ 462 /* update crtc fb */
463 crtc->fb = fb; 463 crtc->primary->fb = fb;
464 464
465 r = drm_vblank_get(dev, radeon_crtc->crtc_id); 465 r = drm_vblank_get(dev, radeon_crtc->crtc_id);
466 if (r) { 466 if (r) {
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index 0b158f98d287..cafb1ccf2ec3 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -385,7 +385,7 @@ int radeon_crtc_do_set_base(struct drm_crtc *crtc,
385 385
386 DRM_DEBUG_KMS("\n"); 386 DRM_DEBUG_KMS("\n");
387 /* no fb bound */ 387 /* no fb bound */
388 if (!atomic && !crtc->fb) { 388 if (!atomic && !crtc->primary->fb) {
389 DRM_DEBUG_KMS("No FB bound\n"); 389 DRM_DEBUG_KMS("No FB bound\n");
390 return 0; 390 return 0;
391 } 391 }
@@ -395,8 +395,8 @@ int radeon_crtc_do_set_base(struct drm_crtc *crtc,
395 target_fb = fb; 395 target_fb = fb;
396 } 396 }
397 else { 397 else {
398 radeon_fb = to_radeon_framebuffer(crtc->fb); 398 radeon_fb = to_radeon_framebuffer(crtc->primary->fb);
399 target_fb = crtc->fb; 399 target_fb = crtc->primary->fb;
400 } 400 }
401 401
402 switch (target_fb->bits_per_pixel) { 402 switch (target_fb->bits_per_pixel) {
@@ -444,7 +444,7 @@ retry:
444 * We don't shutdown the display controller because new buffer 444 * We don't shutdown the display controller because new buffer
445 * will end up in same spot. 445 * will end up in same spot.
446 */ 446 */
447 if (!atomic && fb && fb != crtc->fb) { 447 if (!atomic && fb && fb != crtc->primary->fb) {
448 struct radeon_bo *old_rbo; 448 struct radeon_bo *old_rbo;
449 unsigned long nsize, osize; 449 unsigned long nsize, osize;
450 450
@@ -555,7 +555,7 @@ retry:
555 WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, crtc_offset); 555 WREG32(RADEON_CRTC_OFFSET + radeon_crtc->crtc_offset, crtc_offset);
556 WREG32(RADEON_CRTC_PITCH + radeon_crtc->crtc_offset, crtc_pitch); 556 WREG32(RADEON_CRTC_PITCH + radeon_crtc->crtc_offset, crtc_pitch);
557 557
558 if (!atomic && fb && fb != crtc->fb) { 558 if (!atomic && fb && fb != crtc->primary->fb) {
559 radeon_fb = to_radeon_framebuffer(fb); 559 radeon_fb = to_radeon_framebuffer(fb);
560 rbo = gem_to_radeon_bo(radeon_fb->obj); 560 rbo = gem_to_radeon_bo(radeon_fb->obj);
561 r = radeon_bo_reserve(rbo, false); 561 r = radeon_bo_reserve(rbo, false);
@@ -599,7 +599,7 @@ static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mod
599 } 599 }
600 } 600 }
601 601
602 switch (crtc->fb->bits_per_pixel) { 602 switch (crtc->primary->fb->bits_per_pixel) {
603 case 8: 603 case 8:
604 format = 2; 604 format = 2;
605 break; 605 break;
@@ -1087,12 +1087,12 @@ static void radeon_crtc_commit(struct drm_crtc *crtc)
1087static void radeon_crtc_disable(struct drm_crtc *crtc) 1087static void radeon_crtc_disable(struct drm_crtc *crtc)
1088{ 1088{
1089 radeon_crtc_dpms(crtc, DRM_MODE_DPMS_OFF); 1089 radeon_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
1090 if (crtc->fb) { 1090 if (crtc->primary->fb) {
1091 int r; 1091 int r;
1092 struct radeon_framebuffer *radeon_fb; 1092 struct radeon_framebuffer *radeon_fb;
1093 struct radeon_bo *rbo; 1093 struct radeon_bo *rbo;
1094 1094
1095 radeon_fb = to_radeon_framebuffer(crtc->fb); 1095 radeon_fb = to_radeon_framebuffer(crtc->primary->fb);
1096 rbo = gem_to_radeon_bo(radeon_fb->obj); 1096 rbo = gem_to_radeon_bo(radeon_fb->obj);
1097 r = radeon_bo_reserve(rbo, false); 1097 r = radeon_bo_reserve(rbo, false);
1098 if (unlikely(r)) 1098 if (unlikely(r))
diff --git a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
index fbf4be316d0b..299267db2898 100644
--- a/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
+++ b/drivers/gpu/drm/rcar-du/rcar_du_crtc.c
@@ -299,7 +299,7 @@ static void rcar_du_crtc_update_base(struct rcar_du_crtc *rcrtc)
299{ 299{
300 struct drm_crtc *crtc = &rcrtc->crtc; 300 struct drm_crtc *crtc = &rcrtc->crtc;
301 301
302 rcar_du_plane_compute_base(rcrtc->plane, crtc->fb); 302 rcar_du_plane_compute_base(rcrtc->plane, crtc->primary->fb);
303 rcar_du_plane_update_base(rcrtc->plane); 303 rcar_du_plane_update_base(rcrtc->plane);
304} 304}
305 305
@@ -358,10 +358,10 @@ static int rcar_du_crtc_mode_set(struct drm_crtc *crtc,
358 const struct rcar_du_format_info *format; 358 const struct rcar_du_format_info *format;
359 int ret; 359 int ret;
360 360
361 format = rcar_du_format_info(crtc->fb->pixel_format); 361 format = rcar_du_format_info(crtc->primary->fb->pixel_format);
362 if (format == NULL) { 362 if (format == NULL) {
363 dev_dbg(rcdu->dev, "mode_set: unsupported format %08x\n", 363 dev_dbg(rcdu->dev, "mode_set: unsupported format %08x\n",
364 crtc->fb->pixel_format); 364 crtc->primary->fb->pixel_format);
365 ret = -EINVAL; 365 ret = -EINVAL;
366 goto error; 366 goto error;
367 } 367 }
@@ -377,7 +377,7 @@ static int rcar_du_crtc_mode_set(struct drm_crtc *crtc,
377 rcrtc->plane->width = mode->hdisplay; 377 rcrtc->plane->width = mode->hdisplay;
378 rcrtc->plane->height = mode->vdisplay; 378 rcrtc->plane->height = mode->vdisplay;
379 379
380 rcar_du_plane_compute_base(rcrtc->plane, crtc->fb); 380 rcar_du_plane_compute_base(rcrtc->plane, crtc->primary->fb);
381 381
382 rcrtc->outputs = 0; 382 rcrtc->outputs = 0;
383 383
@@ -510,7 +510,7 @@ static int rcar_du_crtc_page_flip(struct drm_crtc *crtc,
510 } 510 }
511 spin_unlock_irqrestore(&dev->event_lock, flags); 511 spin_unlock_irqrestore(&dev->event_lock, flags);
512 512
513 crtc->fb = fb; 513 crtc->primary->fb = fb;
514 rcar_du_crtc_update_base(rcrtc); 514 rcar_du_crtc_update_base(rcrtc);
515 515
516 if (event) { 516 if (event) {
diff --git a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
index ea543b4d3510..e9e5e6d368cc 100644
--- a/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
+++ b/drivers/gpu/drm/shmobile/shmob_drm_crtc.c
@@ -173,7 +173,7 @@ static void shmob_drm_crtc_start(struct shmob_drm_crtc *scrtc)
173 if (scrtc->started) 173 if (scrtc->started)
174 return; 174 return;
175 175
176 format = shmob_drm_format_info(crtc->fb->pixel_format); 176 format = shmob_drm_format_info(crtc->primary->fb->pixel_format);
177 if (WARN_ON(format == NULL)) 177 if (WARN_ON(format == NULL))
178 return; 178 return;
179 179
@@ -303,7 +303,7 @@ static void shmob_drm_crtc_compute_base(struct shmob_drm_crtc *scrtc,
303 int x, int y) 303 int x, int y)
304{ 304{
305 struct drm_crtc *crtc = &scrtc->crtc; 305 struct drm_crtc *crtc = &scrtc->crtc;
306 struct drm_framebuffer *fb = crtc->fb; 306 struct drm_framebuffer *fb = crtc->primary->fb;
307 struct shmob_drm_device *sdev = crtc->dev->dev_private; 307 struct shmob_drm_device *sdev = crtc->dev->dev_private;
308 struct drm_gem_cma_object *gem; 308 struct drm_gem_cma_object *gem;
309 unsigned int bpp; 309 unsigned int bpp;
@@ -382,15 +382,15 @@ static int shmob_drm_crtc_mode_set(struct drm_crtc *crtc,
382 const struct shmob_drm_format_info *format; 382 const struct shmob_drm_format_info *format;
383 void *cache; 383 void *cache;
384 384
385 format = shmob_drm_format_info(crtc->fb->pixel_format); 385 format = shmob_drm_format_info(crtc->primary->fb->pixel_format);
386 if (format == NULL) { 386 if (format == NULL) {
387 dev_dbg(sdev->dev, "mode_set: unsupported format %08x\n", 387 dev_dbg(sdev->dev, "mode_set: unsupported format %08x\n",
388 crtc->fb->pixel_format); 388 crtc->primary->fb->pixel_format);
389 return -EINVAL; 389 return -EINVAL;
390 } 390 }
391 391
392 scrtc->format = format; 392 scrtc->format = format;
393 scrtc->line_size = crtc->fb->pitches[0]; 393 scrtc->line_size = crtc->primary->fb->pitches[0];
394 394
395 if (sdev->meram) { 395 if (sdev->meram) {
396 /* Enable MERAM cache if configured. We need to de-init 396 /* Enable MERAM cache if configured. We need to de-init
@@ -402,7 +402,7 @@ static int shmob_drm_crtc_mode_set(struct drm_crtc *crtc,
402 } 402 }
403 403
404 cache = sh_mobile_meram_cache_alloc(sdev->meram, mdata, 404 cache = sh_mobile_meram_cache_alloc(sdev->meram, mdata,
405 crtc->fb->pitches[0], 405 crtc->primary->fb->pitches[0],
406 adjusted_mode->vdisplay, 406 adjusted_mode->vdisplay,
407 format->meram, 407 format->meram,
408 &scrtc->line_size); 408 &scrtc->line_size);
@@ -489,7 +489,7 @@ static int shmob_drm_crtc_page_flip(struct drm_crtc *crtc,
489 } 489 }
490 spin_unlock_irqrestore(&dev->event_lock, flags); 490 spin_unlock_irqrestore(&dev->event_lock, flags);
491 491
492 crtc->fb = fb; 492 crtc->primary->fb = fb;
493 shmob_drm_crtc_update_base(scrtc); 493 shmob_drm_crtc_update_base(scrtc);
494 494
495 if (event) { 495 if (event) {
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 9336006b475d..36c717af6cf9 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -235,14 +235,14 @@ static void tegra_dc_finish_page_flip(struct tegra_dc *dc)
235 if (!dc->event) 235 if (!dc->event)
236 return; 236 return;
237 237
238 bo = tegra_fb_get_plane(crtc->fb, 0); 238 bo = tegra_fb_get_plane(crtc->primary->fb, 0);
239 239
240 /* check if new start address has been latched */ 240 /* check if new start address has been latched */
241 tegra_dc_writel(dc, READ_MUX, DC_CMD_STATE_ACCESS); 241 tegra_dc_writel(dc, READ_MUX, DC_CMD_STATE_ACCESS);
242 base = tegra_dc_readl(dc, DC_WINBUF_START_ADDR); 242 base = tegra_dc_readl(dc, DC_WINBUF_START_ADDR);
243 tegra_dc_writel(dc, 0, DC_CMD_STATE_ACCESS); 243 tegra_dc_writel(dc, 0, DC_CMD_STATE_ACCESS);
244 244
245 if (base == bo->paddr + crtc->fb->offsets[0]) { 245 if (base == bo->paddr + crtc->primary->fb->offsets[0]) {
246 spin_lock_irqsave(&drm->event_lock, flags); 246 spin_lock_irqsave(&drm->event_lock, flags);
247 drm_send_vblank_event(drm, dc->pipe, dc->event); 247 drm_send_vblank_event(drm, dc->pipe, dc->event);
248 drm_vblank_put(drm, dc->pipe); 248 drm_vblank_put(drm, dc->pipe);
@@ -284,7 +284,7 @@ static int tegra_dc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb,
284 } 284 }
285 285
286 tegra_dc_set_base(dc, 0, 0, fb); 286 tegra_dc_set_base(dc, 0, 0, fb);
287 crtc->fb = fb; 287 crtc->primary->fb = fb;
288 288
289 return 0; 289 return 0;
290} 290}
@@ -645,7 +645,7 @@ static int tegra_crtc_mode_set(struct drm_crtc *crtc,
645 struct drm_display_mode *adjusted, 645 struct drm_display_mode *adjusted,
646 int x, int y, struct drm_framebuffer *old_fb) 646 int x, int y, struct drm_framebuffer *old_fb)
647{ 647{
648 struct tegra_bo *bo = tegra_fb_get_plane(crtc->fb, 0); 648 struct tegra_bo *bo = tegra_fb_get_plane(crtc->primary->fb, 0);
649 struct tegra_dc *dc = to_tegra_dc(crtc); 649 struct tegra_dc *dc = to_tegra_dc(crtc);
650 struct tegra_dc_window window; 650 struct tegra_dc_window window;
651 unsigned long div, value; 651 unsigned long div, value;
@@ -682,9 +682,9 @@ static int tegra_crtc_mode_set(struct drm_crtc *crtc,
682 window.dst.y = 0; 682 window.dst.y = 0;
683 window.dst.w = mode->hdisplay; 683 window.dst.w = mode->hdisplay;
684 window.dst.h = mode->vdisplay; 684 window.dst.h = mode->vdisplay;
685 window.format = tegra_dc_format(crtc->fb->pixel_format); 685 window.format = tegra_dc_format(crtc->primary->fb->pixel_format);
686 window.bits_per_pixel = crtc->fb->bits_per_pixel; 686 window.bits_per_pixel = crtc->primary->fb->bits_per_pixel;
687 window.stride[0] = crtc->fb->pitches[0]; 687 window.stride[0] = crtc->primary->fb->pitches[0];
688 window.base[0] = bo->paddr; 688 window.base[0] = bo->paddr;
689 689
690 err = tegra_dc_setup_window(dc, 0, &window); 690 err = tegra_dc_setup_window(dc, 0, &window);
@@ -699,7 +699,7 @@ static int tegra_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
699{ 699{
700 struct tegra_dc *dc = to_tegra_dc(crtc); 700 struct tegra_dc *dc = to_tegra_dc(crtc);
701 701
702 return tegra_dc_set_base(dc, x, y, crtc->fb); 702 return tegra_dc_set_base(dc, x, y, crtc->primary->fb);
703} 703}
704 704
705static void tegra_crtc_prepare(struct drm_crtc *crtc) 705static void tegra_crtc_prepare(struct drm_crtc *crtc)
diff --git a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
index d36efc13b16f..d642d4a02134 100644
--- a/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
+++ b/drivers/gpu/drm/tilcdc/tilcdc_crtc.c
@@ -74,7 +74,7 @@ static void set_scanout(struct drm_crtc *crtc, int n)
74 drm_flip_work_queue(&tilcdc_crtc->unref_work, tilcdc_crtc->scanout[n]); 74 drm_flip_work_queue(&tilcdc_crtc->unref_work, tilcdc_crtc->scanout[n]);
75 drm_flip_work_commit(&tilcdc_crtc->unref_work, priv->wq); 75 drm_flip_work_commit(&tilcdc_crtc->unref_work, priv->wq);
76 } 76 }
77 tilcdc_crtc->scanout[n] = crtc->fb; 77 tilcdc_crtc->scanout[n] = crtc->primary->fb;
78 drm_framebuffer_reference(tilcdc_crtc->scanout[n]); 78 drm_framebuffer_reference(tilcdc_crtc->scanout[n]);
79 tilcdc_crtc->dirty &= ~stat[n]; 79 tilcdc_crtc->dirty &= ~stat[n];
80 pm_runtime_put_sync(dev->dev); 80 pm_runtime_put_sync(dev->dev);
@@ -84,7 +84,7 @@ static void update_scanout(struct drm_crtc *crtc)
84{ 84{
85 struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); 85 struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
86 struct drm_device *dev = crtc->dev; 86 struct drm_device *dev = crtc->dev;
87 struct drm_framebuffer *fb = crtc->fb; 87 struct drm_framebuffer *fb = crtc->primary->fb;
88 struct drm_gem_cma_object *gem; 88 struct drm_gem_cma_object *gem;
89 unsigned int depth, bpp; 89 unsigned int depth, bpp;
90 90
@@ -159,7 +159,7 @@ static int tilcdc_crtc_page_flip(struct drm_crtc *crtc,
159 return -EBUSY; 159 return -EBUSY;
160 } 160 }
161 161
162 crtc->fb = fb; 162 crtc->primary->fb = fb;
163 tilcdc_crtc->event = event; 163 tilcdc_crtc->event = event;
164 update_scanout(crtc); 164 update_scanout(crtc);
165 165
@@ -339,7 +339,7 @@ static int tilcdc_crtc_mode_set(struct drm_crtc *crtc,
339 if (priv->rev == 2) { 339 if (priv->rev == 2) {
340 unsigned int depth, bpp; 340 unsigned int depth, bpp;
341 341
342 drm_fb_get_bpp_depth(crtc->fb->pixel_format, &depth, &bpp); 342 drm_fb_get_bpp_depth(crtc->primary->fb->pixel_format, &depth, &bpp);
343 switch (bpp) { 343 switch (bpp) {
344 case 16: 344 case 16:
345 break; 345 break;
diff --git a/drivers/gpu/drm/udl/udl_modeset.c b/drivers/gpu/drm/udl/udl_modeset.c
index 2ae1eb7d1635..cddc4fcf35cf 100644
--- a/drivers/gpu/drm/udl/udl_modeset.c
+++ b/drivers/gpu/drm/udl/udl_modeset.c
@@ -310,7 +310,7 @@ static int udl_crtc_mode_set(struct drm_crtc *crtc,
310 310
311{ 311{
312 struct drm_device *dev = crtc->dev; 312 struct drm_device *dev = crtc->dev;
313 struct udl_framebuffer *ufb = to_udl_fb(crtc->fb); 313 struct udl_framebuffer *ufb = to_udl_fb(crtc->primary->fb);
314 struct udl_device *udl = dev->dev_private; 314 struct udl_device *udl = dev->dev_private;
315 char *buf; 315 char *buf;
316 char *wrptr; 316 char *wrptr;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 159af7ee111f..a2dde5ad8138 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -468,7 +468,7 @@ static int do_surface_dirty_sou(struct vmw_private *dev_priv,
468 num_units = 0; 468 num_units = 0;
469 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, 469 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list,
470 head) { 470 head) {
471 if (crtc->fb != &framebuffer->base) 471 if (crtc->primary->fb != &framebuffer->base)
472 continue; 472 continue;
473 units[num_units++] = vmw_crtc_to_du(crtc); 473 units[num_units++] = vmw_crtc_to_du(crtc);
474 } 474 }
@@ -882,7 +882,7 @@ static int do_dmabuf_dirty_sou(struct drm_file *file_priv,
882 882
883 num_units = 0; 883 num_units = 0;
884 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) { 884 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
885 if (crtc->fb != &framebuffer->base) 885 if (crtc->primary->fb != &framebuffer->base)
886 continue; 886 continue;
887 units[num_units++] = vmw_crtc_to_du(crtc); 887 units[num_units++] = vmw_crtc_to_du(crtc);
888 } 888 }
@@ -1243,7 +1243,7 @@ int vmw_kms_present(struct vmw_private *dev_priv,
1243 1243
1244 num_units = 0; 1244 num_units = 0;
1245 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) { 1245 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1246 if (crtc->fb != &vfb->base) 1246 if (crtc->primary->fb != &vfb->base)
1247 continue; 1247 continue;
1248 units[num_units++] = vmw_crtc_to_du(crtc); 1248 units[num_units++] = vmw_crtc_to_du(crtc);
1249 } 1249 }
@@ -1380,7 +1380,7 @@ int vmw_kms_readback(struct vmw_private *dev_priv,
1380 1380
1381 num_units = 0; 1381 num_units = 0;
1382 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) { 1382 list_for_each_entry(crtc, &dev_priv->dev->mode_config.crtc_list, head) {
1383 if (crtc->fb != &vfb->base) 1383 if (crtc->primary->fb != &vfb->base)
1384 continue; 1384 continue;
1385 units[num_units++] = vmw_crtc_to_du(crtc); 1385 units[num_units++] = vmw_crtc_to_du(crtc);
1386 } 1386 }
@@ -1723,7 +1723,7 @@ int vmw_du_page_flip(struct drm_crtc *crtc,
1723 uint32_t page_flip_flags) 1723 uint32_t page_flip_flags)
1724{ 1724{
1725 struct vmw_private *dev_priv = vmw_priv(crtc->dev); 1725 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
1726 struct drm_framebuffer *old_fb = crtc->fb; 1726 struct drm_framebuffer *old_fb = crtc->primary->fb;
1727 struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(fb); 1727 struct vmw_framebuffer *vfb = vmw_framebuffer_to_vfb(fb);
1728 struct drm_file *file_priv ; 1728 struct drm_file *file_priv ;
1729 struct vmw_fence_obj *fence = NULL; 1729 struct vmw_fence_obj *fence = NULL;
@@ -1741,7 +1741,7 @@ int vmw_du_page_flip(struct drm_crtc *crtc,
1741 if (!vmw_kms_screen_object_flippable(dev_priv, crtc)) 1741 if (!vmw_kms_screen_object_flippable(dev_priv, crtc))
1742 return -EINVAL; 1742 return -EINVAL;
1743 1743
1744 crtc->fb = fb; 1744 crtc->primary->fb = fb;
1745 1745
1746 /* do a full screen dirty update */ 1746 /* do a full screen dirty update */
1747 clips.x1 = clips.y1 = 0; 1747 clips.x1 = clips.y1 = 0;
@@ -1781,7 +1781,7 @@ int vmw_du_page_flip(struct drm_crtc *crtc,
1781 return ret; 1781 return ret;
1782 1782
1783out_no_fence: 1783out_no_fence:
1784 crtc->fb = old_fb; 1784 crtc->primary->fb = old_fb;
1785 return ret; 1785 return ret;
1786} 1786}
1787 1787
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
index a055a26819c2..b2b9bd23aeee 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_ldu.c
@@ -93,7 +93,7 @@ static int vmw_ldu_commit_list(struct vmw_private *dev_priv)
93 93
94 if (crtc == NULL) 94 if (crtc == NULL)
95 return 0; 95 return 0;
96 fb = entry->base.crtc.fb; 96 fb = entry->base.crtc.primary->fb;
97 97
98 return vmw_kms_write_svga(dev_priv, w, h, fb->pitches[0], 98 return vmw_kms_write_svga(dev_priv, w, h, fb->pitches[0],
99 fb->bits_per_pixel, fb->depth); 99 fb->bits_per_pixel, fb->depth);
@@ -101,7 +101,7 @@ static int vmw_ldu_commit_list(struct vmw_private *dev_priv)
101 101
102 if (!list_empty(&lds->active)) { 102 if (!list_empty(&lds->active)) {
103 entry = list_entry(lds->active.next, typeof(*entry), active); 103 entry = list_entry(lds->active.next, typeof(*entry), active);
104 fb = entry->base.crtc.fb; 104 fb = entry->base.crtc.primary->fb;
105 105
106 vmw_kms_write_svga(dev_priv, fb->width, fb->height, fb->pitches[0], 106 vmw_kms_write_svga(dev_priv, fb->width, fb->height, fb->pitches[0],
107 fb->bits_per_pixel, fb->depth); 107 fb->bits_per_pixel, fb->depth);
@@ -259,7 +259,7 @@ static int vmw_ldu_crtc_set_config(struct drm_mode_set *set)
259 259
260 connector->encoder = NULL; 260 connector->encoder = NULL;
261 encoder->crtc = NULL; 261 encoder->crtc = NULL;
262 crtc->fb = NULL; 262 crtc->primary->fb = NULL;
263 crtc->enabled = false; 263 crtc->enabled = false;
264 264
265 vmw_ldu_del_active(dev_priv, ldu); 265 vmw_ldu_del_active(dev_priv, ldu);
@@ -280,7 +280,7 @@ static int vmw_ldu_crtc_set_config(struct drm_mode_set *set)
280 280
281 vmw_fb_off(dev_priv); 281 vmw_fb_off(dev_priv);
282 282
283 crtc->fb = fb; 283 crtc->primary->fb = fb;
284 encoder->crtc = crtc; 284 encoder->crtc = crtc;
285 connector->encoder = encoder; 285 connector->encoder = encoder;
286 crtc->x = set->x; 286 crtc->x = set->x;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
index 22406c8651ea..a95d3a0cabe4 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_scrn.c
@@ -307,7 +307,7 @@ static int vmw_sou_crtc_set_config(struct drm_mode_set *set)
307 307
308 connector->encoder = NULL; 308 connector->encoder = NULL;
309 encoder->crtc = NULL; 309 encoder->crtc = NULL;
310 crtc->fb = NULL; 310 crtc->primary->fb = NULL;
311 crtc->x = 0; 311 crtc->x = 0;
312 crtc->y = 0; 312 crtc->y = 0;
313 crtc->enabled = false; 313 crtc->enabled = false;
@@ -368,7 +368,7 @@ static int vmw_sou_crtc_set_config(struct drm_mode_set *set)
368 368
369 connector->encoder = NULL; 369 connector->encoder = NULL;
370 encoder->crtc = NULL; 370 encoder->crtc = NULL;
371 crtc->fb = NULL; 371 crtc->primary->fb = NULL;
372 crtc->x = 0; 372 crtc->x = 0;
373 crtc->y = 0; 373 crtc->y = 0;
374 crtc->enabled = false; 374 crtc->enabled = false;
@@ -381,7 +381,7 @@ static int vmw_sou_crtc_set_config(struct drm_mode_set *set)
381 connector->encoder = encoder; 381 connector->encoder = encoder;
382 encoder->crtc = crtc; 382 encoder->crtc = crtc;
383 crtc->mode = *mode; 383 crtc->mode = *mode;
384 crtc->fb = fb; 384 crtc->primary->fb = fb;
385 crtc->x = set->x; 385 crtc->x = set->x;
386 crtc->y = set->y; 386 crtc->y = set->y;
387 crtc->enabled = true; 387 crtc->enabled = true;
@@ -572,5 +572,5 @@ void vmw_kms_screen_object_update_implicit_fb(struct vmw_private *dev_priv,
572 BUG_ON(!sou->base.is_implicit); 572 BUG_ON(!sou->base.is_implicit);
573 573
574 dev_priv->sou_priv->implicit_fb = 574 dev_priv->sou_priv->implicit_fb =
575 vmw_framebuffer_to_vfb(sou->base.crtc.fb); 575 vmw_framebuffer_to_vfb(sou->base.crtc.primary->fb);
576} 576}