diff options
author | Dave Airlie <airlied@redhat.com> | 2010-08-01 20:42:55 -0400 |
---|---|---|
committer | Dave Airlie <airlied@redhat.com> | 2010-08-01 20:47:07 -0400 |
commit | d9fdaafbe912a34ef06ed569c6606fe2811f325b (patch) | |
tree | 31b4d09d5c20e20c6ab8a579f3d0801a2f94e742 /drivers/gpu/drm | |
parent | d6486813d2d0658c34f62212ba9a64be4d01c317 (diff) |
drm/radeon/kms: move a bunch of modesetting debug to correct debug usage.
This migrates a bunch of DRM_DEBUG->DRM_DEBUG_KMS so we can get more modesetting related info without all the other ioctl handling easily.
Also the PM code moves to DRM_DEBUG_DRIVER mostly.
Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/radeon/atombios_crtc.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/atombios_dp.c | 18 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r100.c | 12 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/r600.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_atombios.c | 44 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_combios.c | 36 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_connectors.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_display.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_encoders.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_kms.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_legacy_crtc.c | 18 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_legacy_encoders.c | 30 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_legacy_tv.c | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_pm.c | 32 |
14 files changed, 116 insertions, 116 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index ec702345d70e..a2e65d9f2a1c 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
@@ -818,7 +818,7 @@ static int evergreen_crtc_set_base(struct drm_crtc *crtc, int x, int y, | |||
818 | 818 | ||
819 | /* no fb bound */ | 819 | /* no fb bound */ |
820 | if (!crtc->fb) { | 820 | if (!crtc->fb) { |
821 | DRM_DEBUG("No FB bound\n"); | 821 | DRM_DEBUG_KMS("No FB bound\n"); |
822 | return 0; | 822 | return 0; |
823 | } | 823 | } |
824 | 824 | ||
@@ -957,7 +957,7 @@ static int avivo_crtc_set_base(struct drm_crtc *crtc, int x, int y, | |||
957 | 957 | ||
958 | /* no fb bound */ | 958 | /* no fb bound */ |
959 | if (!crtc->fb) { | 959 | if (!crtc->fb) { |
960 | DRM_DEBUG("No FB bound\n"); | 960 | DRM_DEBUG_KMS("No FB bound\n"); |
961 | return 0; | 961 | return 0; |
962 | } | 962 | } |
963 | 963 | ||
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c index abffb1499e22..36e0d4b545e6 100644 --- a/drivers/gpu/drm/radeon/atombios_dp.c +++ b/drivers/gpu/drm/radeon/atombios_dp.c | |||
@@ -296,7 +296,7 @@ static void dp_get_adjust_train(u8 link_status[DP_LINK_STATUS_SIZE], | |||
296 | u8 this_v = dp_get_adjust_request_voltage(link_status, lane); | 296 | u8 this_v = dp_get_adjust_request_voltage(link_status, lane); |
297 | u8 this_p = dp_get_adjust_request_pre_emphasis(link_status, lane); | 297 | u8 this_p = dp_get_adjust_request_pre_emphasis(link_status, lane); |
298 | 298 | ||
299 | DRM_DEBUG("requested signal parameters: lane %d voltage %s pre_emph %s\n", | 299 | DRM_DEBUG_KMS("requested signal parameters: lane %d voltage %s pre_emph %s\n", |
300 | lane, | 300 | lane, |
301 | voltage_names[this_v >> DP_TRAIN_VOLTAGE_SWING_SHIFT], | 301 | voltage_names[this_v >> DP_TRAIN_VOLTAGE_SWING_SHIFT], |
302 | pre_emph_names[this_p >> DP_TRAIN_PRE_EMPHASIS_SHIFT]); | 302 | pre_emph_names[this_p >> DP_TRAIN_PRE_EMPHASIS_SHIFT]); |
@@ -313,7 +313,7 @@ static void dp_get_adjust_train(u8 link_status[DP_LINK_STATUS_SIZE], | |||
313 | if (p >= dp_pre_emphasis_max(v)) | 313 | if (p >= dp_pre_emphasis_max(v)) |
314 | p = dp_pre_emphasis_max(v) | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED; | 314 | p = dp_pre_emphasis_max(v) | DP_TRAIN_MAX_PRE_EMPHASIS_REACHED; |
315 | 315 | ||
316 | DRM_DEBUG("using signal parameters: voltage %s pre_emph %s\n", | 316 | DRM_DEBUG_KMS("using signal parameters: voltage %s pre_emph %s\n", |
317 | voltage_names[(v & DP_TRAIN_VOLTAGE_SWING_MASK) >> DP_TRAIN_VOLTAGE_SWING_SHIFT], | 317 | voltage_names[(v & DP_TRAIN_VOLTAGE_SWING_MASK) >> DP_TRAIN_VOLTAGE_SWING_SHIFT], |
318 | pre_emph_names[(p & DP_TRAIN_PRE_EMPHASIS_MASK) >> DP_TRAIN_PRE_EMPHASIS_SHIFT]); | 318 | pre_emph_names[(p & DP_TRAIN_PRE_EMPHASIS_MASK) >> DP_TRAIN_PRE_EMPHASIS_SHIFT]); |
319 | 319 | ||
@@ -358,7 +358,7 @@ retry: | |||
358 | if (args.v1.ucReplyStatus && !args.v1.ucDataOutLen) { | 358 | if (args.v1.ucReplyStatus && !args.v1.ucDataOutLen) { |
359 | if (args.v1.ucReplyStatus == 0x20 && retry_count++ < 10) | 359 | if (args.v1.ucReplyStatus == 0x20 && retry_count++ < 10) |
360 | goto retry; | 360 | goto retry; |
361 | DRM_DEBUG("failed to get auxch %02x%02x %02x %02x 0x%02x %02x after %d retries\n", | 361 | DRM_DEBUG_KMS("failed to get auxch %02x%02x %02x %02x 0x%02x %02x after %d retries\n", |
362 | req_bytes[1], req_bytes[0], req_bytes[2], req_bytes[3], | 362 | req_bytes[1], req_bytes[0], req_bytes[2], req_bytes[3], |
363 | chan->rec.i2c_id, args.v1.ucReplyStatus, retry_count); | 363 | chan->rec.i2c_id, args.v1.ucReplyStatus, retry_count); |
364 | return false; | 364 | return false; |
@@ -461,10 +461,10 @@ bool radeon_dp_getdpcd(struct radeon_connector *radeon_connector) | |||
461 | memcpy(dig_connector->dpcd, msg, 8); | 461 | memcpy(dig_connector->dpcd, msg, 8); |
462 | { | 462 | { |
463 | int i; | 463 | int i; |
464 | DRM_DEBUG("DPCD: "); | 464 | DRM_DEBUG_KMS("DPCD: "); |
465 | for (i = 0; i < 8; i++) | 465 | for (i = 0; i < 8; i++) |
466 | DRM_DEBUG("%02x ", msg[i]); | 466 | DRM_DEBUG_KMS("%02x ", msg[i]); |
467 | DRM_DEBUG("\n"); | 467 | DRM_DEBUG_KMS("\n"); |
468 | } | 468 | } |
469 | return true; | 469 | return true; |
470 | } | 470 | } |
@@ -512,7 +512,7 @@ static bool atom_dp_get_link_status(struct radeon_connector *radeon_connector, | |||
512 | return false; | 512 | return false; |
513 | } | 513 | } |
514 | 514 | ||
515 | DRM_DEBUG("link status %02x %02x %02x %02x %02x %02x\n", | 515 | DRM_DEBUG_KMS("link status %02x %02x %02x %02x %02x %02x\n", |
516 | link_status[0], link_status[1], link_status[2], | 516 | link_status[0], link_status[1], link_status[2], |
517 | link_status[3], link_status[4], link_status[5]); | 517 | link_status[3], link_status[4], link_status[5]); |
518 | return true; | 518 | return true; |
@@ -695,7 +695,7 @@ void dp_link_train(struct drm_encoder *encoder, | |||
695 | if (!clock_recovery) | 695 | if (!clock_recovery) |
696 | DRM_ERROR("clock recovery failed\n"); | 696 | DRM_ERROR("clock recovery failed\n"); |
697 | else | 697 | else |
698 | DRM_DEBUG("clock recovery at voltage %d pre-emphasis %d\n", | 698 | DRM_DEBUG_KMS("clock recovery at voltage %d pre-emphasis %d\n", |
699 | train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK, | 699 | train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK, |
700 | (train_set[0] & DP_TRAIN_PRE_EMPHASIS_MASK) >> | 700 | (train_set[0] & DP_TRAIN_PRE_EMPHASIS_MASK) >> |
701 | DP_TRAIN_PRE_EMPHASIS_SHIFT); | 701 | DP_TRAIN_PRE_EMPHASIS_SHIFT); |
@@ -739,7 +739,7 @@ void dp_link_train(struct drm_encoder *encoder, | |||
739 | if (!channel_eq) | 739 | if (!channel_eq) |
740 | DRM_ERROR("channel eq failed\n"); | 740 | DRM_ERROR("channel eq failed\n"); |
741 | else | 741 | else |
742 | DRM_DEBUG("channel eq at voltage %d pre-emphasis %d\n", | 742 | DRM_DEBUG_KMS("channel eq at voltage %d pre-emphasis %d\n", |
743 | train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK, | 743 | train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK, |
744 | (train_set[0] & DP_TRAIN_PRE_EMPHASIS_MASK) | 744 | (train_set[0] & DP_TRAIN_PRE_EMPHASIS_MASK) |
745 | >> DP_TRAIN_PRE_EMPHASIS_SHIFT); | 745 | >> DP_TRAIN_PRE_EMPHASIS_SHIFT); |
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index e115583f84fb..4c48df464355 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -141,7 +141,7 @@ void r100_pm_get_dynpm_state(struct radeon_device *rdev) | |||
141 | /* only one clock mode per power state */ | 141 | /* only one clock mode per power state */ |
142 | rdev->pm.requested_clock_mode_index = 0; | 142 | rdev->pm.requested_clock_mode_index = 0; |
143 | 143 | ||
144 | DRM_DEBUG("Requested: e: %d m: %d p: %d\n", | 144 | DRM_DEBUG_DRIVER("Requested: e: %d m: %d p: %d\n", |
145 | rdev->pm.power_state[rdev->pm.requested_power_state_index]. | 145 | rdev->pm.power_state[rdev->pm.requested_power_state_index]. |
146 | clock_info[rdev->pm.requested_clock_mode_index].sclk, | 146 | clock_info[rdev->pm.requested_clock_mode_index].sclk, |
147 | rdev->pm.power_state[rdev->pm.requested_power_state_index]. | 147 | rdev->pm.power_state[rdev->pm.requested_power_state_index]. |
@@ -276,7 +276,7 @@ void r100_pm_misc(struct radeon_device *rdev) | |||
276 | rdev->pm.power_state[rdev->pm.current_power_state_index].pcie_lanes)) { | 276 | rdev->pm.power_state[rdev->pm.current_power_state_index].pcie_lanes)) { |
277 | radeon_set_pcie_lanes(rdev, | 277 | radeon_set_pcie_lanes(rdev, |
278 | ps->pcie_lanes); | 278 | ps->pcie_lanes); |
279 | DRM_DEBUG("Setting: p: %d\n", ps->pcie_lanes); | 279 | DRM_DEBUG_DRIVER("Setting: p: %d\n", ps->pcie_lanes); |
280 | } | 280 | } |
281 | } | 281 | } |
282 | 282 | ||
@@ -849,7 +849,7 @@ static int r100_cp_init_microcode(struct radeon_device *rdev) | |||
849 | const char *fw_name = NULL; | 849 | const char *fw_name = NULL; |
850 | int err; | 850 | int err; |
851 | 851 | ||
852 | DRM_DEBUG("\n"); | 852 | DRM_DEBUG_KMS("\n"); |
853 | 853 | ||
854 | pdev = platform_device_register_simple("radeon_cp", 0, NULL, 0); | 854 | pdev = platform_device_register_simple("radeon_cp", 0, NULL, 0); |
855 | err = IS_ERR(pdev); | 855 | err = IS_ERR(pdev); |
@@ -2642,7 +2642,7 @@ int r100_set_surface_reg(struct radeon_device *rdev, int reg, | |||
2642 | flags |= pitch / 8; | 2642 | flags |= pitch / 8; |
2643 | 2643 | ||
2644 | 2644 | ||
2645 | DRM_DEBUG("writing surface %d %d %x %x\n", reg, flags, offset, offset+obj_size-1); | 2645 | DRM_DEBUG_KMS("writing surface %d %d %x %x\n", reg, flags, offset, offset+obj_size-1); |
2646 | WREG32(RADEON_SURFACE0_INFO + surf_index, flags); | 2646 | WREG32(RADEON_SURFACE0_INFO + surf_index, flags); |
2647 | WREG32(RADEON_SURFACE0_LOWER_BOUND + surf_index, offset); | 2647 | WREG32(RADEON_SURFACE0_LOWER_BOUND + surf_index, offset); |
2648 | WREG32(RADEON_SURFACE0_UPPER_BOUND + surf_index, offset + obj_size - 1); | 2648 | WREG32(RADEON_SURFACE0_UPPER_BOUND + surf_index, offset + obj_size - 1); |
@@ -3038,7 +3038,7 @@ void r100_bandwidth_update(struct radeon_device *rdev) | |||
3038 | } | 3038 | } |
3039 | #endif | 3039 | #endif |
3040 | 3040 | ||
3041 | DRM_DEBUG("GRPH_BUFFER_CNTL from to %x\n", | 3041 | DRM_DEBUG_KMS("GRPH_BUFFER_CNTL from to %x\n", |
3042 | /* (unsigned int)info->SavedReg->grph_buffer_cntl, */ | 3042 | /* (unsigned int)info->SavedReg->grph_buffer_cntl, */ |
3043 | (unsigned int)RREG32(RADEON_GRPH_BUFFER_CNTL)); | 3043 | (unsigned int)RREG32(RADEON_GRPH_BUFFER_CNTL)); |
3044 | } | 3044 | } |
@@ -3134,7 +3134,7 @@ void r100_bandwidth_update(struct radeon_device *rdev) | |||
3134 | WREG32(RS400_DISP1_REQ_CNTL1, 0x28FBC3AC); | 3134 | WREG32(RS400_DISP1_REQ_CNTL1, 0x28FBC3AC); |
3135 | } | 3135 | } |
3136 | 3136 | ||
3137 | DRM_DEBUG("GRPH2_BUFFER_CNTL from to %x\n", | 3137 | DRM_DEBUG_KMS("GRPH2_BUFFER_CNTL from to %x\n", |
3138 | (unsigned int)RREG32(RADEON_GRPH2_BUFFER_CNTL)); | 3138 | (unsigned int)RREG32(RADEON_GRPH2_BUFFER_CNTL)); |
3139 | } | 3139 | } |
3140 | } | 3140 | } |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 28e39bc6768b..d0ebae9dde25 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -271,7 +271,7 @@ void r600_pm_get_dynpm_state(struct radeon_device *rdev) | |||
271 | } | 271 | } |
272 | } | 272 | } |
273 | 273 | ||
274 | DRM_DEBUG("Requested: e: %d m: %d p: %d\n", | 274 | DRM_DEBUG_DRIVER("Requested: e: %d m: %d p: %d\n", |
275 | rdev->pm.power_state[rdev->pm.requested_power_state_index]. | 275 | rdev->pm.power_state[rdev->pm.requested_power_state_index]. |
276 | clock_info[rdev->pm.requested_clock_mode_index].sclk, | 276 | clock_info[rdev->pm.requested_clock_mode_index].sclk, |
277 | rdev->pm.power_state[rdev->pm.requested_power_state_index]. | 277 | rdev->pm.power_state[rdev->pm.requested_power_state_index]. |
@@ -586,7 +586,7 @@ void r600_pm_misc(struct radeon_device *rdev) | |||
586 | if (voltage->voltage != rdev->pm.current_vddc) { | 586 | if (voltage->voltage != rdev->pm.current_vddc) { |
587 | radeon_atom_set_voltage(rdev, voltage->voltage); | 587 | radeon_atom_set_voltage(rdev, voltage->voltage); |
588 | rdev->pm.current_vddc = voltage->voltage; | 588 | rdev->pm.current_vddc = voltage->voltage; |
589 | DRM_DEBUG("Setting: v: %d\n", voltage->voltage); | 589 | DRM_DEBUG_DRIVER("Setting: v: %d\n", voltage->voltage); |
590 | } | 590 | } |
591 | } | 591 | } |
592 | } | 592 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 0a97aeb083dd..6df7bd569495 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -723,7 +723,7 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct | |||
723 | } | 723 | } |
724 | 724 | ||
725 | if (i == ATOM_DEVICE_CV_INDEX) { | 725 | if (i == ATOM_DEVICE_CV_INDEX) { |
726 | DRM_DEBUG("Skipping Component Video\n"); | 726 | DRM_DEBUG_KMS("Skipping Component Video\n"); |
727 | continue; | 727 | continue; |
728 | } | 728 | } |
729 | 729 | ||
@@ -1095,7 +1095,7 @@ bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder, | |||
1095 | (tmds_info->asMiscInfo[i]. | 1095 | (tmds_info->asMiscInfo[i]. |
1096 | ucPLL_VoltageSwing & 0xf) << 16; | 1096 | ucPLL_VoltageSwing & 0xf) << 16; |
1097 | 1097 | ||
1098 | DRM_DEBUG("TMDS PLL From ATOMBIOS %u %x\n", | 1098 | DRM_DEBUG_KMS("TMDS PLL From ATOMBIOS %u %x\n", |
1099 | tmds->tmds_pll[i].freq, | 1099 | tmds->tmds_pll[i].freq, |
1100 | tmds->tmds_pll[i].value); | 1100 | tmds->tmds_pll[i].value); |
1101 | 1101 | ||
@@ -2187,11 +2187,11 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |||
2187 | if ((radeon_encoder->devices & ATOM_DEVICE_TV1_SUPPORT) && | 2187 | if ((radeon_encoder->devices & ATOM_DEVICE_TV1_SUPPORT) && |
2188 | (radeon_connector->devices & ATOM_DEVICE_TV1_SUPPORT)) { | 2188 | (radeon_connector->devices & ATOM_DEVICE_TV1_SUPPORT)) { |
2189 | if (connected) { | 2189 | if (connected) { |
2190 | DRM_DEBUG("TV1 connected\n"); | 2190 | DRM_DEBUG_KMS("TV1 connected\n"); |
2191 | bios_3_scratch |= ATOM_S3_TV1_ACTIVE; | 2191 | bios_3_scratch |= ATOM_S3_TV1_ACTIVE; |
2192 | bios_6_scratch |= ATOM_S6_ACC_REQ_TV1; | 2192 | bios_6_scratch |= ATOM_S6_ACC_REQ_TV1; |
2193 | } else { | 2193 | } else { |
2194 | DRM_DEBUG("TV1 disconnected\n"); | 2194 | DRM_DEBUG_KMS("TV1 disconnected\n"); |
2195 | bios_0_scratch &= ~ATOM_S0_TV1_MASK; | 2195 | bios_0_scratch &= ~ATOM_S0_TV1_MASK; |
2196 | bios_3_scratch &= ~ATOM_S3_TV1_ACTIVE; | 2196 | bios_3_scratch &= ~ATOM_S3_TV1_ACTIVE; |
2197 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_TV1; | 2197 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_TV1; |
@@ -2200,11 +2200,11 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |||
2200 | if ((radeon_encoder->devices & ATOM_DEVICE_CV_SUPPORT) && | 2200 | if ((radeon_encoder->devices & ATOM_DEVICE_CV_SUPPORT) && |
2201 | (radeon_connector->devices & ATOM_DEVICE_CV_SUPPORT)) { | 2201 | (radeon_connector->devices & ATOM_DEVICE_CV_SUPPORT)) { |
2202 | if (connected) { | 2202 | if (connected) { |
2203 | DRM_DEBUG("CV connected\n"); | 2203 | DRM_DEBUG_KMS("CV connected\n"); |
2204 | bios_3_scratch |= ATOM_S3_CV_ACTIVE; | 2204 | bios_3_scratch |= ATOM_S3_CV_ACTIVE; |
2205 | bios_6_scratch |= ATOM_S6_ACC_REQ_CV; | 2205 | bios_6_scratch |= ATOM_S6_ACC_REQ_CV; |
2206 | } else { | 2206 | } else { |
2207 | DRM_DEBUG("CV disconnected\n"); | 2207 | DRM_DEBUG_KMS("CV disconnected\n"); |
2208 | bios_0_scratch &= ~ATOM_S0_CV_MASK; | 2208 | bios_0_scratch &= ~ATOM_S0_CV_MASK; |
2209 | bios_3_scratch &= ~ATOM_S3_CV_ACTIVE; | 2209 | bios_3_scratch &= ~ATOM_S3_CV_ACTIVE; |
2210 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_CV; | 2210 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_CV; |
@@ -2213,12 +2213,12 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |||
2213 | if ((radeon_encoder->devices & ATOM_DEVICE_LCD1_SUPPORT) && | 2213 | if ((radeon_encoder->devices & ATOM_DEVICE_LCD1_SUPPORT) && |
2214 | (radeon_connector->devices & ATOM_DEVICE_LCD1_SUPPORT)) { | 2214 | (radeon_connector->devices & ATOM_DEVICE_LCD1_SUPPORT)) { |
2215 | if (connected) { | 2215 | if (connected) { |
2216 | DRM_DEBUG("LCD1 connected\n"); | 2216 | DRM_DEBUG_KMS("LCD1 connected\n"); |
2217 | bios_0_scratch |= ATOM_S0_LCD1; | 2217 | bios_0_scratch |= ATOM_S0_LCD1; |
2218 | bios_3_scratch |= ATOM_S3_LCD1_ACTIVE; | 2218 | bios_3_scratch |= ATOM_S3_LCD1_ACTIVE; |
2219 | bios_6_scratch |= ATOM_S6_ACC_REQ_LCD1; | 2219 | bios_6_scratch |= ATOM_S6_ACC_REQ_LCD1; |
2220 | } else { | 2220 | } else { |
2221 | DRM_DEBUG("LCD1 disconnected\n"); | 2221 | DRM_DEBUG_KMS("LCD1 disconnected\n"); |
2222 | bios_0_scratch &= ~ATOM_S0_LCD1; | 2222 | bios_0_scratch &= ~ATOM_S0_LCD1; |
2223 | bios_3_scratch &= ~ATOM_S3_LCD1_ACTIVE; | 2223 | bios_3_scratch &= ~ATOM_S3_LCD1_ACTIVE; |
2224 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_LCD1; | 2224 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_LCD1; |
@@ -2227,12 +2227,12 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |||
2227 | if ((radeon_encoder->devices & ATOM_DEVICE_CRT1_SUPPORT) && | 2227 | if ((radeon_encoder->devices & ATOM_DEVICE_CRT1_SUPPORT) && |
2228 | (radeon_connector->devices & ATOM_DEVICE_CRT1_SUPPORT)) { | 2228 | (radeon_connector->devices & ATOM_DEVICE_CRT1_SUPPORT)) { |
2229 | if (connected) { | 2229 | if (connected) { |
2230 | DRM_DEBUG("CRT1 connected\n"); | 2230 | DRM_DEBUG_KMS("CRT1 connected\n"); |
2231 | bios_0_scratch |= ATOM_S0_CRT1_COLOR; | 2231 | bios_0_scratch |= ATOM_S0_CRT1_COLOR; |
2232 | bios_3_scratch |= ATOM_S3_CRT1_ACTIVE; | 2232 | bios_3_scratch |= ATOM_S3_CRT1_ACTIVE; |
2233 | bios_6_scratch |= ATOM_S6_ACC_REQ_CRT1; | 2233 | bios_6_scratch |= ATOM_S6_ACC_REQ_CRT1; |
2234 | } else { | 2234 | } else { |
2235 | DRM_DEBUG("CRT1 disconnected\n"); | 2235 | DRM_DEBUG_KMS("CRT1 disconnected\n"); |
2236 | bios_0_scratch &= ~ATOM_S0_CRT1_MASK; | 2236 | bios_0_scratch &= ~ATOM_S0_CRT1_MASK; |
2237 | bios_3_scratch &= ~ATOM_S3_CRT1_ACTIVE; | 2237 | bios_3_scratch &= ~ATOM_S3_CRT1_ACTIVE; |
2238 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_CRT1; | 2238 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_CRT1; |
@@ -2241,12 +2241,12 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |||
2241 | if ((radeon_encoder->devices & ATOM_DEVICE_CRT2_SUPPORT) && | 2241 | if ((radeon_encoder->devices & ATOM_DEVICE_CRT2_SUPPORT) && |
2242 | (radeon_connector->devices & ATOM_DEVICE_CRT2_SUPPORT)) { | 2242 | (radeon_connector->devices & ATOM_DEVICE_CRT2_SUPPORT)) { |
2243 | if (connected) { | 2243 | if (connected) { |
2244 | DRM_DEBUG("CRT2 connected\n"); | 2244 | DRM_DEBUG_KMS("CRT2 connected\n"); |
2245 | bios_0_scratch |= ATOM_S0_CRT2_COLOR; | 2245 | bios_0_scratch |= ATOM_S0_CRT2_COLOR; |
2246 | bios_3_scratch |= ATOM_S3_CRT2_ACTIVE; | 2246 | bios_3_scratch |= ATOM_S3_CRT2_ACTIVE; |
2247 | bios_6_scratch |= ATOM_S6_ACC_REQ_CRT2; | 2247 | bios_6_scratch |= ATOM_S6_ACC_REQ_CRT2; |
2248 | } else { | 2248 | } else { |
2249 | DRM_DEBUG("CRT2 disconnected\n"); | 2249 | DRM_DEBUG_KMS("CRT2 disconnected\n"); |
2250 | bios_0_scratch &= ~ATOM_S0_CRT2_MASK; | 2250 | bios_0_scratch &= ~ATOM_S0_CRT2_MASK; |
2251 | bios_3_scratch &= ~ATOM_S3_CRT2_ACTIVE; | 2251 | bios_3_scratch &= ~ATOM_S3_CRT2_ACTIVE; |
2252 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_CRT2; | 2252 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_CRT2; |
@@ -2255,12 +2255,12 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |||
2255 | if ((radeon_encoder->devices & ATOM_DEVICE_DFP1_SUPPORT) && | 2255 | if ((radeon_encoder->devices & ATOM_DEVICE_DFP1_SUPPORT) && |
2256 | (radeon_connector->devices & ATOM_DEVICE_DFP1_SUPPORT)) { | 2256 | (radeon_connector->devices & ATOM_DEVICE_DFP1_SUPPORT)) { |
2257 | if (connected) { | 2257 | if (connected) { |
2258 | DRM_DEBUG("DFP1 connected\n"); | 2258 | DRM_DEBUG_KMS("DFP1 connected\n"); |
2259 | bios_0_scratch |= ATOM_S0_DFP1; | 2259 | bios_0_scratch |= ATOM_S0_DFP1; |
2260 | bios_3_scratch |= ATOM_S3_DFP1_ACTIVE; | 2260 | bios_3_scratch |= ATOM_S3_DFP1_ACTIVE; |
2261 | bios_6_scratch |= ATOM_S6_ACC_REQ_DFP1; | 2261 | bios_6_scratch |= ATOM_S6_ACC_REQ_DFP1; |
2262 | } else { | 2262 | } else { |
2263 | DRM_DEBUG("DFP1 disconnected\n"); | 2263 | DRM_DEBUG_KMS("DFP1 disconnected\n"); |
2264 | bios_0_scratch &= ~ATOM_S0_DFP1; | 2264 | bios_0_scratch &= ~ATOM_S0_DFP1; |
2265 | bios_3_scratch &= ~ATOM_S3_DFP1_ACTIVE; | 2265 | bios_3_scratch &= ~ATOM_S3_DFP1_ACTIVE; |
2266 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP1; | 2266 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP1; |
@@ -2269,12 +2269,12 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |||
2269 | if ((radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT) && | 2269 | if ((radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT) && |
2270 | (radeon_connector->devices & ATOM_DEVICE_DFP2_SUPPORT)) { | 2270 | (radeon_connector->devices & ATOM_DEVICE_DFP2_SUPPORT)) { |
2271 | if (connected) { | 2271 | if (connected) { |
2272 | DRM_DEBUG("DFP2 connected\n"); | 2272 | DRM_DEBUG_KMS("DFP2 connected\n"); |
2273 | bios_0_scratch |= ATOM_S0_DFP2; | 2273 | bios_0_scratch |= ATOM_S0_DFP2; |
2274 | bios_3_scratch |= ATOM_S3_DFP2_ACTIVE; | 2274 | bios_3_scratch |= ATOM_S3_DFP2_ACTIVE; |
2275 | bios_6_scratch |= ATOM_S6_ACC_REQ_DFP2; | 2275 | bios_6_scratch |= ATOM_S6_ACC_REQ_DFP2; |
2276 | } else { | 2276 | } else { |
2277 | DRM_DEBUG("DFP2 disconnected\n"); | 2277 | DRM_DEBUG_KMS("DFP2 disconnected\n"); |
2278 | bios_0_scratch &= ~ATOM_S0_DFP2; | 2278 | bios_0_scratch &= ~ATOM_S0_DFP2; |
2279 | bios_3_scratch &= ~ATOM_S3_DFP2_ACTIVE; | 2279 | bios_3_scratch &= ~ATOM_S3_DFP2_ACTIVE; |
2280 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP2; | 2280 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP2; |
@@ -2283,12 +2283,12 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |||
2283 | if ((radeon_encoder->devices & ATOM_DEVICE_DFP3_SUPPORT) && | 2283 | if ((radeon_encoder->devices & ATOM_DEVICE_DFP3_SUPPORT) && |
2284 | (radeon_connector->devices & ATOM_DEVICE_DFP3_SUPPORT)) { | 2284 | (radeon_connector->devices & ATOM_DEVICE_DFP3_SUPPORT)) { |
2285 | if (connected) { | 2285 | if (connected) { |
2286 | DRM_DEBUG("DFP3 connected\n"); | 2286 | DRM_DEBUG_KMS("DFP3 connected\n"); |
2287 | bios_0_scratch |= ATOM_S0_DFP3; | 2287 | bios_0_scratch |= ATOM_S0_DFP3; |
2288 | bios_3_scratch |= ATOM_S3_DFP3_ACTIVE; | 2288 | bios_3_scratch |= ATOM_S3_DFP3_ACTIVE; |
2289 | bios_6_scratch |= ATOM_S6_ACC_REQ_DFP3; | 2289 | bios_6_scratch |= ATOM_S6_ACC_REQ_DFP3; |
2290 | } else { | 2290 | } else { |
2291 | DRM_DEBUG("DFP3 disconnected\n"); | 2291 | DRM_DEBUG_KMS("DFP3 disconnected\n"); |
2292 | bios_0_scratch &= ~ATOM_S0_DFP3; | 2292 | bios_0_scratch &= ~ATOM_S0_DFP3; |
2293 | bios_3_scratch &= ~ATOM_S3_DFP3_ACTIVE; | 2293 | bios_3_scratch &= ~ATOM_S3_DFP3_ACTIVE; |
2294 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP3; | 2294 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP3; |
@@ -2297,12 +2297,12 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |||
2297 | if ((radeon_encoder->devices & ATOM_DEVICE_DFP4_SUPPORT) && | 2297 | if ((radeon_encoder->devices & ATOM_DEVICE_DFP4_SUPPORT) && |
2298 | (radeon_connector->devices & ATOM_DEVICE_DFP4_SUPPORT)) { | 2298 | (radeon_connector->devices & ATOM_DEVICE_DFP4_SUPPORT)) { |
2299 | if (connected) { | 2299 | if (connected) { |
2300 | DRM_DEBUG("DFP4 connected\n"); | 2300 | DRM_DEBUG_KMS("DFP4 connected\n"); |
2301 | bios_0_scratch |= ATOM_S0_DFP4; | 2301 | bios_0_scratch |= ATOM_S0_DFP4; |
2302 | bios_3_scratch |= ATOM_S3_DFP4_ACTIVE; | 2302 | bios_3_scratch |= ATOM_S3_DFP4_ACTIVE; |
2303 | bios_6_scratch |= ATOM_S6_ACC_REQ_DFP4; | 2303 | bios_6_scratch |= ATOM_S6_ACC_REQ_DFP4; |
2304 | } else { | 2304 | } else { |
2305 | DRM_DEBUG("DFP4 disconnected\n"); | 2305 | DRM_DEBUG_KMS("DFP4 disconnected\n"); |
2306 | bios_0_scratch &= ~ATOM_S0_DFP4; | 2306 | bios_0_scratch &= ~ATOM_S0_DFP4; |
2307 | bios_3_scratch &= ~ATOM_S3_DFP4_ACTIVE; | 2307 | bios_3_scratch &= ~ATOM_S3_DFP4_ACTIVE; |
2308 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP4; | 2308 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP4; |
@@ -2311,12 +2311,12 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector, | |||
2311 | if ((radeon_encoder->devices & ATOM_DEVICE_DFP5_SUPPORT) && | 2311 | if ((radeon_encoder->devices & ATOM_DEVICE_DFP5_SUPPORT) && |
2312 | (radeon_connector->devices & ATOM_DEVICE_DFP5_SUPPORT)) { | 2312 | (radeon_connector->devices & ATOM_DEVICE_DFP5_SUPPORT)) { |
2313 | if (connected) { | 2313 | if (connected) { |
2314 | DRM_DEBUG("DFP5 connected\n"); | 2314 | DRM_DEBUG_KMS("DFP5 connected\n"); |
2315 | bios_0_scratch |= ATOM_S0_DFP5; | 2315 | bios_0_scratch |= ATOM_S0_DFP5; |
2316 | bios_3_scratch |= ATOM_S3_DFP5_ACTIVE; | 2316 | bios_3_scratch |= ATOM_S3_DFP5_ACTIVE; |
2317 | bios_6_scratch |= ATOM_S6_ACC_REQ_DFP5; | 2317 | bios_6_scratch |= ATOM_S6_ACC_REQ_DFP5; |
2318 | } else { | 2318 | } else { |
2319 | DRM_DEBUG("DFP5 disconnected\n"); | 2319 | DRM_DEBUG_KMS("DFP5 disconnected\n"); |
2320 | bios_0_scratch &= ~ATOM_S0_DFP5; | 2320 | bios_0_scratch &= ~ATOM_S0_DFP5; |
2321 | bios_3_scratch &= ~ATOM_S3_DFP5_ACTIVE; | 2321 | bios_3_scratch &= ~ATOM_S3_DFP5_ACTIVE; |
2322 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP5; | 2322 | bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP5; |
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c index 5e45cb27eb98..cd2a6c254e3e 100644 --- a/drivers/gpu/drm/radeon/radeon_combios.c +++ b/drivers/gpu/drm/radeon/radeon_combios.c | |||
@@ -1205,7 +1205,7 @@ bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder, | |||
1205 | RBIOS32(tmds_info + i * 10 + 0x08); | 1205 | RBIOS32(tmds_info + i * 10 + 0x08); |
1206 | tmds->tmds_pll[i].freq = | 1206 | tmds->tmds_pll[i].freq = |
1207 | RBIOS16(tmds_info + i * 10 + 0x10); | 1207 | RBIOS16(tmds_info + i * 10 + 0x10); |
1208 | DRM_DEBUG("TMDS PLL From COMBIOS %u %x\n", | 1208 | DRM_DEBUG_KMS("TMDS PLL From COMBIOS %u %x\n", |
1209 | tmds->tmds_pll[i].freq, | 1209 | tmds->tmds_pll[i].freq, |
1210 | tmds->tmds_pll[i].value); | 1210 | tmds->tmds_pll[i].value); |
1211 | } | 1211 | } |
@@ -1223,7 +1223,7 @@ bool radeon_legacy_get_tmds_info_from_combios(struct radeon_encoder *encoder, | |||
1223 | stride += 10; | 1223 | stride += 10; |
1224 | else | 1224 | else |
1225 | stride += 6; | 1225 | stride += 6; |
1226 | DRM_DEBUG("TMDS PLL From COMBIOS %u %x\n", | 1226 | DRM_DEBUG_KMS("TMDS PLL From COMBIOS %u %x\n", |
1227 | tmds->tmds_pll[i].freq, | 1227 | tmds->tmds_pll[i].freq, |
1228 | tmds->tmds_pll[i].value); | 1228 | tmds->tmds_pll[i].value); |
1229 | } | 1229 | } |
@@ -2208,7 +2208,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2208 | uint16_t tmds_info = | 2208 | uint16_t tmds_info = |
2209 | combios_get_table_offset(dev, COMBIOS_DFP_INFO_TABLE); | 2209 | combios_get_table_offset(dev, COMBIOS_DFP_INFO_TABLE); |
2210 | if (tmds_info) { | 2210 | if (tmds_info) { |
2211 | DRM_DEBUG("Found DFP table, assuming DVI connector\n"); | 2211 | DRM_DEBUG_KMS("Found DFP table, assuming DVI connector\n"); |
2212 | 2212 | ||
2213 | radeon_add_legacy_encoder(dev, | 2213 | radeon_add_legacy_encoder(dev, |
2214 | radeon_get_encoder_id(dev, | 2214 | radeon_get_encoder_id(dev, |
@@ -2234,7 +2234,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2234 | } else { | 2234 | } else { |
2235 | uint16_t crt_info = | 2235 | uint16_t crt_info = |
2236 | combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE); | 2236 | combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE); |
2237 | DRM_DEBUG("Found CRT table, assuming VGA connector\n"); | 2237 | DRM_DEBUG_KMS("Found CRT table, assuming VGA connector\n"); |
2238 | if (crt_info) { | 2238 | if (crt_info) { |
2239 | radeon_add_legacy_encoder(dev, | 2239 | radeon_add_legacy_encoder(dev, |
2240 | radeon_get_encoder_id(dev, | 2240 | radeon_get_encoder_id(dev, |
@@ -2251,7 +2251,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2251 | CONNECTOR_OBJECT_ID_VGA, | 2251 | CONNECTOR_OBJECT_ID_VGA, |
2252 | &hpd); | 2252 | &hpd); |
2253 | } else { | 2253 | } else { |
2254 | DRM_DEBUG("No connector info found\n"); | 2254 | DRM_DEBUG_KMS("No connector info found\n"); |
2255 | return false; | 2255 | return false; |
2256 | } | 2256 | } |
2257 | } | 2257 | } |
@@ -2340,7 +2340,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2340 | ddc_i2c.valid = false; | 2340 | ddc_i2c.valid = false; |
2341 | break; | 2341 | break; |
2342 | } | 2342 | } |
2343 | DRM_DEBUG("LCD DDC Info Table found!\n"); | 2343 | DRM_DEBUG_KMS("LCD DDC Info Table found!\n"); |
2344 | } else | 2344 | } else |
2345 | ddc_i2c.valid = false; | 2345 | ddc_i2c.valid = false; |
2346 | 2346 | ||
@@ -3118,14 +3118,14 @@ radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |||
3118 | if ((radeon_encoder->devices & ATOM_DEVICE_TV1_SUPPORT) && | 3118 | if ((radeon_encoder->devices & ATOM_DEVICE_TV1_SUPPORT) && |
3119 | (radeon_connector->devices & ATOM_DEVICE_TV1_SUPPORT)) { | 3119 | (radeon_connector->devices & ATOM_DEVICE_TV1_SUPPORT)) { |
3120 | if (connected) { | 3120 | if (connected) { |
3121 | DRM_DEBUG("TV1 connected\n"); | 3121 | DRM_DEBUG_KMS("TV1 connected\n"); |
3122 | /* fix me */ | 3122 | /* fix me */ |
3123 | bios_4_scratch |= RADEON_TV1_ATTACHED_SVIDEO; | 3123 | bios_4_scratch |= RADEON_TV1_ATTACHED_SVIDEO; |
3124 | /*save->bios_4_scratch |= RADEON_TV1_ATTACHED_COMP; */ | 3124 | /*save->bios_4_scratch |= RADEON_TV1_ATTACHED_COMP; */ |
3125 | bios_5_scratch |= RADEON_TV1_ON; | 3125 | bios_5_scratch |= RADEON_TV1_ON; |
3126 | bios_5_scratch |= RADEON_ACC_REQ_TV1; | 3126 | bios_5_scratch |= RADEON_ACC_REQ_TV1; |
3127 | } else { | 3127 | } else { |
3128 | DRM_DEBUG("TV1 disconnected\n"); | 3128 | DRM_DEBUG_KMS("TV1 disconnected\n"); |
3129 | bios_4_scratch &= ~RADEON_TV1_ATTACHED_MASK; | 3129 | bios_4_scratch &= ~RADEON_TV1_ATTACHED_MASK; |
3130 | bios_5_scratch &= ~RADEON_TV1_ON; | 3130 | bios_5_scratch &= ~RADEON_TV1_ON; |
3131 | bios_5_scratch &= ~RADEON_ACC_REQ_TV1; | 3131 | bios_5_scratch &= ~RADEON_ACC_REQ_TV1; |
@@ -3134,12 +3134,12 @@ radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |||
3134 | if ((radeon_encoder->devices & ATOM_DEVICE_LCD1_SUPPORT) && | 3134 | if ((radeon_encoder->devices & ATOM_DEVICE_LCD1_SUPPORT) && |
3135 | (radeon_connector->devices & ATOM_DEVICE_LCD1_SUPPORT)) { | 3135 | (radeon_connector->devices & ATOM_DEVICE_LCD1_SUPPORT)) { |
3136 | if (connected) { | 3136 | if (connected) { |
3137 | DRM_DEBUG("LCD1 connected\n"); | 3137 | DRM_DEBUG_KMS("LCD1 connected\n"); |
3138 | bios_4_scratch |= RADEON_LCD1_ATTACHED; | 3138 | bios_4_scratch |= RADEON_LCD1_ATTACHED; |
3139 | bios_5_scratch |= RADEON_LCD1_ON; | 3139 | bios_5_scratch |= RADEON_LCD1_ON; |
3140 | bios_5_scratch |= RADEON_ACC_REQ_LCD1; | 3140 | bios_5_scratch |= RADEON_ACC_REQ_LCD1; |
3141 | } else { | 3141 | } else { |
3142 | DRM_DEBUG("LCD1 disconnected\n"); | 3142 | DRM_DEBUG_KMS("LCD1 disconnected\n"); |
3143 | bios_4_scratch &= ~RADEON_LCD1_ATTACHED; | 3143 | bios_4_scratch &= ~RADEON_LCD1_ATTACHED; |
3144 | bios_5_scratch &= ~RADEON_LCD1_ON; | 3144 | bios_5_scratch &= ~RADEON_LCD1_ON; |
3145 | bios_5_scratch &= ~RADEON_ACC_REQ_LCD1; | 3145 | bios_5_scratch &= ~RADEON_ACC_REQ_LCD1; |
@@ -3148,12 +3148,12 @@ radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |||
3148 | if ((radeon_encoder->devices & ATOM_DEVICE_CRT1_SUPPORT) && | 3148 | if ((radeon_encoder->devices & ATOM_DEVICE_CRT1_SUPPORT) && |
3149 | (radeon_connector->devices & ATOM_DEVICE_CRT1_SUPPORT)) { | 3149 | (radeon_connector->devices & ATOM_DEVICE_CRT1_SUPPORT)) { |
3150 | if (connected) { | 3150 | if (connected) { |
3151 | DRM_DEBUG("CRT1 connected\n"); | 3151 | DRM_DEBUG_KMS("CRT1 connected\n"); |
3152 | bios_4_scratch |= RADEON_CRT1_ATTACHED_COLOR; | 3152 | bios_4_scratch |= RADEON_CRT1_ATTACHED_COLOR; |
3153 | bios_5_scratch |= RADEON_CRT1_ON; | 3153 | bios_5_scratch |= RADEON_CRT1_ON; |
3154 | bios_5_scratch |= RADEON_ACC_REQ_CRT1; | 3154 | bios_5_scratch |= RADEON_ACC_REQ_CRT1; |
3155 | } else { | 3155 | } else { |
3156 | DRM_DEBUG("CRT1 disconnected\n"); | 3156 | DRM_DEBUG_KMS("CRT1 disconnected\n"); |
3157 | bios_4_scratch &= ~RADEON_CRT1_ATTACHED_MASK; | 3157 | bios_4_scratch &= ~RADEON_CRT1_ATTACHED_MASK; |
3158 | bios_5_scratch &= ~RADEON_CRT1_ON; | 3158 | bios_5_scratch &= ~RADEON_CRT1_ON; |
3159 | bios_5_scratch &= ~RADEON_ACC_REQ_CRT1; | 3159 | bios_5_scratch &= ~RADEON_ACC_REQ_CRT1; |
@@ -3162,12 +3162,12 @@ radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |||
3162 | if ((radeon_encoder->devices & ATOM_DEVICE_CRT2_SUPPORT) && | 3162 | if ((radeon_encoder->devices & ATOM_DEVICE_CRT2_SUPPORT) && |
3163 | (radeon_connector->devices & ATOM_DEVICE_CRT2_SUPPORT)) { | 3163 | (radeon_connector->devices & ATOM_DEVICE_CRT2_SUPPORT)) { |
3164 | if (connected) { | 3164 | if (connected) { |
3165 | DRM_DEBUG("CRT2 connected\n"); | 3165 | DRM_DEBUG_KMS("CRT2 connected\n"); |
3166 | bios_4_scratch |= RADEON_CRT2_ATTACHED_COLOR; | 3166 | bios_4_scratch |= RADEON_CRT2_ATTACHED_COLOR; |
3167 | bios_5_scratch |= RADEON_CRT2_ON; | 3167 | bios_5_scratch |= RADEON_CRT2_ON; |
3168 | bios_5_scratch |= RADEON_ACC_REQ_CRT2; | 3168 | bios_5_scratch |= RADEON_ACC_REQ_CRT2; |
3169 | } else { | 3169 | } else { |
3170 | DRM_DEBUG("CRT2 disconnected\n"); | 3170 | DRM_DEBUG_KMS("CRT2 disconnected\n"); |
3171 | bios_4_scratch &= ~RADEON_CRT2_ATTACHED_MASK; | 3171 | bios_4_scratch &= ~RADEON_CRT2_ATTACHED_MASK; |
3172 | bios_5_scratch &= ~RADEON_CRT2_ON; | 3172 | bios_5_scratch &= ~RADEON_CRT2_ON; |
3173 | bios_5_scratch &= ~RADEON_ACC_REQ_CRT2; | 3173 | bios_5_scratch &= ~RADEON_ACC_REQ_CRT2; |
@@ -3176,12 +3176,12 @@ radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |||
3176 | if ((radeon_encoder->devices & ATOM_DEVICE_DFP1_SUPPORT) && | 3176 | if ((radeon_encoder->devices & ATOM_DEVICE_DFP1_SUPPORT) && |
3177 | (radeon_connector->devices & ATOM_DEVICE_DFP1_SUPPORT)) { | 3177 | (radeon_connector->devices & ATOM_DEVICE_DFP1_SUPPORT)) { |
3178 | if (connected) { | 3178 | if (connected) { |
3179 | DRM_DEBUG("DFP1 connected\n"); | 3179 | DRM_DEBUG_KMS("DFP1 connected\n"); |
3180 | bios_4_scratch |= RADEON_DFP1_ATTACHED; | 3180 | bios_4_scratch |= RADEON_DFP1_ATTACHED; |
3181 | bios_5_scratch |= RADEON_DFP1_ON; | 3181 | bios_5_scratch |= RADEON_DFP1_ON; |
3182 | bios_5_scratch |= RADEON_ACC_REQ_DFP1; | 3182 | bios_5_scratch |= RADEON_ACC_REQ_DFP1; |
3183 | } else { | 3183 | } else { |
3184 | DRM_DEBUG("DFP1 disconnected\n"); | 3184 | DRM_DEBUG_KMS("DFP1 disconnected\n"); |
3185 | bios_4_scratch &= ~RADEON_DFP1_ATTACHED; | 3185 | bios_4_scratch &= ~RADEON_DFP1_ATTACHED; |
3186 | bios_5_scratch &= ~RADEON_DFP1_ON; | 3186 | bios_5_scratch &= ~RADEON_DFP1_ON; |
3187 | bios_5_scratch &= ~RADEON_ACC_REQ_DFP1; | 3187 | bios_5_scratch &= ~RADEON_ACC_REQ_DFP1; |
@@ -3190,12 +3190,12 @@ radeon_combios_connected_scratch_regs(struct drm_connector *connector, | |||
3190 | if ((radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT) && | 3190 | if ((radeon_encoder->devices & ATOM_DEVICE_DFP2_SUPPORT) && |
3191 | (radeon_connector->devices & ATOM_DEVICE_DFP2_SUPPORT)) { | 3191 | (radeon_connector->devices & ATOM_DEVICE_DFP2_SUPPORT)) { |
3192 | if (connected) { | 3192 | if (connected) { |
3193 | DRM_DEBUG("DFP2 connected\n"); | 3193 | DRM_DEBUG_KMS("DFP2 connected\n"); |
3194 | bios_4_scratch |= RADEON_DFP2_ATTACHED; | 3194 | bios_4_scratch |= RADEON_DFP2_ATTACHED; |
3195 | bios_5_scratch |= RADEON_DFP2_ON; | 3195 | bios_5_scratch |= RADEON_DFP2_ON; |
3196 | bios_5_scratch |= RADEON_ACC_REQ_DFP2; | 3196 | bios_5_scratch |= RADEON_ACC_REQ_DFP2; |
3197 | } else { | 3197 | } else { |
3198 | DRM_DEBUG("DFP2 disconnected\n"); | 3198 | DRM_DEBUG_KMS("DFP2 disconnected\n"); |
3199 | bios_4_scratch &= ~RADEON_DFP2_ATTACHED; | 3199 | bios_4_scratch &= ~RADEON_DFP2_ATTACHED; |
3200 | bios_5_scratch &= ~RADEON_DFP2_ON; | 3200 | bios_5_scratch &= ~RADEON_DFP2_ON; |
3201 | bios_5_scratch &= ~RADEON_ACC_REQ_DFP2; | 3201 | bios_5_scratch &= ~RADEON_ACC_REQ_DFP2; |
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index adccbc2c202c..41286c98b80d 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c | |||
@@ -214,7 +214,7 @@ static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encode | |||
214 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | 214 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; |
215 | drm_mode_set_name(mode); | 215 | drm_mode_set_name(mode); |
216 | 216 | ||
217 | DRM_DEBUG("Adding native panel mode %s\n", mode->name); | 217 | DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name); |
218 | } else if (native_mode->hdisplay != 0 && | 218 | } else if (native_mode->hdisplay != 0 && |
219 | native_mode->vdisplay != 0) { | 219 | native_mode->vdisplay != 0) { |
220 | /* mac laptops without an edid */ | 220 | /* mac laptops without an edid */ |
@@ -226,7 +226,7 @@ static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encode | |||
226 | */ | 226 | */ |
227 | mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); | 227 | mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false); |
228 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | 228 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; |
229 | DRM_DEBUG("Adding cvt approximation of native panel mode %s\n", mode->name); | 229 | DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name); |
230 | } | 230 | } |
231 | return mode; | 231 | return mode; |
232 | } | 232 | } |
@@ -522,7 +522,7 @@ static int radeon_lvds_set_property(struct drm_connector *connector, | |||
522 | struct radeon_encoder *radeon_encoder; | 522 | struct radeon_encoder *radeon_encoder; |
523 | enum radeon_rmx_type rmx_type; | 523 | enum radeon_rmx_type rmx_type; |
524 | 524 | ||
525 | DRM_DEBUG("\n"); | 525 | DRM_DEBUG_KMS("\n"); |
526 | if (property != dev->mode_config.scaling_mode_property) | 526 | if (property != dev->mode_config.scaling_mode_property) |
527 | return 0; | 527 | return 0; |
528 | 528 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index a68728dbd41d..283beedc2cbf 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -42,7 +42,7 @@ static void avivo_crtc_load_lut(struct drm_crtc *crtc) | |||
42 | struct radeon_device *rdev = dev->dev_private; | 42 | struct radeon_device *rdev = dev->dev_private; |
43 | int i; | 43 | int i; |
44 | 44 | ||
45 | DRM_DEBUG("%d\n", radeon_crtc->crtc_id); | 45 | DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id); |
46 | WREG32(AVIVO_DC_LUTA_CONTROL + radeon_crtc->crtc_offset, 0); | 46 | WREG32(AVIVO_DC_LUTA_CONTROL + radeon_crtc->crtc_offset, 0); |
47 | 47 | ||
48 | WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0); | 48 | WREG32(AVIVO_DC_LUTA_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0); |
@@ -75,7 +75,7 @@ static void evergreen_crtc_load_lut(struct drm_crtc *crtc) | |||
75 | struct radeon_device *rdev = dev->dev_private; | 75 | struct radeon_device *rdev = dev->dev_private; |
76 | int i; | 76 | int i; |
77 | 77 | ||
78 | DRM_DEBUG("%d\n", radeon_crtc->crtc_id); | 78 | DRM_DEBUG_KMS("%d\n", radeon_crtc->crtc_id); |
79 | WREG32(EVERGREEN_DC_LUT_CONTROL + radeon_crtc->crtc_offset, 0); | 79 | WREG32(EVERGREEN_DC_LUT_CONTROL + radeon_crtc->crtc_offset, 0); |
80 | 80 | ||
81 | WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0); | 81 | WREG32(EVERGREEN_DC_LUT_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0); |
@@ -469,7 +469,7 @@ static void radeon_compute_pll_legacy(struct radeon_pll *pll, | |||
469 | uint32_t post_div; | 469 | uint32_t post_div; |
470 | u32 pll_out_min, pll_out_max; | 470 | u32 pll_out_min, pll_out_max; |
471 | 471 | ||
472 | DRM_DEBUG("PLL freq %llu %u %u\n", freq, pll->min_ref_div, pll->max_ref_div); | 472 | DRM_DEBUG_KMS("PLL freq %llu %u %u\n", freq, pll->min_ref_div, pll->max_ref_div); |
473 | freq = freq * 1000; | 473 | freq = freq * 1000; |
474 | 474 | ||
475 | if (pll->flags & RADEON_PLL_IS_LCD) { | 475 | if (pll->flags & RADEON_PLL_IS_LCD) { |
@@ -805,7 +805,7 @@ done: | |||
805 | *ref_div_p = ref_div; | 805 | *ref_div_p = ref_div; |
806 | *post_div_p = post_div; | 806 | *post_div_p = post_div; |
807 | 807 | ||
808 | DRM_DEBUG("%u %d.%d, %d, %d\n", *dot_clock_p, *fb_div_p, *frac_fb_div_p, *ref_div_p, *post_div_p); | 808 | DRM_DEBUG_KMS("%u %d.%d, %d, %d\n", *dot_clock_p, *fb_div_p, *frac_fb_div_p, *ref_div_p, *post_div_p); |
809 | } | 809 | } |
810 | 810 | ||
811 | void radeon_compute_pll(struct radeon_pll *pll, | 811 | void radeon_compute_pll(struct radeon_pll *pll, |
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index e0b30b264c28..5e7a0536c9c9 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c | |||
@@ -205,7 +205,7 @@ void radeon_encoder_set_active_device(struct drm_encoder *encoder) | |||
205 | if (connector->encoder == encoder) { | 205 | if (connector->encoder == encoder) { |
206 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | 206 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
207 | radeon_encoder->active_device = radeon_encoder->devices & radeon_connector->devices; | 207 | radeon_encoder->active_device = radeon_encoder->devices & radeon_connector->devices; |
208 | DRM_DEBUG("setting active device to %08x from %08x %08x for encoder %d\n", | 208 | DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n", |
209 | radeon_encoder->active_device, radeon_encoder->devices, | 209 | radeon_encoder->active_device, radeon_encoder->devices, |
210 | radeon_connector->devices, encoder->encoder_type); | 210 | radeon_connector->devices, encoder->encoder_type); |
211 | } | 211 | } |
@@ -1021,7 +1021,7 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode) | |||
1021 | 1021 | ||
1022 | memset(&args, 0, sizeof(args)); | 1022 | memset(&args, 0, sizeof(args)); |
1023 | 1023 | ||
1024 | DRM_DEBUG("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n", | 1024 | DRM_DEBUG_KMS("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n", |
1025 | radeon_encoder->encoder_id, mode, radeon_encoder->devices, | 1025 | radeon_encoder->encoder_id, mode, radeon_encoder->devices, |
1026 | radeon_encoder->active_device); | 1026 | radeon_encoder->active_device); |
1027 | switch (radeon_encoder->encoder_id) { | 1027 | switch (radeon_encoder->encoder_id) { |
@@ -1484,7 +1484,7 @@ radeon_atom_dac_detect(struct drm_encoder *encoder, struct drm_connector *connec | |||
1484 | uint32_t bios_0_scratch; | 1484 | uint32_t bios_0_scratch; |
1485 | 1485 | ||
1486 | if (!atombios_dac_load_detect(encoder, connector)) { | 1486 | if (!atombios_dac_load_detect(encoder, connector)) { |
1487 | DRM_DEBUG("detect returned false \n"); | 1487 | DRM_DEBUG_KMS("detect returned false \n"); |
1488 | return connector_status_unknown; | 1488 | return connector_status_unknown; |
1489 | } | 1489 | } |
1490 | 1490 | ||
@@ -1493,7 +1493,7 @@ radeon_atom_dac_detect(struct drm_encoder *encoder, struct drm_connector *connec | |||
1493 | else | 1493 | else |
1494 | bios_0_scratch = RREG32(RADEON_BIOS_0_SCRATCH); | 1494 | bios_0_scratch = RREG32(RADEON_BIOS_0_SCRATCH); |
1495 | 1495 | ||
1496 | DRM_DEBUG("Bios 0 scratch %x %08x\n", bios_0_scratch, radeon_encoder->devices); | 1496 | DRM_DEBUG_KMS("Bios 0 scratch %x %08x\n", bios_0_scratch, radeon_encoder->devices); |
1497 | if (radeon_connector->devices & ATOM_DEVICE_CRT1_SUPPORT) { | 1497 | if (radeon_connector->devices & ATOM_DEVICE_CRT1_SUPPORT) { |
1498 | if (bios_0_scratch & ATOM_S0_CRT1_MASK) | 1498 | if (bios_0_scratch & ATOM_S0_CRT1_MASK) |
1499 | return connector_status_connected; | 1499 | return connector_status_connected; |
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index 8931c8e78101..dd0a78e954a8 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c | |||
@@ -141,7 +141,7 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
141 | } | 141 | } |
142 | } | 142 | } |
143 | if (!found) { | 143 | if (!found) { |
144 | DRM_DEBUG("unknown crtc id %d\n", value); | 144 | DRM_DEBUG_KMS("unknown crtc id %d\n", value); |
145 | return -EINVAL; | 145 | return -EINVAL; |
146 | } | 146 | } |
147 | break; | 147 | break; |
@@ -156,12 +156,12 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
156 | else if (rdev->family >= CHIP_R600) | 156 | else if (rdev->family >= CHIP_R600) |
157 | value = rdev->config.r600.tile_config; | 157 | value = rdev->config.r600.tile_config; |
158 | else { | 158 | else { |
159 | DRM_DEBUG("tiling config is r6xx+ only!\n"); | 159 | DRM_DEBUG_KMS("tiling config is r6xx+ only!\n"); |
160 | return -EINVAL; | 160 | return -EINVAL; |
161 | } | 161 | } |
162 | break; | 162 | break; |
163 | default: | 163 | default: |
164 | DRM_DEBUG("Invalid request %d\n", info->request); | 164 | DRM_DEBUG_KMS("Invalid request %d\n", info->request); |
165 | return -EINVAL; | 165 | return -EINVAL; |
166 | } | 166 | } |
167 | if (DRM_COPY_TO_USER(value_ptr, &value, sizeof(uint32_t))) { | 167 | if (DRM_COPY_TO_USER(value_ptr, &value, sizeof(uint32_t))) { |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c index e1e5255396ac..989df519a1e4 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c | |||
@@ -362,10 +362,10 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, | |||
362 | uint32_t gen_cntl_reg, gen_cntl_val; | 362 | uint32_t gen_cntl_reg, gen_cntl_val; |
363 | int r; | 363 | int r; |
364 | 364 | ||
365 | DRM_DEBUG("\n"); | 365 | DRM_DEBUG_KMS("\n"); |
366 | /* no fb bound */ | 366 | /* no fb bound */ |
367 | if (!crtc->fb) { | 367 | if (!crtc->fb) { |
368 | DRM_DEBUG("No FB bound\n"); | 368 | DRM_DEBUG_KMS("No FB bound\n"); |
369 | return 0; | 369 | return 0; |
370 | } | 370 | } |
371 | 371 | ||
@@ -528,7 +528,7 @@ static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mod | |||
528 | uint32_t crtc_v_sync_strt_wid; | 528 | uint32_t crtc_v_sync_strt_wid; |
529 | bool is_tv = false; | 529 | bool is_tv = false; |
530 | 530 | ||
531 | DRM_DEBUG("\n"); | 531 | DRM_DEBUG_KMS("\n"); |
532 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | 532 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { |
533 | if (encoder->crtc == crtc) { | 533 | if (encoder->crtc == crtc) { |
534 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 534 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
@@ -757,7 +757,7 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
757 | } | 757 | } |
758 | } | 758 | } |
759 | 759 | ||
760 | DRM_DEBUG("\n"); | 760 | DRM_DEBUG_KMS("\n"); |
761 | 761 | ||
762 | if (!use_bios_divs) { | 762 | if (!use_bios_divs) { |
763 | radeon_compute_pll(pll, mode->clock, | 763 | radeon_compute_pll(pll, mode->clock, |
@@ -772,7 +772,7 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
772 | if (!post_div->divider) | 772 | if (!post_div->divider) |
773 | post_div = &post_divs[0]; | 773 | post_div = &post_divs[0]; |
774 | 774 | ||
775 | DRM_DEBUG("dc=%u, fd=%d, rd=%d, pd=%d\n", | 775 | DRM_DEBUG_KMS("dc=%u, fd=%d, rd=%d, pd=%d\n", |
776 | (unsigned)freq, | 776 | (unsigned)freq, |
777 | feedback_div, | 777 | feedback_div, |
778 | reference_div, | 778 | reference_div, |
@@ -841,12 +841,12 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
841 | | RADEON_P2PLL_SLEEP | 841 | | RADEON_P2PLL_SLEEP |
842 | | RADEON_P2PLL_ATOMIC_UPDATE_EN)); | 842 | | RADEON_P2PLL_ATOMIC_UPDATE_EN)); |
843 | 843 | ||
844 | DRM_DEBUG("Wrote2: 0x%08x 0x%08x 0x%08x (0x%08x)\n", | 844 | DRM_DEBUG_KMS("Wrote2: 0x%08x 0x%08x 0x%08x (0x%08x)\n", |
845 | (unsigned)pll_ref_div, | 845 | (unsigned)pll_ref_div, |
846 | (unsigned)pll_fb_post_div, | 846 | (unsigned)pll_fb_post_div, |
847 | (unsigned)htotal_cntl, | 847 | (unsigned)htotal_cntl, |
848 | RREG32_PLL(RADEON_P2PLL_CNTL)); | 848 | RREG32_PLL(RADEON_P2PLL_CNTL)); |
849 | DRM_DEBUG("Wrote2: rd=%u, fd=%u, pd=%u\n", | 849 | DRM_DEBUG_KMS("Wrote2: rd=%u, fd=%u, pd=%u\n", |
850 | (unsigned)pll_ref_div & RADEON_P2PLL_REF_DIV_MASK, | 850 | (unsigned)pll_ref_div & RADEON_P2PLL_REF_DIV_MASK, |
851 | (unsigned)pll_fb_post_div & RADEON_P2PLL_FB0_DIV_MASK, | 851 | (unsigned)pll_fb_post_div & RADEON_P2PLL_FB0_DIV_MASK, |
852 | (unsigned)((pll_fb_post_div & | 852 | (unsigned)((pll_fb_post_div & |
@@ -947,12 +947,12 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
947 | | RADEON_PPLL_ATOMIC_UPDATE_EN | 947 | | RADEON_PPLL_ATOMIC_UPDATE_EN |
948 | | RADEON_PPLL_VGA_ATOMIC_UPDATE_EN)); | 948 | | RADEON_PPLL_VGA_ATOMIC_UPDATE_EN)); |
949 | 949 | ||
950 | DRM_DEBUG("Wrote: 0x%08x 0x%08x 0x%08x (0x%08x)\n", | 950 | DRM_DEBUG_KMS("Wrote: 0x%08x 0x%08x 0x%08x (0x%08x)\n", |
951 | pll_ref_div, | 951 | pll_ref_div, |
952 | pll_fb_post_div, | 952 | pll_fb_post_div, |
953 | (unsigned)htotal_cntl, | 953 | (unsigned)htotal_cntl, |
954 | RREG32_PLL(RADEON_PPLL_CNTL)); | 954 | RREG32_PLL(RADEON_PPLL_CNTL)); |
955 | DRM_DEBUG("Wrote: rd=%d, fd=%d, pd=%d\n", | 955 | DRM_DEBUG_KMS("Wrote: rd=%d, fd=%d, pd=%d\n", |
956 | pll_ref_div & RADEON_PPLL_REF_DIV_MASK, | 956 | pll_ref_div & RADEON_PPLL_REF_DIV_MASK, |
957 | pll_fb_post_div & RADEON_PPLL_FB3_DIV_MASK, | 957 | pll_fb_post_div & RADEON_PPLL_FB3_DIV_MASK, |
958 | (pll_fb_post_div & RADEON_PPLL_POST3_DIV_MASK) >> 16); | 958 | (pll_fb_post_div & RADEON_PPLL_POST3_DIV_MASK) >> 16); |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c index 5688a0cf6bbe..b8149cbc0c70 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c | |||
@@ -47,7 +47,7 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode) | |||
47 | uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man; | 47 | uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man; |
48 | int panel_pwr_delay = 2000; | 48 | int panel_pwr_delay = 2000; |
49 | bool is_mac = false; | 49 | bool is_mac = false; |
50 | DRM_DEBUG("\n"); | 50 | DRM_DEBUG_KMS("\n"); |
51 | 51 | ||
52 | if (radeon_encoder->enc_priv) { | 52 | if (radeon_encoder->enc_priv) { |
53 | if (rdev->is_atom_bios) { | 53 | if (rdev->is_atom_bios) { |
@@ -151,7 +151,7 @@ static void radeon_legacy_lvds_mode_set(struct drm_encoder *encoder, | |||
151 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 151 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
152 | uint32_t lvds_pll_cntl, lvds_gen_cntl, lvds_ss_gen_cntl; | 152 | uint32_t lvds_pll_cntl, lvds_gen_cntl, lvds_ss_gen_cntl; |
153 | 153 | ||
154 | DRM_DEBUG("\n"); | 154 | DRM_DEBUG_KMS("\n"); |
155 | 155 | ||
156 | lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL); | 156 | lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL); |
157 | lvds_pll_cntl &= ~RADEON_LVDS_PLL_EN; | 157 | lvds_pll_cntl &= ~RADEON_LVDS_PLL_EN; |
@@ -167,7 +167,7 @@ static void radeon_legacy_lvds_mode_set(struct drm_encoder *encoder, | |||
167 | } else { | 167 | } else { |
168 | struct radeon_encoder_lvds *lvds = (struct radeon_encoder_lvds *)radeon_encoder->enc_priv; | 168 | struct radeon_encoder_lvds *lvds = (struct radeon_encoder_lvds *)radeon_encoder->enc_priv; |
169 | if (lvds) { | 169 | if (lvds) { |
170 | DRM_DEBUG("bios LVDS_GEN_CNTL: 0x%x\n", lvds->lvds_gen_cntl); | 170 | DRM_DEBUG_KMS("bios LVDS_GEN_CNTL: 0x%x\n", lvds->lvds_gen_cntl); |
171 | lvds_gen_cntl = lvds->lvds_gen_cntl; | 171 | lvds_gen_cntl = lvds->lvds_gen_cntl; |
172 | lvds_ss_gen_cntl &= ~((0xf << RADEON_LVDS_PWRSEQ_DELAY1_SHIFT) | | 172 | lvds_ss_gen_cntl &= ~((0xf << RADEON_LVDS_PWRSEQ_DELAY1_SHIFT) | |
173 | (0xf << RADEON_LVDS_PWRSEQ_DELAY2_SHIFT)); | 173 | (0xf << RADEON_LVDS_PWRSEQ_DELAY2_SHIFT)); |
@@ -250,7 +250,7 @@ static void radeon_legacy_primary_dac_dpms(struct drm_encoder *encoder, int mode | |||
250 | uint32_t dac_cntl = RREG32(RADEON_DAC_CNTL); | 250 | uint32_t dac_cntl = RREG32(RADEON_DAC_CNTL); |
251 | uint32_t dac_macro_cntl = RREG32(RADEON_DAC_MACRO_CNTL); | 251 | uint32_t dac_macro_cntl = RREG32(RADEON_DAC_MACRO_CNTL); |
252 | 252 | ||
253 | DRM_DEBUG("\n"); | 253 | DRM_DEBUG_KMS("\n"); |
254 | 254 | ||
255 | switch (mode) { | 255 | switch (mode) { |
256 | case DRM_MODE_DPMS_ON: | 256 | case DRM_MODE_DPMS_ON: |
@@ -315,7 +315,7 @@ static void radeon_legacy_primary_dac_mode_set(struct drm_encoder *encoder, | |||
315 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 315 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
316 | uint32_t disp_output_cntl, dac_cntl, dac2_cntl, dac_macro_cntl; | 316 | uint32_t disp_output_cntl, dac_cntl, dac2_cntl, dac_macro_cntl; |
317 | 317 | ||
318 | DRM_DEBUG("\n"); | 318 | DRM_DEBUG_KMS("\n"); |
319 | 319 | ||
320 | if (radeon_crtc->crtc_id == 0) { | 320 | if (radeon_crtc->crtc_id == 0) { |
321 | if (rdev->family == CHIP_R200 || ASIC_IS_R300(rdev)) { | 321 | if (rdev->family == CHIP_R200 || ASIC_IS_R300(rdev)) { |
@@ -446,7 +446,7 @@ static void radeon_legacy_tmds_int_dpms(struct drm_encoder *encoder, int mode) | |||
446 | struct drm_device *dev = encoder->dev; | 446 | struct drm_device *dev = encoder->dev; |
447 | struct radeon_device *rdev = dev->dev_private; | 447 | struct radeon_device *rdev = dev->dev_private; |
448 | uint32_t fp_gen_cntl = RREG32(RADEON_FP_GEN_CNTL); | 448 | uint32_t fp_gen_cntl = RREG32(RADEON_FP_GEN_CNTL); |
449 | DRM_DEBUG("\n"); | 449 | DRM_DEBUG_KMS("\n"); |
450 | 450 | ||
451 | switch (mode) { | 451 | switch (mode) { |
452 | case DRM_MODE_DPMS_ON: | 452 | case DRM_MODE_DPMS_ON: |
@@ -502,7 +502,7 @@ static void radeon_legacy_tmds_int_mode_set(struct drm_encoder *encoder, | |||
502 | uint32_t tmp, tmds_pll_cntl, tmds_transmitter_cntl, fp_gen_cntl; | 502 | uint32_t tmp, tmds_pll_cntl, tmds_transmitter_cntl, fp_gen_cntl; |
503 | int i; | 503 | int i; |
504 | 504 | ||
505 | DRM_DEBUG("\n"); | 505 | DRM_DEBUG_KMS("\n"); |
506 | 506 | ||
507 | tmp = tmds_pll_cntl = RREG32(RADEON_TMDS_PLL_CNTL); | 507 | tmp = tmds_pll_cntl = RREG32(RADEON_TMDS_PLL_CNTL); |
508 | tmp &= 0xfffff; | 508 | tmp &= 0xfffff; |
@@ -610,7 +610,7 @@ static void radeon_legacy_tmds_ext_dpms(struct drm_encoder *encoder, int mode) | |||
610 | struct drm_device *dev = encoder->dev; | 610 | struct drm_device *dev = encoder->dev; |
611 | struct radeon_device *rdev = dev->dev_private; | 611 | struct radeon_device *rdev = dev->dev_private; |
612 | uint32_t fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL); | 612 | uint32_t fp2_gen_cntl = RREG32(RADEON_FP2_GEN_CNTL); |
613 | DRM_DEBUG("\n"); | 613 | DRM_DEBUG_KMS("\n"); |
614 | 614 | ||
615 | switch (mode) { | 615 | switch (mode) { |
616 | case DRM_MODE_DPMS_ON: | 616 | case DRM_MODE_DPMS_ON: |
@@ -666,7 +666,7 @@ static void radeon_legacy_tmds_ext_mode_set(struct drm_encoder *encoder, | |||
666 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 666 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
667 | uint32_t fp2_gen_cntl; | 667 | uint32_t fp2_gen_cntl; |
668 | 668 | ||
669 | DRM_DEBUG("\n"); | 669 | DRM_DEBUG_KMS("\n"); |
670 | 670 | ||
671 | if (rdev->is_atom_bios) { | 671 | if (rdev->is_atom_bios) { |
672 | radeon_encoder->pixel_clock = adjusted_mode->clock; | 672 | radeon_encoder->pixel_clock = adjusted_mode->clock; |
@@ -760,7 +760,7 @@ static void radeon_legacy_tv_dac_dpms(struct drm_encoder *encoder, int mode) | |||
760 | uint32_t fp2_gen_cntl = 0, crtc2_gen_cntl = 0, tv_dac_cntl = 0; | 760 | uint32_t fp2_gen_cntl = 0, crtc2_gen_cntl = 0, tv_dac_cntl = 0; |
761 | uint32_t tv_master_cntl = 0; | 761 | uint32_t tv_master_cntl = 0; |
762 | bool is_tv; | 762 | bool is_tv; |
763 | DRM_DEBUG("\n"); | 763 | DRM_DEBUG_KMS("\n"); |
764 | 764 | ||
765 | is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false; | 765 | is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false; |
766 | 766 | ||
@@ -878,7 +878,7 @@ static void radeon_legacy_tv_dac_mode_set(struct drm_encoder *encoder, | |||
878 | uint32_t disp_hw_debug = 0, fp2_gen_cntl = 0, disp_tv_out_cntl = 0; | 878 | uint32_t disp_hw_debug = 0, fp2_gen_cntl = 0, disp_tv_out_cntl = 0; |
879 | bool is_tv = false; | 879 | bool is_tv = false; |
880 | 880 | ||
881 | DRM_DEBUG("\n"); | 881 | DRM_DEBUG_KMS("\n"); |
882 | 882 | ||
883 | is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false; | 883 | is_tv = radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT ? true : false; |
884 | 884 | ||
@@ -1075,10 +1075,10 @@ static bool r300_legacy_tv_detect(struct drm_encoder *encoder, | |||
1075 | tmp = RREG32(RADEON_TV_DAC_CNTL); | 1075 | tmp = RREG32(RADEON_TV_DAC_CNTL); |
1076 | if ((tmp & RADEON_TV_DAC_GDACDET) != 0) { | 1076 | if ((tmp & RADEON_TV_DAC_GDACDET) != 0) { |
1077 | found = true; | 1077 | found = true; |
1078 | DRM_DEBUG("S-video TV connection detected\n"); | 1078 | DRM_DEBUG_KMS("S-video TV connection detected\n"); |
1079 | } else if ((tmp & RADEON_TV_DAC_BDACDET) != 0) { | 1079 | } else if ((tmp & RADEON_TV_DAC_BDACDET) != 0) { |
1080 | found = true; | 1080 | found = true; |
1081 | DRM_DEBUG("Composite TV connection detected\n"); | 1081 | DRM_DEBUG_KMS("Composite TV connection detected\n"); |
1082 | } | 1082 | } |
1083 | 1083 | ||
1084 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); | 1084 | WREG32(RADEON_TV_DAC_CNTL, tv_dac_cntl); |
@@ -1141,10 +1141,10 @@ static bool radeon_legacy_tv_detect(struct drm_encoder *encoder, | |||
1141 | tmp = RREG32(RADEON_TV_DAC_CNTL); | 1141 | tmp = RREG32(RADEON_TV_DAC_CNTL); |
1142 | if (tmp & RADEON_TV_DAC_GDACDET) { | 1142 | if (tmp & RADEON_TV_DAC_GDACDET) { |
1143 | found = true; | 1143 | found = true; |
1144 | DRM_DEBUG("S-video TV connection detected\n"); | 1144 | DRM_DEBUG_KMS("S-video TV connection detected\n"); |
1145 | } else if ((tmp & RADEON_TV_DAC_BDACDET) != 0) { | 1145 | } else if ((tmp & RADEON_TV_DAC_BDACDET) != 0) { |
1146 | found = true; | 1146 | found = true; |
1147 | DRM_DEBUG("Composite TV connection detected\n"); | 1147 | DRM_DEBUG_KMS("Composite TV connection detected\n"); |
1148 | } | 1148 | } |
1149 | 1149 | ||
1150 | WREG32(RADEON_TV_PRE_DAC_MUX_CNTL, tv_pre_dac_mux_cntl); | 1150 | WREG32(RADEON_TV_PRE_DAC_MUX_CNTL, tv_pre_dac_mux_cntl); |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_tv.c b/drivers/gpu/drm/radeon/radeon_legacy_tv.c index 032040397743..c7b6cb428d09 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_tv.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_tv.c | |||
@@ -496,7 +496,7 @@ static bool radeon_legacy_tv_init_restarts(struct drm_encoder *encoder) | |||
496 | 496 | ||
497 | restart -= v_offset + h_offset; | 497 | restart -= v_offset + h_offset; |
498 | 498 | ||
499 | DRM_DEBUG("compute_restarts: def = %u h = %d v = %d, p1 = %04x, p2 = %04x, restart = %d\n", | 499 | DRM_DEBUG_KMS("compute_restarts: def = %u h = %d v = %d, p1 = %04x, p2 = %04x, restart = %d\n", |
500 | const_ptr->def_restart, tv_dac->h_pos, tv_dac->v_pos, p1, p2, restart); | 500 | const_ptr->def_restart, tv_dac->h_pos, tv_dac->v_pos, p1, p2, restart); |
501 | 501 | ||
502 | tv_dac->tv.hrestart = restart % h_total; | 502 | tv_dac->tv.hrestart = restart % h_total; |
@@ -505,7 +505,7 @@ static bool radeon_legacy_tv_init_restarts(struct drm_encoder *encoder) | |||
505 | restart /= v_total; | 505 | restart /= v_total; |
506 | tv_dac->tv.frestart = restart % f_total; | 506 | tv_dac->tv.frestart = restart % f_total; |
507 | 507 | ||
508 | DRM_DEBUG("compute_restart: F/H/V=%u,%u,%u\n", | 508 | DRM_DEBUG_KMS("compute_restart: F/H/V=%u,%u,%u\n", |
509 | (unsigned)tv_dac->tv.frestart, | 509 | (unsigned)tv_dac->tv.frestart, |
510 | (unsigned)tv_dac->tv.vrestart, | 510 | (unsigned)tv_dac->tv.vrestart, |
511 | (unsigned)tv_dac->tv.hrestart); | 511 | (unsigned)tv_dac->tv.hrestart); |
@@ -523,7 +523,7 @@ static bool radeon_legacy_tv_init_restarts(struct drm_encoder *encoder) | |||
523 | tv_dac->tv.timing_cntl = (tv_dac->tv.timing_cntl & ~RADEON_H_INC_MASK) | | 523 | tv_dac->tv.timing_cntl = (tv_dac->tv.timing_cntl & ~RADEON_H_INC_MASK) | |
524 | ((u32)h_inc << RADEON_H_INC_SHIFT); | 524 | ((u32)h_inc << RADEON_H_INC_SHIFT); |
525 | 525 | ||
526 | DRM_DEBUG("compute_restart: h_size = %d h_inc = %d\n", tv_dac->h_size, h_inc); | 526 | DRM_DEBUG_KMS("compute_restart: h_size = %d h_inc = %d\n", tv_dac->h_size, h_inc); |
527 | 527 | ||
528 | return h_changed; | 528 | return h_changed; |
529 | } | 529 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index ed66062ae9d0..a3d25f419853 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -62,9 +62,9 @@ static int radeon_acpi_event(struct notifier_block *nb, | |||
62 | 62 | ||
63 | if (strcmp(entry->device_class, ACPI_AC_CLASS) == 0) { | 63 | if (strcmp(entry->device_class, ACPI_AC_CLASS) == 0) { |
64 | if (power_supply_is_system_supplied() > 0) | 64 | if (power_supply_is_system_supplied() > 0) |
65 | DRM_DEBUG("pm: AC\n"); | 65 | DRM_DEBUG_DRIVER("pm: AC\n"); |
66 | else | 66 | else |
67 | DRM_DEBUG("pm: DC\n"); | 67 | DRM_DEBUG_DRIVER("pm: DC\n"); |
68 | 68 | ||
69 | if (rdev->pm.pm_method == PM_METHOD_PROFILE) { | 69 | if (rdev->pm.pm_method == PM_METHOD_PROFILE) { |
70 | if (rdev->pm.profile == PM_PROFILE_AUTO) { | 70 | if (rdev->pm.profile == PM_PROFILE_AUTO) { |
@@ -198,7 +198,7 @@ static void radeon_set_power_state(struct radeon_device *rdev) | |||
198 | radeon_set_engine_clock(rdev, sclk); | 198 | radeon_set_engine_clock(rdev, sclk); |
199 | radeon_pm_debug_check_in_vbl(rdev, true); | 199 | radeon_pm_debug_check_in_vbl(rdev, true); |
200 | rdev->pm.current_sclk = sclk; | 200 | rdev->pm.current_sclk = sclk; |
201 | DRM_DEBUG("Setting: e: %d\n", sclk); | 201 | DRM_DEBUG_DRIVER("Setting: e: %d\n", sclk); |
202 | } | 202 | } |
203 | 203 | ||
204 | /* set memory clock */ | 204 | /* set memory clock */ |
@@ -207,7 +207,7 @@ static void radeon_set_power_state(struct radeon_device *rdev) | |||
207 | radeon_set_memory_clock(rdev, mclk); | 207 | radeon_set_memory_clock(rdev, mclk); |
208 | radeon_pm_debug_check_in_vbl(rdev, true); | 208 | radeon_pm_debug_check_in_vbl(rdev, true); |
209 | rdev->pm.current_mclk = mclk; | 209 | rdev->pm.current_mclk = mclk; |
210 | DRM_DEBUG("Setting: m: %d\n", mclk); | 210 | DRM_DEBUG_DRIVER("Setting: m: %d\n", mclk); |
211 | } | 211 | } |
212 | 212 | ||
213 | if (misc_after) | 213 | if (misc_after) |
@@ -219,7 +219,7 @@ static void radeon_set_power_state(struct radeon_device *rdev) | |||
219 | rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index; | 219 | rdev->pm.current_power_state_index = rdev->pm.requested_power_state_index; |
220 | rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index; | 220 | rdev->pm.current_clock_mode_index = rdev->pm.requested_clock_mode_index; |
221 | } else | 221 | } else |
222 | DRM_DEBUG("pm: GUI not idle!!!\n"); | 222 | DRM_DEBUG_DRIVER("pm: GUI not idle!!!\n"); |
223 | } | 223 | } |
224 | 224 | ||
225 | static void radeon_pm_set_clocks(struct radeon_device *rdev) | 225 | static void radeon_pm_set_clocks(struct radeon_device *rdev) |
@@ -294,27 +294,27 @@ static void radeon_pm_print_states(struct radeon_device *rdev) | |||
294 | struct radeon_power_state *power_state; | 294 | struct radeon_power_state *power_state; |
295 | struct radeon_pm_clock_info *clock_info; | 295 | struct radeon_pm_clock_info *clock_info; |
296 | 296 | ||
297 | DRM_DEBUG("%d Power State(s)\n", rdev->pm.num_power_states); | 297 | DRM_DEBUG_DRIVER("%d Power State(s)\n", rdev->pm.num_power_states); |
298 | for (i = 0; i < rdev->pm.num_power_states; i++) { | 298 | for (i = 0; i < rdev->pm.num_power_states; i++) { |
299 | power_state = &rdev->pm.power_state[i]; | 299 | power_state = &rdev->pm.power_state[i]; |
300 | DRM_DEBUG("State %d: %s\n", i, | 300 | DRM_DEBUG_DRIVER("State %d: %s\n", i, |
301 | radeon_pm_state_type_name[power_state->type]); | 301 | radeon_pm_state_type_name[power_state->type]); |
302 | if (i == rdev->pm.default_power_state_index) | 302 | if (i == rdev->pm.default_power_state_index) |
303 | DRM_DEBUG("\tDefault"); | 303 | DRM_DEBUG_DRIVER("\tDefault"); |
304 | if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP)) | 304 | if ((rdev->flags & RADEON_IS_PCIE) && !(rdev->flags & RADEON_IS_IGP)) |
305 | DRM_DEBUG("\t%d PCIE Lanes\n", power_state->pcie_lanes); | 305 | DRM_DEBUG_DRIVER("\t%d PCIE Lanes\n", power_state->pcie_lanes); |
306 | if (power_state->flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY) | 306 | if (power_state->flags & RADEON_PM_STATE_SINGLE_DISPLAY_ONLY) |
307 | DRM_DEBUG("\tSingle display only\n"); | 307 | DRM_DEBUG_DRIVER("\tSingle display only\n"); |
308 | DRM_DEBUG("\t%d Clock Mode(s)\n", power_state->num_clock_modes); | 308 | DRM_DEBUG_DRIVER("\t%d Clock Mode(s)\n", power_state->num_clock_modes); |
309 | for (j = 0; j < power_state->num_clock_modes; j++) { | 309 | for (j = 0; j < power_state->num_clock_modes; j++) { |
310 | clock_info = &(power_state->clock_info[j]); | 310 | clock_info = &(power_state->clock_info[j]); |
311 | if (rdev->flags & RADEON_IS_IGP) | 311 | if (rdev->flags & RADEON_IS_IGP) |
312 | DRM_DEBUG("\t\t%d e: %d%s\n", | 312 | DRM_DEBUG_DRIVER("\t\t%d e: %d%s\n", |
313 | j, | 313 | j, |
314 | clock_info->sclk * 10, | 314 | clock_info->sclk * 10, |
315 | clock_info->flags & RADEON_PM_MODE_NO_DISPLAY ? "\tNo display only" : ""); | 315 | clock_info->flags & RADEON_PM_MODE_NO_DISPLAY ? "\tNo display only" : ""); |
316 | else | 316 | else |
317 | DRM_DEBUG("\t\t%d e: %d\tm: %d\tv: %d%s\n", | 317 | DRM_DEBUG_DRIVER("\t\t%d e: %d\tm: %d\tv: %d%s\n", |
318 | j, | 318 | j, |
319 | clock_info->sclk * 10, | 319 | clock_info->sclk * 10, |
320 | clock_info->mclk * 10, | 320 | clock_info->mclk * 10, |
@@ -657,7 +657,7 @@ void radeon_pm_compute_clocks(struct radeon_device *rdev) | |||
657 | radeon_pm_get_dynpm_state(rdev); | 657 | radeon_pm_get_dynpm_state(rdev); |
658 | radeon_pm_set_clocks(rdev); | 658 | radeon_pm_set_clocks(rdev); |
659 | 659 | ||
660 | DRM_DEBUG("radeon: dynamic power management deactivated\n"); | 660 | DRM_DEBUG_DRIVER("radeon: dynamic power management deactivated\n"); |
661 | } | 661 | } |
662 | } else if (rdev->pm.active_crtc_count == 1) { | 662 | } else if (rdev->pm.active_crtc_count == 1) { |
663 | /* TODO: Increase clocks if needed for current mode */ | 663 | /* TODO: Increase clocks if needed for current mode */ |
@@ -674,7 +674,7 @@ void radeon_pm_compute_clocks(struct radeon_device *rdev) | |||
674 | rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; | 674 | rdev->pm.dynpm_state = DYNPM_STATE_ACTIVE; |
675 | queue_delayed_work(rdev->wq, &rdev->pm.dynpm_idle_work, | 675 | queue_delayed_work(rdev->wq, &rdev->pm.dynpm_idle_work, |
676 | msecs_to_jiffies(RADEON_IDLE_LOOP_MS)); | 676 | msecs_to_jiffies(RADEON_IDLE_LOOP_MS)); |
677 | DRM_DEBUG("radeon: dynamic power management activated\n"); | 677 | DRM_DEBUG_DRIVER("radeon: dynamic power management activated\n"); |
678 | } | 678 | } |
679 | } else { /* count == 0 */ | 679 | } else { /* count == 0 */ |
680 | if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) { | 680 | if (rdev->pm.dynpm_state != DYNPM_STATE_MINIMUM) { |
@@ -770,7 +770,7 @@ static bool radeon_pm_debug_check_in_vbl(struct radeon_device *rdev, bool finish | |||
770 | bool in_vbl = radeon_pm_in_vbl(rdev); | 770 | bool in_vbl = radeon_pm_in_vbl(rdev); |
771 | 771 | ||
772 | if (in_vbl == false) | 772 | if (in_vbl == false) |
773 | DRM_DEBUG("not in vbl for pm change %08x at %s\n", stat_crtc, | 773 | DRM_DEBUG_DRIVER("not in vbl for pm change %08x at %s\n", stat_crtc, |
774 | finish ? "exit" : "entry"); | 774 | finish ? "exit" : "entry"); |
775 | return in_vbl; | 775 | return in_vbl; |
776 | } | 776 | } |