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authorAlex Deucher <alexdeucher@gmail.com>2011-05-11 03:15:24 -0400
committerDave Airlie <airlied@redhat.com>2011-05-13 02:15:39 -0400
commitd9282fca8a763be574a2fc20b2edcc6e132cbf90 (patch)
tree156d3546ff2e1ae53385b9f858a036502e9ce9bb /drivers/gpu/drm
parentca1376d10810bc2c20c8d0821a9ee04ca2507c01 (diff)
drm/radeon/kms: fix tiling reg on fusion
The location of MC_ARB_RAMCFG changed on fusion. I've diffed all the other regs in evergreend.h and this is the only other reg that changed. Signed-off-by: Alex Deucher <alexdeucher@gmail.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c5
-rw-r--r--drivers/gpu/drm/radeon/evergreend.h1
2 files changed, 5 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index c20eac3379e6..9073e3bfb08c 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -1780,7 +1780,10 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
1780 1780
1781 1781
1782 mc_shared_chmap = RREG32(MC_SHARED_CHMAP); 1782 mc_shared_chmap = RREG32(MC_SHARED_CHMAP);
1783 mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG); 1783 if (rdev->flags & RADEON_IS_IGP)
1784 mc_arb_ramcfg = RREG32(FUS_MC_ARB_RAMCFG);
1785 else
1786 mc_arb_ramcfg = RREG32(MC_ARB_RAMCFG);
1784 1787
1785 switch (rdev->config.evergreen.max_tile_pipes) { 1788 switch (rdev->config.evergreen.max_tile_pipes) {
1786 case 1: 1789 case 1:
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index 94533849927e..fc40e0cc3451 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -200,6 +200,7 @@
200#define BURSTLENGTH_SHIFT 9 200#define BURSTLENGTH_SHIFT 9
201#define BURSTLENGTH_MASK 0x00000200 201#define BURSTLENGTH_MASK 0x00000200
202#define CHANSIZE_OVERRIDE (1 << 11) 202#define CHANSIZE_OVERRIDE (1 << 11)
203#define FUS_MC_ARB_RAMCFG 0x2768
203#define MC_VM_AGP_TOP 0x2028 204#define MC_VM_AGP_TOP 0x2028
204#define MC_VM_AGP_BOT 0x202C 205#define MC_VM_AGP_BOT 0x202C
205#define MC_VM_AGP_BASE 0x2030 206#define MC_VM_AGP_BASE 0x2030