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authorEric Anholt <eric@anholt.net>2010-03-25 14:48:48 -0400
committerEric Anholt <eric@anholt.net>2010-03-25 15:34:38 -0400
commitc751ce4f52b11ea93764a7cd44e6ae9c098d361b (patch)
tree660ed9bb766962492149d5d81d583a871148ab5d /drivers/gpu/drm
parent21d40d37eca86872f2bf0af995809ebdef25c9d9 (diff)
drm/i915: Rename many remaining uses of "output" to encoder or connector.
Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c20
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c181
2 files changed, 103 insertions, 98 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 2595c4ccc6a8..34d2652f405f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -754,8 +754,8 @@ bool intel_pipe_has_type (struct drm_crtc *crtc, int type)
754 return false; 754 return false;
755} 755}
756 756
757struct drm_connector * 757static struct drm_connector *
758intel_pipe_get_output (struct drm_crtc *crtc) 758intel_pipe_get_connector (struct drm_crtc *crtc)
759{ 759{
760 struct drm_device *dev = crtc->dev; 760 struct drm_device *dev = crtc->dev;
761 struct drm_mode_config *mode_config = &dev->mode_config; 761 struct drm_mode_config *mode_config = &dev->mode_config;
@@ -2916,7 +2916,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2916 int dspsize_reg = (plane == 0) ? DSPASIZE : DSPBSIZE; 2916 int dspsize_reg = (plane == 0) ? DSPASIZE : DSPBSIZE;
2917 int dsppos_reg = (plane == 0) ? DSPAPOS : DSPBPOS; 2917 int dsppos_reg = (plane == 0) ? DSPAPOS : DSPBPOS;
2918 int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC; 2918 int pipesrc_reg = (pipe == 0) ? PIPEASRC : PIPEBSRC;
2919 int refclk, num_outputs = 0; 2919 int refclk, num_connectors = 0;
2920 intel_clock_t clock, reduced_clock; 2920 intel_clock_t clock, reduced_clock;
2921 u32 dpll = 0, fp = 0, fp2 = 0, dspcntr, pipeconf; 2921 u32 dpll = 0, fp = 0, fp2 = 0, dspcntr, pipeconf;
2922 bool ok, has_reduced_clock = false, is_sdvo = false, is_dvo = false; 2922 bool ok, has_reduced_clock = false, is_sdvo = false, is_dvo = false;
@@ -2974,10 +2974,10 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2974 break; 2974 break;
2975 } 2975 }
2976 2976
2977 num_outputs++; 2977 num_connectors++;
2978 } 2978 }
2979 2979
2980 if (is_lvds && dev_priv->lvds_use_ssc && num_outputs < 2) { 2980 if (is_lvds && dev_priv->lvds_use_ssc && num_connectors < 2) {
2981 refclk = dev_priv->lvds_ssc_freq * 1000; 2981 refclk = dev_priv->lvds_ssc_freq * 1000;
2982 DRM_DEBUG_KMS("using SSC reference clock of %d MHz\n", 2982 DRM_DEBUG_KMS("using SSC reference clock of %d MHz\n",
2983 refclk / 1000); 2983 refclk / 1000);
@@ -3048,7 +3048,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
3048 if (is_edp) { 3048 if (is_edp) {
3049 struct drm_connector *edp; 3049 struct drm_connector *edp;
3050 target_clock = mode->clock; 3050 target_clock = mode->clock;
3051 edp = intel_pipe_get_output(crtc); 3051 edp = intel_pipe_get_connector(crtc);
3052 intel_edp_link_config(to_intel_encoder(edp), 3052 intel_edp_link_config(to_intel_encoder(edp),
3053 &lane, &link_bw); 3053 &lane, &link_bw);
3054 } else { 3054 } else {
@@ -3230,7 +3230,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
3230 /* XXX: just matching BIOS for now */ 3230 /* XXX: just matching BIOS for now */
3231 /* dpll |= PLL_REF_INPUT_TVCLKINBC; */ 3231 /* dpll |= PLL_REF_INPUT_TVCLKINBC; */
3232 dpll |= 3; 3232 dpll |= 3;
3233 else if (is_lvds && dev_priv->lvds_use_ssc && num_outputs < 2) 3233 else if (is_lvds && dev_priv->lvds_use_ssc && num_connectors < 2)
3234 dpll |= PLLB_REF_INPUT_SPREADSPECTRUMIN; 3234 dpll |= PLLB_REF_INPUT_SPREADSPECTRUMIN;
3235 else 3235 else
3236 dpll |= PLL_REF_INPUT_DREFCLK; 3236 dpll |= PLL_REF_INPUT_DREFCLK;
@@ -3654,9 +3654,9 @@ static void intel_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
3654 * detection. 3654 * detection.
3655 * 3655 *
3656 * It will be up to the load-detect code to adjust the pipe as appropriate for 3656 * It will be up to the load-detect code to adjust the pipe as appropriate for
3657 * its requirements. The pipe will be connected to no other outputs. 3657 * its requirements. The pipe will be connected to no other encoders.
3658 * 3658 *
3659 * Currently this code will only succeed if there is a pipe with no outputs 3659 * Currently this code will only succeed if there is a pipe with no encoders
3660 * configured for it. In the future, it could choose to temporarily disable 3660 * configured for it. In the future, it could choose to temporarily disable
3661 * some outputs to free up a pipe for its use. 3661 * some outputs to free up a pipe for its use.
3662 * 3662 *
@@ -3770,7 +3770,7 @@ void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder, int dpm
3770 drm_helper_disable_unused_functions(dev); 3770 drm_helper_disable_unused_functions(dev);
3771 } 3771 }
3772 3772
3773 /* Switch crtc and output back off if necessary */ 3773 /* Switch crtc and encoder back off if necessary */
3774 if (crtc->enabled && dpms_mode != DRM_MODE_DPMS_ON) { 3774 if (crtc->enabled && dpms_mode != DRM_MODE_DPMS_ON) {
3775 if (encoder->crtc == crtc) 3775 if (encoder->crtc == crtc)
3776 encoder_funcs->dpms(encoder, dpms_mode); 3776 encoder_funcs->dpms(encoder, dpms_mode);
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index ea6de3b14954..a5b049f94915 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -53,7 +53,7 @@ struct intel_sdvo_priv {
53 u8 slave_addr; 53 u8 slave_addr;
54 54
55 /* Register for the SDVO device: SDVOB or SDVOC */ 55 /* Register for the SDVO device: SDVOB or SDVOC */
56 int output_device; 56 int sdvo_reg;
57 57
58 /* Active outputs controlled by this SDVO output */ 58 /* Active outputs controlled by this SDVO output */
59 uint16_t controlled_output; 59 uint16_t controlled_output;
@@ -123,7 +123,7 @@ struct intel_sdvo_priv {
123 */ 123 */
124 struct intel_sdvo_encode encode; 124 struct intel_sdvo_encode encode;
125 125
126 /* DDC bus used by this SDVO output */ 126 /* DDC bus used by this SDVO encoder */
127 uint8_t ddc_bus; 127 uint8_t ddc_bus;
128 128
129 /* Mac mini hack -- use the same DDC as the analog connector */ 129 /* Mac mini hack -- use the same DDC as the analog connector */
@@ -176,7 +176,7 @@ static void intel_sdvo_write_sdvox(struct intel_encoder *intel_encoder, u32 val)
176 u32 bval = val, cval = val; 176 u32 bval = val, cval = val;
177 int i; 177 int i;
178 178
179 if (sdvo_priv->output_device == SDVOB) { 179 if (sdvo_priv->sdvo_reg == SDVOB) {
180 cval = I915_READ(SDVOC); 180 cval = I915_READ(SDVOC);
181 } else { 181 } else {
182 bval = I915_READ(SDVOB); 182 bval = I915_READ(SDVOB);
@@ -352,8 +352,8 @@ static const struct _sdvo_cmd_name {
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA), 352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
353}; 353};
354 354
355#define SDVO_NAME(dev_priv) ((dev_priv)->output_device == SDVOB ? "SDVOB" : "SDVOC") 355#define SDVO_NAME(dev_priv) ((dev_priv)->sdvo_reg == SDVOB ? "SDVOB" : "SDVOC")
356#define SDVO_PRIV(output) ((struct intel_sdvo_priv *) (output)->dev_priv) 356#define SDVO_PRIV(encoder) ((struct intel_sdvo_priv *) (encoder)->dev_priv)
357 357
358static void intel_sdvo_debug_write(struct intel_encoder *intel_encoder, u8 cmd, 358static void intel_sdvo_debug_write(struct intel_encoder *intel_encoder, u8 cmd,
359 void *args, int args_len) 359 void *args, int args_len)
@@ -712,13 +712,13 @@ static bool intel_sdvo_set_output_timing(struct intel_encoder *intel_encoder,
712} 712}
713 713
714static bool 714static bool
715intel_sdvo_create_preferred_input_timing(struct intel_encoder *output, 715intel_sdvo_create_preferred_input_timing(struct intel_encoder *intel_encoder,
716 uint16_t clock, 716 uint16_t clock,
717 uint16_t width, 717 uint16_t width,
718 uint16_t height) 718 uint16_t height)
719{ 719{
720 struct intel_sdvo_preferred_input_timing_args args; 720 struct intel_sdvo_preferred_input_timing_args args;
721 struct intel_sdvo_priv *sdvo_priv = output->dev_priv; 721 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
722 uint8_t status; 722 uint8_t status;
723 723
724 memset(&args, 0, sizeof(args)); 724 memset(&args, 0, sizeof(args));
@@ -732,32 +732,33 @@ intel_sdvo_create_preferred_input_timing(struct intel_encoder *output,
732 sdvo_priv->sdvo_lvds_fixed_mode->vdisplay != height)) 732 sdvo_priv->sdvo_lvds_fixed_mode->vdisplay != height))
733 args.scaled = 1; 733 args.scaled = 1;
734 734
735 intel_sdvo_write_cmd(output, SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING, 735 intel_sdvo_write_cmd(intel_encoder,
736 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
736 &args, sizeof(args)); 737 &args, sizeof(args));
737 status = intel_sdvo_read_response(output, NULL, 0); 738 status = intel_sdvo_read_response(intel_encoder, NULL, 0);
738 if (status != SDVO_CMD_STATUS_SUCCESS) 739 if (status != SDVO_CMD_STATUS_SUCCESS)
739 return false; 740 return false;
740 741
741 return true; 742 return true;
742} 743}
743 744
744static bool intel_sdvo_get_preferred_input_timing(struct intel_encoder *output, 745static bool intel_sdvo_get_preferred_input_timing(struct intel_encoder *intel_encoder,
745 struct intel_sdvo_dtd *dtd) 746 struct intel_sdvo_dtd *dtd)
746{ 747{
747 bool status; 748 bool status;
748 749
749 intel_sdvo_write_cmd(output, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1, 750 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
750 NULL, 0); 751 NULL, 0);
751 752
752 status = intel_sdvo_read_response(output, &dtd->part1, 753 status = intel_sdvo_read_response(intel_encoder, &dtd->part1,
753 sizeof(dtd->part1)); 754 sizeof(dtd->part1));
754 if (status != SDVO_CMD_STATUS_SUCCESS) 755 if (status != SDVO_CMD_STATUS_SUCCESS)
755 return false; 756 return false;
756 757
757 intel_sdvo_write_cmd(output, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2, 758 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
758 NULL, 0); 759 NULL, 0);
759 760
760 status = intel_sdvo_read_response(output, &dtd->part2, 761 status = intel_sdvo_read_response(intel_encoder, &dtd->part2,
761 sizeof(dtd->part2)); 762 sizeof(dtd->part2));
762 if (status != SDVO_CMD_STATUS_SUCCESS) 763 if (status != SDVO_CMD_STATUS_SUCCESS)
763 return false; 764 return false;
@@ -876,13 +877,13 @@ static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
876 mode->flags |= DRM_MODE_FLAG_PVSYNC; 877 mode->flags |= DRM_MODE_FLAG_PVSYNC;
877} 878}
878 879
879static bool intel_sdvo_get_supp_encode(struct intel_encoder *output, 880static bool intel_sdvo_get_supp_encode(struct intel_encoder *intel_encoder,
880 struct intel_sdvo_encode *encode) 881 struct intel_sdvo_encode *encode)
881{ 882{
882 uint8_t status; 883 uint8_t status;
883 884
884 intel_sdvo_write_cmd(output, SDVO_CMD_GET_SUPP_ENCODE, NULL, 0); 885 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_GET_SUPP_ENCODE, NULL, 0);
885 status = intel_sdvo_read_response(output, encode, sizeof(*encode)); 886 status = intel_sdvo_read_response(intel_encoder, encode, sizeof(*encode));
886 if (status != SDVO_CMD_STATUS_SUCCESS) { /* non-support means DVI */ 887 if (status != SDVO_CMD_STATUS_SUCCESS) { /* non-support means DVI */
887 memset(encode, 0, sizeof(*encode)); 888 memset(encode, 0, sizeof(*encode));
888 return false; 889 return false;
@@ -891,29 +892,30 @@ static bool intel_sdvo_get_supp_encode(struct intel_encoder *output,
891 return true; 892 return true;
892} 893}
893 894
894static bool intel_sdvo_set_encode(struct intel_encoder *output, uint8_t mode) 895static bool intel_sdvo_set_encode(struct intel_encoder *intel_encoder,
896 uint8_t mode)
895{ 897{
896 uint8_t status; 898 uint8_t status;
897 899
898 intel_sdvo_write_cmd(output, SDVO_CMD_SET_ENCODE, &mode, 1); 900 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_ENCODE, &mode, 1);
899 status = intel_sdvo_read_response(output, NULL, 0); 901 status = intel_sdvo_read_response(intel_encoder, NULL, 0);
900 902
901 return (status == SDVO_CMD_STATUS_SUCCESS); 903 return (status == SDVO_CMD_STATUS_SUCCESS);
902} 904}
903 905
904static bool intel_sdvo_set_colorimetry(struct intel_encoder *output, 906static bool intel_sdvo_set_colorimetry(struct intel_encoder *intel_encoder,
905 uint8_t mode) 907 uint8_t mode)
906{ 908{
907 uint8_t status; 909 uint8_t status;
908 910
909 intel_sdvo_write_cmd(output, SDVO_CMD_SET_COLORIMETRY, &mode, 1); 911 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
910 status = intel_sdvo_read_response(output, NULL, 0); 912 status = intel_sdvo_read_response(intel_encoder, NULL, 0);
911 913
912 return (status == SDVO_CMD_STATUS_SUCCESS); 914 return (status == SDVO_CMD_STATUS_SUCCESS);
913} 915}
914 916
915#if 0 917#if 0
916static void intel_sdvo_dump_hdmi_buf(struct intel_encoder *output) 918static void intel_sdvo_dump_hdmi_buf(struct intel_encoder *intel_encoder)
917{ 919{
918 int i, j; 920 int i, j;
919 uint8_t set_buf_index[2]; 921 uint8_t set_buf_index[2];
@@ -922,43 +924,45 @@ static void intel_sdvo_dump_hdmi_buf(struct intel_encoder *output)
922 uint8_t buf[48]; 924 uint8_t buf[48];
923 uint8_t *pos; 925 uint8_t *pos;
924 926
925 intel_sdvo_write_cmd(output, SDVO_CMD_GET_HBUF_AV_SPLIT, NULL, 0); 927 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, NULL, 0);
926 intel_sdvo_read_response(output, &av_split, 1); 928 intel_sdvo_read_response(encoder, &av_split, 1);
927 929
928 for (i = 0; i <= av_split; i++) { 930 for (i = 0; i <= av_split; i++) {
929 set_buf_index[0] = i; set_buf_index[1] = 0; 931 set_buf_index[0] = i; set_buf_index[1] = 0;
930 intel_sdvo_write_cmd(output, SDVO_CMD_SET_HBUF_INDEX, 932 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
931 set_buf_index, 2); 933 set_buf_index, 2);
932 intel_sdvo_write_cmd(output, SDVO_CMD_GET_HBUF_INFO, NULL, 0); 934 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
933 intel_sdvo_read_response(output, &buf_size, 1); 935 intel_sdvo_read_response(encoder, &buf_size, 1);
934 936
935 pos = buf; 937 pos = buf;
936 for (j = 0; j <= buf_size; j += 8) { 938 for (j = 0; j <= buf_size; j += 8) {
937 intel_sdvo_write_cmd(output, SDVO_CMD_GET_HBUF_DATA, 939 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
938 NULL, 0); 940 NULL, 0);
939 intel_sdvo_read_response(output, pos, 8); 941 intel_sdvo_read_response(encoder, pos, 8);
940 pos += 8; 942 pos += 8;
941 } 943 }
942 } 944 }
943} 945}
944#endif 946#endif
945 947
946static void intel_sdvo_set_hdmi_buf(struct intel_encoder *output, int index, 948static void intel_sdvo_set_hdmi_buf(struct intel_encoder *intel_encoder,
947 uint8_t *data, int8_t size, uint8_t tx_rate) 949 int index,
950 uint8_t *data, int8_t size, uint8_t tx_rate)
948{ 951{
949 uint8_t set_buf_index[2]; 952 uint8_t set_buf_index[2];
950 953
951 set_buf_index[0] = index; 954 set_buf_index[0] = index;
952 set_buf_index[1] = 0; 955 set_buf_index[1] = 0;
953 956
954 intel_sdvo_write_cmd(output, SDVO_CMD_SET_HBUF_INDEX, set_buf_index, 2); 957 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_HBUF_INDEX,
958 set_buf_index, 2);
955 959
956 for (; size > 0; size -= 8) { 960 for (; size > 0; size -= 8) {
957 intel_sdvo_write_cmd(output, SDVO_CMD_SET_HBUF_DATA, data, 8); 961 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_HBUF_DATA, data, 8);
958 data += 8; 962 data += 8;
959 } 963 }
960 964
961 intel_sdvo_write_cmd(output, SDVO_CMD_SET_HBUF_TXRATE, &tx_rate, 1); 965 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_HBUF_TXRATE, &tx_rate, 1);
962} 966}
963 967
964static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data, uint8_t size) 968static uint8_t intel_sdvo_calc_hbuf_csum(uint8_t *data, uint8_t size)
@@ -1033,7 +1037,7 @@ struct dip_infoframe {
1033 } __attribute__ ((packed)) u; 1037 } __attribute__ ((packed)) u;
1034} __attribute__((packed)); 1038} __attribute__((packed));
1035 1039
1036static void intel_sdvo_set_avi_infoframe(struct intel_encoder *output, 1040static void intel_sdvo_set_avi_infoframe(struct intel_encoder *intel_encoder,
1037 struct drm_display_mode * mode) 1041 struct drm_display_mode * mode)
1038{ 1042{
1039 struct dip_infoframe avi_if = { 1043 struct dip_infoframe avi_if = {
@@ -1044,15 +1048,16 @@ static void intel_sdvo_set_avi_infoframe(struct intel_encoder *output,
1044 1048
1045 avi_if.checksum = intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if, 1049 avi_if.checksum = intel_sdvo_calc_hbuf_csum((uint8_t *)&avi_if,
1046 4 + avi_if.len); 1050 4 + avi_if.len);
1047 intel_sdvo_set_hdmi_buf(output, 1, (uint8_t *)&avi_if, 4 + avi_if.len, 1051 intel_sdvo_set_hdmi_buf(intel_encoder, 1, (uint8_t *)&avi_if,
1052 4 + avi_if.len,
1048 SDVO_HBUF_TX_VSYNC); 1053 SDVO_HBUF_TX_VSYNC);
1049} 1054}
1050 1055
1051static void intel_sdvo_set_tv_format(struct intel_encoder *output) 1056static void intel_sdvo_set_tv_format(struct intel_encoder *intel_encoder)
1052{ 1057{
1053 1058
1054 struct intel_sdvo_tv_format format; 1059 struct intel_sdvo_tv_format format;
1055 struct intel_sdvo_priv *sdvo_priv = output->dev_priv; 1060 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
1056 uint32_t format_map, i; 1061 uint32_t format_map, i;
1057 uint8_t status; 1062 uint8_t status;
1058 1063
@@ -1065,10 +1070,10 @@ static void intel_sdvo_set_tv_format(struct intel_encoder *output)
1065 memcpy(&format, &format_map, sizeof(format_map) > sizeof(format) ? 1070 memcpy(&format, &format_map, sizeof(format_map) > sizeof(format) ?
1066 sizeof(format) : sizeof(format_map)); 1071 sizeof(format) : sizeof(format_map));
1067 1072
1068 intel_sdvo_write_cmd(output, SDVO_CMD_SET_TV_FORMAT, &format_map, 1073 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_TV_FORMAT, &format_map,
1069 sizeof(format)); 1074 sizeof(format));
1070 1075
1071 status = intel_sdvo_read_response(output, NULL, 0); 1076 status = intel_sdvo_read_response(intel_encoder, NULL, 0);
1072 if (status != SDVO_CMD_STATUS_SUCCESS) 1077 if (status != SDVO_CMD_STATUS_SUCCESS)
1073 DRM_DEBUG_KMS("%s: Failed to set TV format\n", 1078 DRM_DEBUG_KMS("%s: Failed to set TV format\n",
1074 SDVO_NAME(sdvo_priv)); 1079 SDVO_NAME(sdvo_priv));
@@ -1078,8 +1083,8 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1078 struct drm_display_mode *mode, 1083 struct drm_display_mode *mode,
1079 struct drm_display_mode *adjusted_mode) 1084 struct drm_display_mode *adjusted_mode)
1080{ 1085{
1081 struct intel_encoder *output = enc_to_intel_encoder(encoder); 1086 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
1082 struct intel_sdvo_priv *dev_priv = output->dev_priv; 1087 struct intel_sdvo_priv *dev_priv = intel_encoder->dev_priv;
1083 1088
1084 if (dev_priv->is_tv) { 1089 if (dev_priv->is_tv) {
1085 struct intel_sdvo_dtd output_dtd; 1090 struct intel_sdvo_dtd output_dtd;
@@ -1094,22 +1099,22 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1094 1099
1095 /* Set output timings */ 1100 /* Set output timings */
1096 intel_sdvo_get_dtd_from_mode(&output_dtd, mode); 1101 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1097 intel_sdvo_set_target_output(output, 1102 intel_sdvo_set_target_output(intel_encoder,
1098 dev_priv->controlled_output); 1103 dev_priv->controlled_output);
1099 intel_sdvo_set_output_timing(output, &output_dtd); 1104 intel_sdvo_set_output_timing(intel_encoder, &output_dtd);
1100 1105
1101 /* Set the input timing to the screen. Assume always input 0. */ 1106 /* Set the input timing to the screen. Assume always input 0. */
1102 intel_sdvo_set_target_input(output, true, false); 1107 intel_sdvo_set_target_input(intel_encoder, true, false);
1103 1108
1104 1109
1105 success = intel_sdvo_create_preferred_input_timing(output, 1110 success = intel_sdvo_create_preferred_input_timing(intel_encoder,
1106 mode->clock / 10, 1111 mode->clock / 10,
1107 mode->hdisplay, 1112 mode->hdisplay,
1108 mode->vdisplay); 1113 mode->vdisplay);
1109 if (success) { 1114 if (success) {
1110 struct intel_sdvo_dtd input_dtd; 1115 struct intel_sdvo_dtd input_dtd;
1111 1116
1112 intel_sdvo_get_preferred_input_timing(output, 1117 intel_sdvo_get_preferred_input_timing(intel_encoder,
1113 &input_dtd); 1118 &input_dtd);
1114 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); 1119 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1115 dev_priv->sdvo_flags = input_dtd.part2.sdvo_flags; 1120 dev_priv->sdvo_flags = input_dtd.part2.sdvo_flags;
@@ -1132,16 +1137,16 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1132 intel_sdvo_get_dtd_from_mode(&output_dtd, 1137 intel_sdvo_get_dtd_from_mode(&output_dtd,
1133 dev_priv->sdvo_lvds_fixed_mode); 1138 dev_priv->sdvo_lvds_fixed_mode);
1134 1139
1135 intel_sdvo_set_target_output(output, 1140 intel_sdvo_set_target_output(intel_encoder,
1136 dev_priv->controlled_output); 1141 dev_priv->controlled_output);
1137 intel_sdvo_set_output_timing(output, &output_dtd); 1142 intel_sdvo_set_output_timing(intel_encoder, &output_dtd);
1138 1143
1139 /* Set the input timing to the screen. Assume always input 0. */ 1144 /* Set the input timing to the screen. Assume always input 0. */
1140 intel_sdvo_set_target_input(output, true, false); 1145 intel_sdvo_set_target_input(intel_encoder, true, false);
1141 1146
1142 1147
1143 success = intel_sdvo_create_preferred_input_timing( 1148 success = intel_sdvo_create_preferred_input_timing(
1144 output, 1149 intel_encoder,
1145 mode->clock / 10, 1150 mode->clock / 10,
1146 mode->hdisplay, 1151 mode->hdisplay,
1147 mode->vdisplay); 1152 mode->vdisplay);
@@ -1149,7 +1154,7 @@ static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
1149 if (success) { 1154 if (success) {
1150 struct intel_sdvo_dtd input_dtd; 1155 struct intel_sdvo_dtd input_dtd;
1151 1156
1152 intel_sdvo_get_preferred_input_timing(output, 1157 intel_sdvo_get_preferred_input_timing(intel_encoder,
1153 &input_dtd); 1158 &input_dtd);
1154 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd); 1159 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1155 dev_priv->sdvo_flags = input_dtd.part2.sdvo_flags; 1160 dev_priv->sdvo_flags = input_dtd.part2.sdvo_flags;
@@ -1181,8 +1186,8 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1181 struct drm_i915_private *dev_priv = dev->dev_private; 1186 struct drm_i915_private *dev_priv = dev->dev_private;
1182 struct drm_crtc *crtc = encoder->crtc; 1187 struct drm_crtc *crtc = encoder->crtc;
1183 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 1188 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
1184 struct intel_encoder *output = enc_to_intel_encoder(encoder); 1189 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
1185 struct intel_sdvo_priv *sdvo_priv = output->dev_priv; 1190 struct intel_sdvo_priv *sdvo_priv = intel_encoder->dev_priv;
1186 u32 sdvox = 0; 1191 u32 sdvox = 0;
1187 int sdvo_pixel_multiply; 1192 int sdvo_pixel_multiply;
1188 struct intel_sdvo_in_out_map in_out; 1193 struct intel_sdvo_in_out_map in_out;
@@ -1201,12 +1206,12 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1201 in_out.in0 = sdvo_priv->controlled_output; 1206 in_out.in0 = sdvo_priv->controlled_output;
1202 in_out.in1 = 0; 1207 in_out.in1 = 0;
1203 1208
1204 intel_sdvo_write_cmd(output, SDVO_CMD_SET_IN_OUT_MAP, 1209 intel_sdvo_write_cmd(intel_encoder, SDVO_CMD_SET_IN_OUT_MAP,
1205 &in_out, sizeof(in_out)); 1210 &in_out, sizeof(in_out));
1206 status = intel_sdvo_read_response(output, NULL, 0); 1211 status = intel_sdvo_read_response(intel_encoder, NULL, 0);
1207 1212
1208 if (sdvo_priv->is_hdmi) { 1213 if (sdvo_priv->is_hdmi) {
1209 intel_sdvo_set_avi_infoframe(output, mode); 1214 intel_sdvo_set_avi_infoframe(intel_encoder, mode);
1210 sdvox |= SDVO_AUDIO_ENABLE; 1215 sdvox |= SDVO_AUDIO_ENABLE;
1211 } 1216 }
1212 1217
@@ -1223,16 +1228,16 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1223 */ 1228 */
1224 if (!sdvo_priv->is_tv && !sdvo_priv->is_lvds) { 1229 if (!sdvo_priv->is_tv && !sdvo_priv->is_lvds) {
1225 /* Set the output timing to the screen */ 1230 /* Set the output timing to the screen */
1226 intel_sdvo_set_target_output(output, 1231 intel_sdvo_set_target_output(intel_encoder,
1227 sdvo_priv->controlled_output); 1232 sdvo_priv->controlled_output);
1228 intel_sdvo_set_output_timing(output, &input_dtd); 1233 intel_sdvo_set_output_timing(intel_encoder, &input_dtd);
1229 } 1234 }
1230 1235
1231 /* Set the input timing to the screen. Assume always input 0. */ 1236 /* Set the input timing to the screen. Assume always input 0. */
1232 intel_sdvo_set_target_input(output, true, false); 1237 intel_sdvo_set_target_input(intel_encoder, true, false);
1233 1238
1234 if (sdvo_priv->is_tv) 1239 if (sdvo_priv->is_tv)
1235 intel_sdvo_set_tv_format(output); 1240 intel_sdvo_set_tv_format(intel_encoder);
1236 1241
1237 /* We would like to use intel_sdvo_create_preferred_input_timing() to 1242 /* We would like to use intel_sdvo_create_preferred_input_timing() to
1238 * provide the device with a timing it can support, if it supports that 1243 * provide the device with a timing it can support, if it supports that
@@ -1240,29 +1245,29 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1240 * output the preferred timing, and we don't support that currently. 1245 * output the preferred timing, and we don't support that currently.
1241 */ 1246 */
1242#if 0 1247#if 0
1243 success = intel_sdvo_create_preferred_input_timing(output, clock, 1248 success = intel_sdvo_create_preferred_input_timing(encoder, clock,
1244 width, height); 1249 width, height);
1245 if (success) { 1250 if (success) {
1246 struct intel_sdvo_dtd *input_dtd; 1251 struct intel_sdvo_dtd *input_dtd;
1247 1252
1248 intel_sdvo_get_preferred_input_timing(output, &input_dtd); 1253 intel_sdvo_get_preferred_input_timing(encoder, &input_dtd);
1249 intel_sdvo_set_input_timing(output, &input_dtd); 1254 intel_sdvo_set_input_timing(encoder, &input_dtd);
1250 } 1255 }
1251#else 1256#else
1252 intel_sdvo_set_input_timing(output, &input_dtd); 1257 intel_sdvo_set_input_timing(intel_encoder, &input_dtd);
1253#endif 1258#endif
1254 1259
1255 switch (intel_sdvo_get_pixel_multiplier(mode)) { 1260 switch (intel_sdvo_get_pixel_multiplier(mode)) {
1256 case 1: 1261 case 1:
1257 intel_sdvo_set_clock_rate_mult(output, 1262 intel_sdvo_set_clock_rate_mult(intel_encoder,
1258 SDVO_CLOCK_RATE_MULT_1X); 1263 SDVO_CLOCK_RATE_MULT_1X);
1259 break; 1264 break;
1260 case 2: 1265 case 2:
1261 intel_sdvo_set_clock_rate_mult(output, 1266 intel_sdvo_set_clock_rate_mult(intel_encoder,
1262 SDVO_CLOCK_RATE_MULT_2X); 1267 SDVO_CLOCK_RATE_MULT_2X);
1263 break; 1268 break;
1264 case 4: 1269 case 4:
1265 intel_sdvo_set_clock_rate_mult(output, 1270 intel_sdvo_set_clock_rate_mult(intel_encoder,
1266 SDVO_CLOCK_RATE_MULT_4X); 1271 SDVO_CLOCK_RATE_MULT_4X);
1267 break; 1272 break;
1268 } 1273 }
@@ -1273,8 +1278,8 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1273 SDVO_VSYNC_ACTIVE_HIGH | 1278 SDVO_VSYNC_ACTIVE_HIGH |
1274 SDVO_HSYNC_ACTIVE_HIGH; 1279 SDVO_HSYNC_ACTIVE_HIGH;
1275 } else { 1280 } else {
1276 sdvox |= I915_READ(sdvo_priv->output_device); 1281 sdvox |= I915_READ(sdvo_priv->sdvo_reg);
1277 switch (sdvo_priv->output_device) { 1282 switch (sdvo_priv->sdvo_reg) {
1278 case SDVOB: 1283 case SDVOB:
1279 sdvox &= SDVOB_PRESERVE_MASK; 1284 sdvox &= SDVOB_PRESERVE_MASK;
1280 break; 1285 break;
@@ -1298,7 +1303,7 @@ static void intel_sdvo_mode_set(struct drm_encoder *encoder,
1298 1303
1299 if (sdvo_priv->sdvo_flags & SDVO_NEED_TO_STALL) 1304 if (sdvo_priv->sdvo_flags & SDVO_NEED_TO_STALL)
1300 sdvox |= SDVO_STALL_SELECT; 1305 sdvox |= SDVO_STALL_SELECT;
1301 intel_sdvo_write_sdvox(output, sdvox); 1306 intel_sdvo_write_sdvox(intel_encoder, sdvox);
1302} 1307}
1303 1308
1304static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode) 1309static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
@@ -1315,7 +1320,7 @@ static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1315 intel_sdvo_set_encoder_power_state(intel_encoder, mode); 1320 intel_sdvo_set_encoder_power_state(intel_encoder, mode);
1316 1321
1317 if (mode == DRM_MODE_DPMS_OFF) { 1322 if (mode == DRM_MODE_DPMS_OFF) {
1318 temp = I915_READ(sdvo_priv->output_device); 1323 temp = I915_READ(sdvo_priv->sdvo_reg);
1319 if ((temp & SDVO_ENABLE) != 0) { 1324 if ((temp & SDVO_ENABLE) != 0) {
1320 intel_sdvo_write_sdvox(intel_encoder, temp & ~SDVO_ENABLE); 1325 intel_sdvo_write_sdvox(intel_encoder, temp & ~SDVO_ENABLE);
1321 } 1326 }
@@ -1325,7 +1330,7 @@ static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1325 int i; 1330 int i;
1326 u8 status; 1331 u8 status;
1327 1332
1328 temp = I915_READ(sdvo_priv->output_device); 1333 temp = I915_READ(sdvo_priv->sdvo_reg);
1329 if ((temp & SDVO_ENABLE) == 0) 1334 if ((temp & SDVO_ENABLE) == 0)
1330 intel_sdvo_write_sdvox(intel_encoder, temp | SDVO_ENABLE); 1335 intel_sdvo_write_sdvox(intel_encoder, temp | SDVO_ENABLE);
1331 for (i = 0; i < 2; i++) 1336 for (i = 0; i < 2; i++)
@@ -1388,7 +1393,7 @@ static void intel_sdvo_save(struct drm_connector *connector)
1388 /* XXX: Save TV format/enhancements. */ 1393 /* XXX: Save TV format/enhancements. */
1389 } 1394 }
1390 1395
1391 sdvo_priv->save_SDVOX = I915_READ(sdvo_priv->output_device); 1396 sdvo_priv->save_SDVOX = I915_READ(sdvo_priv->sdvo_reg);
1392} 1397}
1393 1398
1394static void intel_sdvo_restore(struct drm_connector *connector) 1399static void intel_sdvo_restore(struct drm_connector *connector)
@@ -1499,10 +1504,10 @@ struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1499 1504
1500 sdvo = iout->dev_priv; 1505 sdvo = iout->dev_priv;
1501 1506
1502 if (sdvo->output_device == SDVOB && sdvoB) 1507 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1503 return connector; 1508 return connector;
1504 1509
1505 if (sdvo->output_device == SDVOC && !sdvoB) 1510 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1506 return connector; 1511 return connector;
1507 1512
1508 } 1513 }
@@ -2248,12 +2253,12 @@ static struct i2c_algorithm intel_sdvo_i2c_bit_algo = {
2248}; 2253};
2249 2254
2250static u8 2255static u8
2251intel_sdvo_get_slave_addr(struct drm_device *dev, int output_device) 2256intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
2252{ 2257{
2253 struct drm_i915_private *dev_priv = dev->dev_private; 2258 struct drm_i915_private *dev_priv = dev->dev_private;
2254 struct sdvo_device_mapping *my_mapping, *other_mapping; 2259 struct sdvo_device_mapping *my_mapping, *other_mapping;
2255 2260
2256 if (output_device == SDVOB) { 2261 if (sdvo_reg == SDVOB) {
2257 my_mapping = &dev_priv->sdvo_mappings[0]; 2262 my_mapping = &dev_priv->sdvo_mappings[0];
2258 other_mapping = &dev_priv->sdvo_mappings[1]; 2263 other_mapping = &dev_priv->sdvo_mappings[1];
2259 } else { 2264 } else {
@@ -2278,7 +2283,7 @@ intel_sdvo_get_slave_addr(struct drm_device *dev, int output_device)
2278 /* No SDVO device info is found for another DVO port, 2283 /* No SDVO device info is found for another DVO port,
2279 * so use mapping assumption we had before BIOS parsing. 2284 * so use mapping assumption we had before BIOS parsing.
2280 */ 2285 */
2281 if (output_device == SDVOB) 2286 if (sdvo_reg == SDVOB)
2282 return 0x70; 2287 return 0x70;
2283 else 2288 else
2284 return 0x72; 2289 return 0x72;
@@ -2764,7 +2769,7 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector)
2764 return; 2769 return;
2765} 2770}
2766 2771
2767bool intel_sdvo_init(struct drm_device *dev, int output_device) 2772bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2768{ 2773{
2769 struct drm_i915_private *dev_priv = dev->dev_private; 2774 struct drm_i915_private *dev_priv = dev->dev_private;
2770 struct drm_connector *connector; 2775 struct drm_connector *connector;
@@ -2780,13 +2785,13 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
2780 } 2785 }
2781 2786
2782 sdvo_priv = (struct intel_sdvo_priv *)(intel_encoder + 1); 2787 sdvo_priv = (struct intel_sdvo_priv *)(intel_encoder + 1);
2783 sdvo_priv->output_device = output_device; 2788 sdvo_priv->sdvo_reg = sdvo_reg;
2784 2789
2785 intel_encoder->dev_priv = sdvo_priv; 2790 intel_encoder->dev_priv = sdvo_priv;
2786 intel_encoder->type = INTEL_OUTPUT_SDVO; 2791 intel_encoder->type = INTEL_OUTPUT_SDVO;
2787 2792
2788 /* setup the DDC bus. */ 2793 /* setup the DDC bus. */
2789 if (output_device == SDVOB) 2794 if (sdvo_reg == SDVOB)
2790 intel_encoder->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOB"); 2795 intel_encoder->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOB");
2791 else 2796 else
2792 intel_encoder->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOC"); 2797 intel_encoder->i2c_bus = intel_i2c_create(dev, GPIOE, "SDVOCTRL_E for SDVOC");
@@ -2794,7 +2799,7 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
2794 if (!intel_encoder->i2c_bus) 2799 if (!intel_encoder->i2c_bus)
2795 goto err_inteloutput; 2800 goto err_inteloutput;
2796 2801
2797 sdvo_priv->slave_addr = intel_sdvo_get_slave_addr(dev, output_device); 2802 sdvo_priv->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg);
2798 2803
2799 /* Save the bit-banging i2c functionality for use by the DDC wrapper */ 2804 /* Save the bit-banging i2c functionality for use by the DDC wrapper */
2800 intel_sdvo_i2c_bit_algo.functionality = intel_encoder->i2c_bus->algo->functionality; 2805 intel_sdvo_i2c_bit_algo.functionality = intel_encoder->i2c_bus->algo->functionality;
@@ -2803,13 +2808,13 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
2803 for (i = 0; i < 0x40; i++) { 2808 for (i = 0; i < 0x40; i++) {
2804 if (!intel_sdvo_read_byte(intel_encoder, i, &ch[i])) { 2809 if (!intel_sdvo_read_byte(intel_encoder, i, &ch[i])) {
2805 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n", 2810 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2806 output_device == SDVOB ? 'B' : 'C'); 2811 sdvo_reg == SDVOB ? 'B' : 'C');
2807 goto err_i2c; 2812 goto err_i2c;
2808 } 2813 }
2809 } 2814 }
2810 2815
2811 /* setup the DDC bus. */ 2816 /* setup the DDC bus. */
2812 if (output_device == SDVOB) { 2817 if (sdvo_reg == SDVOB) {
2813 intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS"); 2818 intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS");
2814 sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA, 2819 sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA,
2815 "SDVOB/VGA DDC BUS"); 2820 "SDVOB/VGA DDC BUS");
@@ -2833,7 +2838,7 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
2833 if (intel_sdvo_output_setup(intel_encoder, 2838 if (intel_sdvo_output_setup(intel_encoder,
2834 sdvo_priv->caps.output_flags) != true) { 2839 sdvo_priv->caps.output_flags) != true) {
2835 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n", 2840 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2836 output_device == SDVOB ? 'B' : 'C'); 2841 sdvo_reg == SDVOB ? 'B' : 'C');
2837 goto err_i2c; 2842 goto err_i2c;
2838 } 2843 }
2839 2844