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authorJesse Barnes <jbarnes@virtuousgeek.org>2012-04-10 14:58:04 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-04-12 15:14:11 -0400
commitbfa3384a9a84aaaa59443bbd776c142e7dba4b0f (patch)
tree67e70b74eb765096138a3e4d0490475a5db3883f /drivers/gpu/drm
parentf817586cebf1b946d1f327f9a596048efd6b64e9 (diff)
drm/i915: check PPS regs for sanity when using eDP
If these regs don't have valid values, the panel won't come up, and may even cause a system hang. So do a basic sanity check when an eDP panel is detected. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=44305 Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 110552ff302c..6346b29ee934 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -2462,6 +2462,13 @@ intel_dp_init(struct drm_device *dev, int output_reg)
2462 pp_off = I915_READ(PCH_PP_OFF_DELAYS); 2462 pp_off = I915_READ(PCH_PP_OFF_DELAYS);
2463 pp_div = I915_READ(PCH_PP_DIVISOR); 2463 pp_div = I915_READ(PCH_PP_DIVISOR);
2464 2464
2465 if (!pp_on || !pp_off || !pp_div) {
2466 DRM_INFO("bad panel power sequencing delays, disabling panel\n");
2467 intel_dp_encoder_destroy(&intel_dp->base.base);
2468 intel_dp_destroy(&intel_connector->base);
2469 return;
2470 }
2471
2465 /* Pull timing values out of registers */ 2472 /* Pull timing values out of registers */
2466 cur.t1_t3 = (pp_on & PANEL_POWER_UP_DELAY_MASK) >> 2473 cur.t1_t3 = (pp_on & PANEL_POWER_UP_DELAY_MASK) >>
2467 PANEL_POWER_UP_DELAY_SHIFT; 2474 PANEL_POWER_UP_DELAY_SHIFT;