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authorChris Wilson <chris@chris-wilson.co.uk>2010-10-01 09:57:56 -0400
committerChris Wilson <chris@chris-wilson.co.uk>2010-10-01 09:57:56 -0400
commitae681d969ac0946e09636f2bef7a126d73e1ad6b (patch)
treedc26ce897c7b46a515665e6c56f11d1493f5bdb2 /drivers/gpu/drm
parent2fa772f34042cd4ddfb4ffaf5c24f0ce8c1025e9 (diff)
drm/i915: If the GPU hangs twice within 5 seconds, declare it wedged.
The issue is that we may become stuck executing a long running shader and continually attempt to reset the GPU. (Or maybe we tickle some bug and need to break the vicious cycle.) So if we are detect a second hang within 5 seconds, give up trying to programme the GPU and report it wedged. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c15
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h2
2 files changed, 11 insertions, 6 deletions
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index f3243a3abc37..c3decb2fef4b 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -383,6 +383,11 @@ static int i965_do_reset(struct drm_device *dev, u8 flags)
383{ 383{
384 u8 gdrst; 384 u8 gdrst;
385 385
386 /*
387 * Set the domains we want to reset (GRDOM/bits 2 and 3) as
388 * well as the reset bit (GR/bit 0). Setting the GR bit
389 * triggers the reset; when done, the hardware will clear it.
390 */
386 pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst); 391 pci_read_config_byte(dev->pdev, I965_GDRST, &gdrst);
387 pci_write_config_byte(dev->pdev, I965_GDRST, gdrst | flags | 0x1); 392 pci_write_config_byte(dev->pdev, I965_GDRST, gdrst | flags | 0x1);
388 393
@@ -427,13 +432,10 @@ int i915_reset(struct drm_device *dev, u8 flags)
427 432
428 i915_gem_reset(dev); 433 i915_gem_reset(dev);
429 434
430 /*
431 * Set the domains we want to reset (GRDOM/bits 2 and 3) as
432 * well as the reset bit (GR/bit 0). Setting the GR bit
433 * triggers the reset; when done, the hardware will clear it.
434 */
435 ret = -ENODEV; 435 ret = -ENODEV;
436 switch (INTEL_INFO(dev)->gen) { 436 if (get_seconds() - dev_priv->last_gpu_reset < 5) {
437 DRM_ERROR("GPU hanging too fast, declaring wedged!\n");
438 } else switch (INTEL_INFO(dev)->gen) {
437 case 5: 439 case 5:
438 ret = ironlake_do_reset(dev, flags); 440 ret = ironlake_do_reset(dev, flags);
439 break; 441 break;
@@ -444,6 +446,7 @@ int i915_reset(struct drm_device *dev, u8 flags)
444 ret = i8xx_do_reset(dev, flags); 446 ret = i8xx_do_reset(dev, flags);
445 break; 447 break;
446 } 448 }
449 dev_priv->last_gpu_reset = get_seconds();
447 if (ret) { 450 if (ret) {
448 DRM_ERROR("Failed to reset chip.\n"); 451 DRM_ERROR("Failed to reset chip.\n");
449 mutex_unlock(&dev->struct_mutex); 452 mutex_unlock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index d19a26af3f8e..73ad8bff2c2a 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -699,6 +699,8 @@ typedef struct drm_i915_private {
699 struct drm_mm_node *compressed_fb; 699 struct drm_mm_node *compressed_fb;
700 struct drm_mm_node *compressed_llb; 700 struct drm_mm_node *compressed_llb;
701 701
702 unsigned long last_gpu_reset;
703
702 /* list of fbdev register on this device */ 704 /* list of fbdev register on this device */
703 struct intel_fbdev *fbdev; 705 struct intel_fbdev *fbdev;
704} drm_i915_private_t; 706} drm_i915_private_t;