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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-05-13 16:29:25 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-05-19 16:42:54 -0400
commita9dcf84b14ef4e9a609910367576995e6f32f3dc (patch)
tree2ca6e9f7faf5421a6e1307d3e0c7f313de9acd46 /drivers/gpu/drm
parent83ee9e645846f0c56bd9b33ee28ead03b416bb25 (diff)
drm/i915: don't clobber the pipe param in sanitize_modesetting
... we need it later on in the function to clean up pipe <-> plane associations. This regression has been introduced in commit f47166d2b0001fcb752b40c5a2d4db986dfbea68 Author: Chris Wilson <chris@chris-wilson.co.uk> Date: Thu Mar 22 15:00:50 2012 +0000 drm/i915: Sanitize BIOS debugging bits from PIPECONF Spotted by staring at debug output of an (as it turns out) totally unrelated bug. v2: I've totally failed to do the s/pipe/i/ correctly, spotted by Chris Wilson. Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com> Cc: stable@kernel.org (the regression was Cc: stable, too) Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/i915/intel_display.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 391439fa17b2..956b22899b71 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -6253,10 +6253,11 @@ static void intel_sanitize_modesetting(struct drm_device *dev,
6253{ 6253{
6254 struct drm_i915_private *dev_priv = dev->dev_private; 6254 struct drm_i915_private *dev_priv = dev->dev_private;
6255 u32 reg, val; 6255 u32 reg, val;
6256 int i;
6256 6257
6257 /* Clear any frame start delays used for debugging left by the BIOS */ 6258 /* Clear any frame start delays used for debugging left by the BIOS */
6258 for_each_pipe(pipe) { 6259 for_each_pipe(i) {
6259 reg = PIPECONF(pipe); 6260 reg = PIPECONF(i);
6260 I915_WRITE(reg, I915_READ(reg) & ~PIPECONF_FRAME_START_DELAY_MASK); 6261 I915_WRITE(reg, I915_READ(reg) & ~PIPECONF_FRAME_START_DELAY_MASK);
6261 } 6262 }
6262 6263