drm/i915: Give names to the CCK_DISPLAY_CLOCK_CONTROL bits

Avoid using magic values for CCK frequency bits. Also the mask we were
using for the requested frequency was one bit too short. Fix it up.

Note: This also fixes the #define for a mask (spotted by Jesse in his
review).

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[danvet: Add note about mask change.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

2 files changed, 7 insertions, 2 deletions

diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 348856787b7c..66151ff1535d 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -584,6 +584,11 @@ enum punit_power_well {
 #define  DSI_PLL_M1_DIV_SHIFT                   0
 #define  DSI_PLL_M1_DIV_MASK                    (0x1ff << 0)
 #define CCK_DISPLAY_CLOCK_CONTROL               0x6b
+#define  DISPLAY_TRUNK_FORCE_ON                 (1 << 17)
+#define  DISPLAY_TRUNK_FORCE_OFF                (1 << 16)
+#define  DISPLAY_FREQUENCY_STATUS               (0x1f << 8)
+#define  DISPLAY_FREQUENCY_STATUS_SHIFT         8
+#define  DISPLAY_FREQUENCY_VALUES               (0x1f << 0)
 
 /**
  * DOC: DPIO
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 11a303ecb058..3feaaba3616d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4516,7 +4516,7 @@ static void valleyview_set_cdclk(struct drm_device *dev, int cdclk)
                 mutex_lock(&dev_priv->dpio_lock);
                 /* adjust cdclk divider */
                 val = vlv_cck_read(dev_priv, CCK_DISPLAY_CLOCK_CONTROL);
-                val &= ~0xf;
+                val &= ~DISPLAY_FREQUENCY_VALUES;
                 val |= divider;
                 vlv_cck_write(dev_priv, CCK_DISPLAY_CLOCK_CONTROL, val);
                 mutex_unlock(&dev_priv->dpio_lock);
@@ -4553,7 +4553,7 @@ int valleyview_cur_cdclk(struct drm_i915_private *dev_priv)
         divider = vlv_cck_read(dev_priv, CCK_DISPLAY_CLOCK_CONTROL);
         mutex_unlock(&dev_priv->dpio_lock);
 
-        divider &= 0xf;
+        divider &= DISPLAY_FREQUENCY_VALUES;
 
         cur_cdclk = DIV_ROUND_CLOSEST(vco << 1, divider + 1);