drm/radeon: add DisplayPort MST support (v2)

This adds initial DP 1.2 MST support to radeon, on CAYMAN
and up in theory.

This is off by default.

v2: agd5f:
- add UNIPHY3 offsets
- move atom cmd table code into atombios_encoders.c
- whitespace cleanup
- replace some magic numbers with proper defines

Signed-off-by: Dave Airlie <airlied@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

13 files changed, 998 insertions, 6 deletions

diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index fa635f09bb0f..dea53e36a2ef 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -81,7 +81,7 @@ radeon-y += radeon_device.o radeon_asic.o radeon_kms.o \
         rv770_smc.o cypress_dpm.o btc_dpm.o sumo_dpm.o sumo_smc.o trinity_dpm.o \
         trinity_smc.o ni_dpm.o si_smc.o si_dpm.o kv_smc.o kv_dpm.o ci_smc.o \
         ci_dpm.o dce6_afmt.o radeon_vm.o radeon_ucode.o radeon_ib.o \
-        radeon_sync.o radeon_audio.o radeon_dp_auxch.o
+        radeon_sync.o radeon_audio.o radeon_dp_auxch.o radeon_dp_mst.o
 
 radeon-$(CONFIG_MMU_NOTIFIER) += radeon_mn.o
 
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 36156ea92a93..dac78ad24b31 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -610,6 +610,13 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc,
                 }
         }
 
+        if (radeon_encoder->is_mst_encoder) {
+                struct radeon_encoder_mst *mst_enc = radeon_encoder->enc_priv;
+                struct radeon_connector_atom_dig *dig_connector = mst_enc->connector->con_priv;
+
+                dp_clock = dig_connector->dp_clock;
+        }
+
         /* use recommended ref_div for ss */
         if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
                 if (radeon_crtc->ss_enabled) {
@@ -956,7 +963,9 @@ static bool atombios_crtc_prepare_pll(struct drm_crtc *crtc, struct drm_display_
         radeon_crtc->bpc = 8;
         radeon_crtc->ss_enabled = false;
 
-        if ((radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) ||
+        if (radeon_encoder->is_mst_encoder) {
+                radeon_dp_mst_prepare_pll(crtc, mode);
+        } else if ((radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) ||
             (radeon_encoder_get_dp_bridge_encoder_id(radeon_crtc->encoder) != ENCODER_OBJECT_ID_NONE)) {
                 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
                 struct drm_connector *connector =
diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c
index 980cbccdf1a7..f57c1ab617bc 100644
--- a/drivers/gpu/drm/radeon/atombios_encoders.c
+++ b/drivers/gpu/drm/radeon/atombios_encoders.c
@@ -671,7 +671,15 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
         struct drm_connector *connector;
         struct radeon_connector *radeon_connector;
         struct radeon_connector_atom_dig *dig_connector;
+        struct radeon_encoder_atom_dig *dig_enc;
 
+        if (radeon_encoder_is_digital(encoder)) {
+                dig_enc = radeon_encoder->enc_priv;
+                if (dig_enc->active_mst_links)
+                        return ATOM_ENCODER_MODE_DP_MST;
+        }
+        if (radeon_encoder->is_mst_encoder || radeon_encoder->offset)
+                return ATOM_ENCODER_MODE_DP_MST;
         /* dp bridges are always DP */
         if (radeon_encoder_get_dp_bridge_encoder_id(encoder) != ENCODER_OBJECT_ID_NONE)
                 return ATOM_ENCODER_MODE_DP;
@@ -1706,6 +1714,11 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode)
         case DRM_MODE_DPMS_STANDBY:
         case DRM_MODE_DPMS_SUSPEND:
         case DRM_MODE_DPMS_OFF:
+
+                /* don't power off encoders with active MST links */
+                if (dig->active_mst_links)
+                        return;
+
                 if (ASIC_IS_DCE4(rdev)) {
                         if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(encoder)) && connector)
                                 atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0);
@@ -1974,6 +1987,53 @@ atombios_set_encoder_crtc_source(struct drm_encoder *encoder)
         radeon_atombios_encoder_crtc_scratch_regs(encoder, radeon_crtc->crtc_id);
 }
 
+void
+atombios_set_mst_encoder_crtc_source(struct drm_encoder *encoder, int fe)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_crtc *radeon_crtc = to_radeon_crtc(encoder->crtc);
+        int index = GetIndexIntoMasterTable(COMMAND, SelectCRTC_Source);
+        uint8_t frev, crev;
+        union crtc_source_param args;
+
+        memset(&args, 0, sizeof(args));
+
+        if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev))
+                return;
+
+        if (frev != 1 && crev != 2)
+                DRM_ERROR("Unknown table for MST %d, %d\n", frev, crev);
+
+        args.v2.ucCRTC = radeon_crtc->crtc_id;
+        args.v2.ucEncodeMode = ATOM_ENCODER_MODE_DP_MST;
+
+        switch (fe) {
+        case 0:
+                args.v2.ucEncoderID = ASIC_INT_DIG1_ENCODER_ID;
+                break;
+        case 1:
+                args.v2.ucEncoderID = ASIC_INT_DIG2_ENCODER_ID;
+                break;
+        case 2:
+                args.v2.ucEncoderID = ASIC_INT_DIG3_ENCODER_ID;
+                break;
+        case 3:
+                args.v2.ucEncoderID = ASIC_INT_DIG4_ENCODER_ID;
+                break;
+        case 4:
+                args.v2.ucEncoderID = ASIC_INT_DIG5_ENCODER_ID;
+                break;
+        case 5:
+                args.v2.ucEncoderID = ASIC_INT_DIG6_ENCODER_ID;
+                break;
+        case 6:
+                args.v2.ucEncoderID = ASIC_INT_DIG7_ENCODER_ID;
+                break;
+        }
+        atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
+}
+
 static void
 atombios_apply_encoder_quirks(struct drm_encoder *encoder,
                               struct drm_display_mode *mode)
diff --git a/drivers/gpu/drm/radeon/ni_reg.h b/drivers/gpu/drm/radeon/ni_reg.h
index 96c23712776e..da310a70c0f0 100644
--- a/drivers/gpu/drm/radeon/ni_reg.h
+++ b/drivers/gpu/drm/radeon/ni_reg.h
@@ -93,6 +93,8 @@
 #       define NI_DP_MSE_ZERO_ENCODER                  (((x) & 0x1) << 8)
 
 #define NI_DP_MSE_RATE_CNTL                            0x7384
+#       define NI_DP_MSE_RATE_Y(x)                   (((x) & 0x3ffffff) << 0)
+#       define NI_DP_MSE_RATE_X(x)                   (((x) & 0x3f) << 26)
 
 #define NI_DP_MSE_RATE_UPDATE                          0x738c
 
@@ -111,6 +113,11 @@
 #define NI_DIG_BE_CNTL                                 0x7140
 #       define NI_DIG_FE_SOURCE_SELECT(x)              (((x) & 0x7f) << 8)
 #       define NI_DIG_FE_DIG_MODE(x)                   (((x) & 0x7) << 16)
+#       define NI_DIG_MODE_DP_SST                      0
+#       define NI_DIG_MODE_LVDS                        1
+#       define NI_DIG_MODE_TMDS_DVI                    2
+#       define NI_DIG_MODE_TMDS_HDMI                   3
+#       define NI_DIG_MODE_DP_MST                      5
 #       define NI_DIG_HPD_SELECT(x)                    (((x) & 0x7) << 28)
 
 #define NI_DIG_FE_CNTL                                 0x7000
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 1506332d6f22..35ab65d53cc1 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -112,6 +112,7 @@ extern int radeon_use_pflipirq;
 extern int radeon_bapm;
 extern int radeon_backlight;
 extern int radeon_auxch;
+extern int radeon_mst;
 
 /*
  * Copy from radeon_drv.h so we don't have to include both and have conflicting
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index fc1b3f34cf18..8f285244c839 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -845,6 +845,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
 
         radeon_link_encoder_connector(dev);
 
+        radeon_setup_mst_connector(dev);
         return true;
 }
 
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index 0a371a13da94..7ffa7d5563b9 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -27,6 +27,7 @@
 #include <drm/drm_edid.h>
 #include <drm/drm_crtc_helper.h>
 #include <drm/drm_fb_helper.h>
+#include <drm/drm_dp_mst_helper.h>
 #include <drm/radeon_drm.h>
 #include "radeon.h"
 #include "radeon_audio.h"
@@ -34,12 +35,33 @@
 
 #include <linux/pm_runtime.h>
 
+static int radeon_dp_handle_hpd(struct drm_connector *connector)
+{
+        struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+        int ret;
+
+        ret = radeon_dp_mst_check_status(radeon_connector);
+        if (ret == -EINVAL)
+                return 1;
+        return 0;
+}
 void radeon_connector_hotplug(struct drm_connector *connector)
 {
         struct drm_device *dev = connector->dev;
         struct radeon_device *rdev = dev->dev_private;
         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 
+        if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
+                struct radeon_connector_atom_dig *dig_connector =
+                        radeon_connector->con_priv;
+
+                if (radeon_connector->is_mst_connector)
+                        return;
+                if (dig_connector->is_mst) {
+                        radeon_dp_handle_hpd(connector);
+                        return;
+                }
+        }
         /* bail if the connector does not have hpd pin, e.g.,
          * VGA, TV, etc.
          */
@@ -1609,6 +1631,9 @@ radeon_dp_detect(struct drm_connector *connector, bool force)
         struct drm_encoder *encoder = radeon_best_single_encoder(connector);
         int r;
 
+        if (radeon_dig_connector->is_mst)
+                return connector_status_disconnected;
+
         r = pm_runtime_get_sync(connector->dev->dev);
         if (r < 0)
                 return connector_status_disconnected;
@@ -1667,12 +1692,21 @@ radeon_dp_detect(struct drm_connector *connector, bool force)
                 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
                 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
                         ret = connector_status_connected;
-                        if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
+                        if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
                                 radeon_dp_getdpcd(radeon_connector);
+                                r = radeon_dp_mst_probe(radeon_connector);
+                                if (r == 1)
+                                        ret = connector_status_disconnected;
+                        }
                 } else {
                         if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
-                                if (radeon_dp_getdpcd(radeon_connector))
-                                        ret = connector_status_connected;
+                                if (radeon_dp_getdpcd(radeon_connector)) {
+                                        r = radeon_dp_mst_probe(radeon_connector);
+                                        if (r == 1)
+                                                ret = connector_status_disconnected;
+                                        else
+                                                ret = connector_status_connected;
+                                }
                         } else {
                                 /* try non-aux ddc (DP to DVI/HDMI/etc. adapter) */
                                 if (radeon_ddc_probe(radeon_connector, false))
@@ -2404,3 +2438,27 @@ radeon_add_legacy_connector(struct drm_device *dev,
         connector->display_info.subpixel_order = subpixel_order;
         drm_connector_register(connector);
 }
+
+void radeon_setup_mst_connector(struct drm_device *dev)
+{
+        struct radeon_device *rdev = dev->dev_private;
+        struct drm_connector *connector;
+        struct radeon_connector *radeon_connector;
+
+        if (!ASIC_IS_DCE5(rdev))
+                return;
+
+        if (radeon_mst == 0)
+                return;
+
+        list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+                int ret;
+
+                radeon_connector = to_radeon_connector(connector);
+
+                if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
+                        continue;
+
+                ret = radeon_dp_mst_init(radeon_connector);
+        }
+}
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index bd7519fdd3f4..b7ca4c514621 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -1442,6 +1442,11 @@ int radeon_device_init(struct radeon_device *rdev,
                 DRM_ERROR("registering gem debugfs failed (%d).\n", r);
         }
 
+        r = radeon_mst_debugfs_init(rdev);
+        if (r) {
+                DRM_ERROR("registering mst debugfs failed (%d).\n", r);
+        }
+
         if (rdev->flags & RADEON_IS_AGP && !rdev->accel_working) {
                 /* Acceleration not working on AGP card try again
                  * with fallback to PCI or PCIE GART
diff --git a/drivers/gpu/drm/radeon/radeon_dp_mst.c b/drivers/gpu/drm/radeon/radeon_dp_mst.c
new file mode 100644
index 000000000000..5952ff2bb647
--- /dev/null
+++ b/drivers/gpu/drm/radeon/radeon_dp_mst.c
@@ -0,0 +1,782 @@
+
+#include <drm/drmP.h>
+#include <drm/drm_dp_mst_helper.h>
+#include <drm/drm_fb_helper.h>
+
+#include "radeon.h"
+#include "atom.h"
+#include "ni_reg.h"
+
+static struct radeon_encoder *radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector);
+
+static int radeon_atom_set_enc_offset(int id)
+{
+        static const int offsets[] = { EVERGREEN_CRTC0_REGISTER_OFFSET,
+                                       EVERGREEN_CRTC1_REGISTER_OFFSET,
+                                       EVERGREEN_CRTC2_REGISTER_OFFSET,
+                                       EVERGREEN_CRTC3_REGISTER_OFFSET,
+                                       EVERGREEN_CRTC4_REGISTER_OFFSET,
+                                       EVERGREEN_CRTC5_REGISTER_OFFSET,
+                                       0x13830 - 0x7030 };
+
+        return offsets[id];
+}
+
+static int radeon_dp_mst_set_be_cntl(struct radeon_encoder *primary,
+                                     struct radeon_encoder_mst *mst_enc,
+                                     enum radeon_hpd_id hpd, bool enable)
+{
+        struct drm_device *dev = primary->base.dev;
+        struct radeon_device *rdev = dev->dev_private;
+        uint32_t reg;
+        int retries = 0;
+        uint32_t temp;
+
+        reg = RREG32(NI_DIG_BE_CNTL + primary->offset);
+
+        /* set MST mode */
+        reg &= ~NI_DIG_FE_DIG_MODE(7);
+        reg |= NI_DIG_FE_DIG_MODE(NI_DIG_MODE_DP_MST);
+
+        if (enable)
+                reg |= NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe);
+        else
+                reg &= ~NI_DIG_FE_SOURCE_SELECT(1 << mst_enc->fe);
+
+        reg |= NI_DIG_HPD_SELECT(hpd);
+        DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DIG_BE_CNTL + primary->offset, reg);
+        WREG32(NI_DIG_BE_CNTL + primary->offset, reg);
+
+        if (enable) {
+                uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe);
+
+                do {
+                        temp = RREG32(NI_DIG_FE_CNTL + offset);
+                } while ((temp & NI_DIG_SYMCLK_FE_ON) && retries++ < 10000);
+                if (retries == 10000)
+                        DRM_ERROR("timed out waiting for FE %d %d\n", primary->offset, mst_enc->fe);
+        }
+        return 0;
+}
+
+static int radeon_dp_mst_set_stream_attrib(struct radeon_encoder *primary,
+                                           int stream_number,
+                                           int fe,
+                                           int slots)
+{
+        struct drm_device *dev = primary->base.dev;
+        struct radeon_device *rdev = dev->dev_private;
+        u32 temp, val;
+        int retries  = 0;
+        int satreg, satidx;
+
+        satreg = stream_number >> 1;
+        satidx = stream_number & 1;
+
+        temp = RREG32(NI_DP_MSE_SAT0 + satreg + primary->offset);
+
+        val = NI_DP_MSE_SAT_SLOT_COUNT0(slots) | NI_DP_MSE_SAT_SRC0(fe);
+
+        val <<= (16 * satidx);
+
+        temp &= ~(0xffff << (16 * satidx));
+
+        temp |= val;
+
+        DRM_DEBUG_KMS("writing 0x%08x 0x%08x\n", NI_DP_MSE_SAT0 + satreg + primary->offset, temp);
+        WREG32(NI_DP_MSE_SAT0 + satreg + primary->offset, temp);
+
+        WREG32(NI_DP_MSE_SAT_UPDATE + primary->offset, 1);
+
+        do {
+                temp = RREG32(NI_DP_MSE_SAT_UPDATE + primary->offset);
+        } while ((temp & 0x1) && retries++ < 10000);
+
+        if (retries == 10000)
+                DRM_ERROR("timed out waitin for SAT update %d\n", primary->offset);
+
+        /* MTP 16 ? */
+        return 0;
+}
+
+static int radeon_dp_mst_update_stream_attribs(struct radeon_connector *mst_conn,
+                                               struct radeon_encoder *primary)
+{
+        struct drm_device *dev = mst_conn->base.dev;
+        struct stream_attribs new_attribs[6];
+        int i;
+        int idx = 0;
+        struct radeon_connector *radeon_connector;
+        struct drm_connector *connector;
+
+        memset(new_attribs, 0, sizeof(new_attribs));
+        list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+                struct radeon_encoder *subenc;
+                struct radeon_encoder_mst *mst_enc;
+
+                radeon_connector = to_radeon_connector(connector);
+                if (!radeon_connector->is_mst_connector)
+                        continue;
+
+                if (radeon_connector->mst_port != mst_conn)
+                        continue;
+
+                subenc = radeon_connector->mst_encoder;
+                mst_enc = subenc->enc_priv;
+
+                if (!mst_enc->enc_active)
+                        continue;
+
+                new_attribs[idx].fe = mst_enc->fe;
+                new_attribs[idx].slots = drm_dp_mst_get_vcpi_slots(&mst_conn->mst_mgr, mst_enc->port);
+                idx++;
+        }
+
+        for (i = 0; i < idx; i++) {
+                if (new_attribs[i].fe != mst_conn->cur_stream_attribs[i].fe ||
+                    new_attribs[i].slots != mst_conn->cur_stream_attribs[i].slots) {
+                        radeon_dp_mst_set_stream_attrib(primary, i, new_attribs[i].fe, new_attribs[i].slots);
+                        mst_conn->cur_stream_attribs[i].fe = new_attribs[i].fe;
+                        mst_conn->cur_stream_attribs[i].slots = new_attribs[i].slots;
+                }
+        }
+
+        for (i = idx; i < mst_conn->enabled_attribs; i++) {
+                radeon_dp_mst_set_stream_attrib(primary, i, 0, 0);
+                mst_conn->cur_stream_attribs[i].fe = 0;
+                mst_conn->cur_stream_attribs[i].slots = 0;
+        }
+        mst_conn->enabled_attribs = idx;
+        return 0;
+}
+
+static int radeon_dp_mst_set_vcp_size(struct radeon_encoder *mst, uint32_t x, uint32_t y)
+{
+        struct drm_device *dev = mst->base.dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_encoder_mst *mst_enc = mst->enc_priv;
+        uint32_t val, temp;
+        uint32_t offset = radeon_atom_set_enc_offset(mst_enc->fe);
+        int retries = 0;
+
+        val = NI_DP_MSE_RATE_X(x) | NI_DP_MSE_RATE_Y(y);
+
+        WREG32(NI_DP_MSE_RATE_CNTL + offset, val);
+
+        do {
+                temp = RREG32(NI_DP_MSE_RATE_UPDATE + offset);
+        } while ((temp & 0x1) && (retries++ < 10000));
+
+        if (retries >= 10000)
+                DRM_ERROR("timed out wait for rate cntl %d\n", mst_enc->fe);
+        return 0;
+}
+
+static int radeon_dp_mst_get_ddc_modes(struct drm_connector *connector)
+{
+        struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+        struct radeon_connector *master = radeon_connector->mst_port;
+        struct edid *edid;
+        int ret = 0;
+
+        edid = drm_dp_mst_get_edid(connector, &master->mst_mgr, radeon_connector->port);
+        radeon_connector->edid = edid;
+        DRM_DEBUG_KMS("edid retrieved %p\n", edid);
+        if (radeon_connector->edid) {
+                drm_mode_connector_update_edid_property(&radeon_connector->base, radeon_connector->edid);
+                ret = drm_add_edid_modes(&radeon_connector->base, radeon_connector->edid);
+                drm_edid_to_eld(&radeon_connector->base, radeon_connector->edid);
+                return ret;
+        }
+        drm_mode_connector_update_edid_property(&radeon_connector->base, NULL);
+
+        return ret;
+}
+
+static int radeon_dp_mst_get_modes(struct drm_connector *connector)
+{
+        return radeon_dp_mst_get_ddc_modes(connector);
+}
+
+static enum drm_mode_status
+radeon_dp_mst_mode_valid(struct drm_connector *connector,
+                        struct drm_display_mode *mode)
+{
+        /* TODO - validate mode against available PBN for link */
+        if (mode->clock < 10000)
+                return MODE_CLOCK_LOW;
+
+        if (mode->flags & DRM_MODE_FLAG_DBLCLK)
+                return MODE_H_ILLEGAL;
+
+        return MODE_OK;
+}
+
+struct drm_encoder *radeon_mst_best_encoder(struct drm_connector *connector)
+{
+        struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+
+        return &radeon_connector->mst_encoder->base;
+}
+
+static const struct drm_connector_helper_funcs radeon_dp_mst_connector_helper_funcs = {
+        .get_modes = radeon_dp_mst_get_modes,
+        .mode_valid = radeon_dp_mst_mode_valid,
+        .best_encoder = radeon_mst_best_encoder,
+};
+
+static enum drm_connector_status
+radeon_dp_mst_detect(struct drm_connector *connector, bool force)
+{
+        struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+        struct radeon_connector *master = radeon_connector->mst_port;
+
+        return drm_dp_mst_detect_port(connector, &master->mst_mgr, radeon_connector->port);
+}
+
+static void
+radeon_dp_mst_connector_destroy(struct drm_connector *connector)
+{
+        struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+        struct radeon_encoder *radeon_encoder = radeon_connector->mst_encoder;
+
+        drm_encoder_cleanup(&radeon_encoder->base);
+        kfree(radeon_encoder);
+        drm_connector_cleanup(connector);
+        kfree(radeon_connector);
+}
+
+static void radeon_connector_dpms(struct drm_connector *connector, int mode)
+{
+        DRM_DEBUG_KMS("\n");
+}
+
+static const struct drm_connector_funcs radeon_dp_mst_connector_funcs = {
+        .dpms = radeon_connector_dpms,
+        .detect = radeon_dp_mst_detect,
+        .fill_modes = drm_helper_probe_single_connector_modes,
+        .destroy = radeon_dp_mst_connector_destroy,
+};
+
+static struct drm_connector *radeon_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
+                                                         struct drm_dp_mst_port *port,
+                                                         const char *pathprop)
+{
+        struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
+        struct drm_device *dev = master->base.dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_connector *radeon_connector;
+        struct drm_connector *connector;
+
+        radeon_connector = kzalloc(sizeof(*radeon_connector), GFP_KERNEL);
+        if (!radeon_connector)
+                return NULL;
+
+        radeon_connector->is_mst_connector = true;
+        connector = &radeon_connector->base;
+        radeon_connector->port = port;
+        radeon_connector->mst_port = master;
+        DRM_DEBUG_KMS("\n");
+
+        drm_connector_init(dev, connector, &radeon_dp_mst_connector_funcs, DRM_MODE_CONNECTOR_DisplayPort);
+        drm_connector_helper_add(connector, &radeon_dp_mst_connector_helper_funcs);
+        radeon_connector->mst_encoder = radeon_dp_create_fake_mst_encoder(master);
+
+        drm_object_attach_property(&connector->base, dev->mode_config.path_property, 0);
+        drm_mode_connector_set_path_property(connector, pathprop);
+        drm_reinit_primary_mode_group(dev);
+
+        mutex_lock(&dev->mode_config.mutex);
+        radeon_fb_add_connector(rdev, connector);
+        mutex_unlock(&dev->mode_config.mutex);
+
+        drm_connector_register(connector);
+        return connector;
+}
+
+static void radeon_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr,
+                                            struct drm_connector *connector)
+{
+        struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
+        struct drm_device *dev = master->base.dev;
+        struct radeon_device *rdev = dev->dev_private;
+
+        drm_connector_unregister(connector);
+        /* need to nuke the connector */
+        mutex_lock(&dev->mode_config.mutex);
+        /* dpms off */
+        radeon_fb_remove_connector(rdev, connector);
+
+        drm_connector_cleanup(connector);
+        mutex_unlock(&dev->mode_config.mutex);
+        drm_reinit_primary_mode_group(dev);
+
+
+        kfree(connector);
+        DRM_DEBUG_KMS("\n");
+}
+
+static void radeon_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr)
+{
+        struct radeon_connector *master = container_of(mgr, struct radeon_connector, mst_mgr);
+        struct drm_device *dev = master->base.dev;
+
+        drm_kms_helper_hotplug_event(dev);
+}
+
+struct drm_dp_mst_topology_cbs mst_cbs = {
+        .add_connector = radeon_dp_add_mst_connector,
+        .destroy_connector = radeon_dp_destroy_mst_connector,
+        .hotplug = radeon_dp_mst_hotplug,
+};
+
+struct radeon_connector *radeon_mst_find_connector(struct drm_encoder *encoder)
+{
+        struct drm_device *dev = encoder->dev;
+        struct drm_connector *connector;
+
+        list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+                struct radeon_connector *radeon_connector = to_radeon_connector(connector);
+                if (!connector->encoder)
+                        continue;
+                if (!radeon_connector->is_mst_connector)
+                        continue;
+
+                DRM_DEBUG_KMS("checking %p vs %p\n", connector->encoder, encoder);
+                if (connector->encoder == encoder)
+                        return radeon_connector;
+        }
+        return NULL;
+}
+
+void radeon_dp_mst_prepare_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
+{
+        struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
+        struct drm_device *dev = crtc->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(radeon_crtc->encoder);
+        struct radeon_encoder_mst *mst_enc = radeon_encoder->enc_priv;
+        struct radeon_connector *radeon_connector = radeon_mst_find_connector(&radeon_encoder->base);
+        int dp_clock;
+        struct radeon_connector_atom_dig *dig_connector = mst_enc->connector->con_priv;
+
+        if (radeon_connector) {
+                radeon_connector->pixelclock_for_modeset = mode->clock;
+                if (radeon_connector->base.display_info.bpc)
+                        radeon_crtc->bpc = radeon_connector->base.display_info.bpc;
+                else
+                        radeon_crtc->bpc = 8;
+        }
+
+        DRM_DEBUG_KMS("dp_clock %p %d\n", dig_connector, dig_connector->dp_clock);
+        dp_clock = dig_connector->dp_clock;
+        radeon_crtc->ss_enabled =
+                radeon_atombios_get_asic_ss_info(rdev, &radeon_crtc->ss,
+                                                 ASIC_INTERNAL_SS_ON_DP,
+                                                 dp_clock);
+}
+
+static void
+radeon_mst_encoder_dpms(struct drm_encoder *encoder, int mode)
+{
+        struct drm_device *dev = encoder->dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_encoder *radeon_encoder, *primary;
+        struct radeon_encoder_mst *mst_enc;
+        struct radeon_encoder_atom_dig *dig_enc;
+        struct radeon_connector *radeon_connector;
+        struct drm_crtc *crtc;
+        struct radeon_crtc *radeon_crtc;
+        int ret, slots;
+
+        if (!ASIC_IS_DCE5(rdev)) {
+                DRM_ERROR("got mst dpms on non-DCE5\n");
+                return;
+        }
+
+        radeon_connector = radeon_mst_find_connector(encoder);
+        if (!radeon_connector)
+                return;
+
+        radeon_encoder = to_radeon_encoder(encoder);
+
+        mst_enc = radeon_encoder->enc_priv;
+
+        primary = mst_enc->primary;
+
+        dig_enc = primary->enc_priv;
+
+        crtc = encoder->crtc;
+        DRM_DEBUG_KMS("got connector %d\n", dig_enc->active_mst_links);
+
+        switch (mode) {
+        case DRM_MODE_DPMS_ON:
+                dig_enc->active_mst_links++;
+
+                radeon_crtc = to_radeon_crtc(crtc);
+
+                if (dig_enc->active_mst_links == 1) {
+                        mst_enc->fe = dig_enc->dig_encoder;
+                        mst_enc->fe_from_be = true;
+                        atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe);
+
+                        atombios_dig_encoder_setup(&primary->base, ATOM_ENCODER_CMD_SETUP, 0);
+                        atombios_dig_transmitter_setup2(&primary->base, ATOM_TRANSMITTER_ACTION_ENABLE,
+                                                        0, 0, dig_enc->dig_encoder);
+
+                        if (radeon_dp_needs_link_train(mst_enc->connector) ||
+                            dig_enc->active_mst_links == 1) {
+                                radeon_dp_link_train(&primary->base, &mst_enc->connector->base);
+                        }
+
+                } else {
+                        mst_enc->fe = radeon_atom_pick_dig_encoder(encoder, radeon_crtc->crtc_id);
+                        if (mst_enc->fe == -1)
+                                DRM_ERROR("failed to get frontend for dig encoder\n");
+                        mst_enc->fe_from_be = false;
+                        atombios_set_mst_encoder_crtc_source(encoder, mst_enc->fe);
+                }
+
+                DRM_DEBUG_KMS("dig encoder is %d %d %d\n", dig_enc->dig_encoder,
+                              dig_enc->linkb, radeon_crtc->crtc_id);
+
+                ret = drm_dp_mst_allocate_vcpi(&radeon_connector->mst_port->mst_mgr,
+                                               radeon_connector->port,
+                                               mst_enc->pbn, &slots);
+                ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr);
+
+                radeon_dp_mst_set_be_cntl(primary, mst_enc,
+                                          radeon_connector->mst_port->hpd.hpd, true);
+
+                mst_enc->enc_active = true;
+                radeon_dp_mst_update_stream_attribs(radeon_connector->mst_port, primary);
+                radeon_dp_mst_set_vcp_size(radeon_encoder, slots, 0);
+
+                atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_ON, 0,
+                                            mst_enc->fe);
+                ret = drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr);
+
+                ret = drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr);
+
+                break;
+        case DRM_MODE_DPMS_STANDBY:
+        case DRM_MODE_DPMS_SUSPEND:
+        case DRM_MODE_DPMS_OFF:
+                DRM_ERROR("DPMS OFF %d\n", dig_enc->active_mst_links);
+
+                if (!mst_enc->enc_active)
+                        return;
+
+                drm_dp_mst_reset_vcpi_slots(&radeon_connector->mst_port->mst_mgr, mst_enc->port);
+                ret = drm_dp_update_payload_part1(&radeon_connector->mst_port->mst_mgr);
+
+                drm_dp_check_act_status(&radeon_connector->mst_port->mst_mgr);
+                /* and this can also fail */
+                drm_dp_update_payload_part2(&radeon_connector->mst_port->mst_mgr);
+
+                drm_dp_mst_deallocate_vcpi(&radeon_connector->mst_port->mst_mgr, mst_enc->port);
+
+                mst_enc->enc_active = false;
+                radeon_dp_mst_update_stream_attribs(radeon_connector->mst_port, primary);
+
+                radeon_dp_mst_set_be_cntl(primary, mst_enc,
+                                          radeon_connector->mst_port->hpd.hpd, false);
+                atombios_dig_encoder_setup2(&primary->base, ATOM_ENCODER_CMD_DP_VIDEO_OFF, 0,
+                                            mst_enc->fe);
+
+                if (!mst_enc->fe_from_be)
+                        radeon_atom_release_dig_encoder(rdev, mst_enc->fe);
+
+                mst_enc->fe_from_be = false;
+                dig_enc->active_mst_links--;
+                if (dig_enc->active_mst_links == 0) {
+                        /* drop link */
+                }
+
+                break;
+        }
+
+}
+
+static bool radeon_mst_mode_fixup(struct drm_encoder *encoder,
+                                   const struct drm_display_mode *mode,
+                                   struct drm_display_mode *adjusted_mode)
+{
+        struct radeon_encoder_mst *mst_enc;
+        struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
+        int bpp = 24;
+
+        mst_enc = radeon_encoder->enc_priv;
+
+        mst_enc->pbn = drm_dp_calc_pbn_mode(adjusted_mode->clock, bpp);
+
+        mst_enc->primary->active_device = mst_enc->primary->devices & mst_enc->connector->devices;
+        DRM_DEBUG_KMS("setting active device to %08x from %08x %08x for encoder %d\n",
+                      mst_enc->primary->active_device, mst_enc->primary->devices,
+                      mst_enc->connector->devices, mst_enc->primary->base.encoder_type);
+
+
+        drm_mode_set_crtcinfo(adjusted_mode, 0);
+        {
+          struct radeon_connector_atom_dig *dig_connector;
+
+          dig_connector = mst_enc->connector->con_priv;
+          dig_connector->dp_lane_count = drm_dp_max_lane_count(dig_connector->dpcd);
+          dig_connector->dp_clock = radeon_dp_get_max_link_rate(&mst_enc->connector->base,
+                                                                dig_connector->dpcd);
+          DRM_DEBUG_KMS("dig clock %p %d %d\n", dig_connector,
+                        dig_connector->dp_lane_count, dig_connector->dp_clock);
+        }
+        return true;
+}
+
+static void radeon_mst_encoder_prepare(struct drm_encoder *encoder)
+{
+        struct radeon_connector *radeon_connector;
+        struct radeon_encoder *radeon_encoder, *primary;
+        struct radeon_encoder_mst *mst_enc;
+        struct radeon_encoder_atom_dig *dig_enc;
+
+        radeon_connector = radeon_mst_find_connector(encoder);
+        if (!radeon_connector) {
+                DRM_DEBUG_KMS("failed to find connector %p\n", encoder);
+                return;
+        }
+        radeon_encoder = to_radeon_encoder(encoder);
+
+        radeon_mst_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
+
+        mst_enc = radeon_encoder->enc_priv;
+
+        primary = mst_enc->primary;
+
+        dig_enc = primary->enc_priv;
+
+        mst_enc->port = radeon_connector->port;
+
+        if (dig_enc->dig_encoder == -1) {
+                dig_enc->dig_encoder = radeon_atom_pick_dig_encoder(&primary->base, -1);
+                primary->offset = radeon_atom_set_enc_offset(dig_enc->dig_encoder);
+                atombios_set_mst_encoder_crtc_source(encoder, dig_enc->dig_encoder);
+
+
+        }
+        DRM_DEBUG_KMS("%d %d\n", dig_enc->dig_encoder, primary->offset);
+}
+
+static void
+radeon_mst_encoder_mode_set(struct drm_encoder *encoder,
+                             struct drm_display_mode *mode,
+                             struct drm_display_mode *adjusted_mode)
+{
+        DRM_DEBUG_KMS("\n");
+}
+
+static void radeon_mst_encoder_commit(struct drm_encoder *encoder)
+{
+        radeon_mst_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
+        DRM_DEBUG_KMS("\n");
+}
+
+static const struct drm_encoder_helper_funcs radeon_mst_helper_funcs = {
+        .dpms = radeon_mst_encoder_dpms,
+        .mode_fixup = radeon_mst_mode_fixup,
+        .prepare = radeon_mst_encoder_prepare,
+        .mode_set = radeon_mst_encoder_mode_set,
+        .commit = radeon_mst_encoder_commit,
+};
+
+void radeon_dp_mst_encoder_destroy(struct drm_encoder *encoder)
+{
+        drm_encoder_cleanup(encoder);
+        kfree(encoder);
+}
+
+static const struct drm_encoder_funcs radeon_dp_mst_enc_funcs = {
+        .destroy = radeon_dp_mst_encoder_destroy,
+};
+
+static struct radeon_encoder *
+radeon_dp_create_fake_mst_encoder(struct radeon_connector *connector)
+{
+        struct drm_device *dev = connector->base.dev;
+        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_encoder *radeon_encoder;
+        struct radeon_encoder_mst *mst_enc;
+        struct drm_encoder *encoder;
+        struct drm_connector_helper_funcs *connector_funcs = connector->base.helper_private;
+        struct drm_encoder *enc_master = connector_funcs->best_encoder(&connector->base);
+
+        DRM_DEBUG_KMS("enc master is %p\n", enc_master);
+        radeon_encoder = kzalloc(sizeof(*radeon_encoder), GFP_KERNEL);
+        if (!radeon_encoder)
+                return NULL;
+
+        radeon_encoder->enc_priv = kzalloc(sizeof(*mst_enc), GFP_KERNEL);
+        if (!radeon_encoder->enc_priv) {
+                kfree(radeon_encoder);
+                return NULL;
+        }
+        encoder = &radeon_encoder->base;
+        switch (rdev->num_crtc) {
+        case 1:
+                encoder->possible_crtcs = 0x1;
+                break;
+        case 2:
+        default:
+                encoder->possible_crtcs = 0x3;
+                break;
+        case 4:
+                encoder->possible_crtcs = 0xf;
+                break;
+        case 6:
+                encoder->possible_crtcs = 0x3f;
+                break;
+        }
+
+        drm_encoder_init(dev, &radeon_encoder->base, &radeon_dp_mst_enc_funcs,
+                         DRM_MODE_ENCODER_DPMST);
+        drm_encoder_helper_add(encoder, &radeon_mst_helper_funcs);
+
+        mst_enc = radeon_encoder->enc_priv;
+        mst_enc->connector = connector;
+        mst_enc->primary = to_radeon_encoder(enc_master);
+        radeon_encoder->is_mst_encoder = true;
+        return radeon_encoder;
+}
+
+int
+radeon_dp_mst_init(struct radeon_connector *radeon_connector)
+{
+        struct drm_device *dev = radeon_connector->base.dev;
+
+        if (!radeon_connector->ddc_bus->has_aux)
+                return 0;
+
+        radeon_connector->mst_mgr.cbs = &mst_cbs;
+        return drm_dp_mst_topology_mgr_init(&radeon_connector->mst_mgr, dev->dev,
+                                            &radeon_connector->ddc_bus->aux, 16, 6,
+                                            radeon_connector->base.base.id);
+}
+
+int
+radeon_dp_mst_probe(struct radeon_connector *radeon_connector)
+{
+        struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
+        int ret;
+        u8 msg[1];
+
+        if (dig_connector->dpcd[DP_DPCD_REV] < 0x12)
+                return 0;
+
+        ret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux, DP_MSTM_CAP, msg,
+                               1);
+        if (ret) {
+                if (msg[0] & DP_MST_CAP) {
+                        DRM_DEBUG_KMS("Sink is MST capable\n");
+                        dig_connector->is_mst = true;
+                } else {
+                        DRM_DEBUG_KMS("Sink is not MST capable\n");
+                        dig_connector->is_mst = false;
+                }
+
+        }
+        drm_dp_mst_topology_mgr_set_mst(&radeon_connector->mst_mgr,
+                                        dig_connector->is_mst);
+        return dig_connector->is_mst;
+}
+
+int
+radeon_dp_mst_check_status(struct radeon_connector *radeon_connector)
+{
+        struct radeon_connector_atom_dig *dig_connector = radeon_connector->con_priv;
+        int retry;
+
+        if (dig_connector->is_mst) {
+                u8 esi[16] = { 0 };
+                int dret;
+                int ret = 0;
+                bool handled;
+
+                dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux,
+                                       DP_SINK_COUNT_ESI, esi, 8);
+go_again:
+                if (dret == 8) {
+                        DRM_DEBUG_KMS("got esi %02x %02x %02x\n", esi[0], esi[1], esi[2]);
+                        ret = drm_dp_mst_hpd_irq(&radeon_connector->mst_mgr, esi, &handled);
+
+                        if (handled) {
+                                for (retry = 0; retry < 3; retry++) {
+                                        int wret;
+                                        wret = drm_dp_dpcd_write(&radeon_connector->ddc_bus->aux,
+                                                                 DP_SINK_COUNT_ESI + 1, &esi[1], 3);
+                                        if (wret == 3)
+                                                break;
+                                }
+
+                                dret = drm_dp_dpcd_read(&radeon_connector->ddc_bus->aux,
+                                                        DP_SINK_COUNT_ESI, esi, 8);
+                                if (dret == 8) {
+                                        DRM_DEBUG_KMS("got esi2 %02x %02x %02x\n", esi[0], esi[1], esi[2]);
+                                        goto go_again;
+                                }
+                        } else
+                                ret = 0;
+
+                        return ret;
+                } else {
+                        DRM_DEBUG_KMS("failed to get ESI - device may have failed %d\n", ret);
+                        dig_connector->is_mst = false;
+                        drm_dp_mst_topology_mgr_set_mst(&radeon_connector->mst_mgr,
+                                                        dig_connector->is_mst);
+                        /* send a hotplug event */
+                }
+        }
+        return -EINVAL;
+}
+
+#if defined(CONFIG_DEBUG_FS)
+
+static int radeon_debugfs_mst_info(struct seq_file *m, void *data)
+{
+        struct drm_info_node *node = (struct drm_info_node *)m->private;
+        struct drm_device *dev = node->minor->dev;
+        struct drm_connector *connector;
+        struct radeon_connector *radeon_connector;
+        struct radeon_connector_atom_dig *dig_connector;
+        int i;
+
+        drm_modeset_lock_all(dev);
+        list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
+                if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
+                        continue;
+
+                radeon_connector = to_radeon_connector(connector);
+                dig_connector = radeon_connector->con_priv;
+                if (radeon_connector->is_mst_connector)
+                        continue;
+                if (!dig_connector->is_mst)
+                        continue;
+                drm_dp_mst_dump_topology(m, &radeon_connector->mst_mgr);
+
+                for (i = 0; i < radeon_connector->enabled_attribs; i++)
+                        seq_printf(m, "attrib %d: %d %d\n", i,
+                                   radeon_connector->cur_stream_attribs[i].fe,
+                                   radeon_connector->cur_stream_attribs[i].slots);
+        }
+        drm_modeset_unlock_all(dev);
+        return 0;
+}
+
+static struct drm_info_list radeon_debugfs_mst_list[] = {
+        {"radeon_mst_info", &radeon_debugfs_mst_info, 0, NULL},
+};
+#endif
+
+int radeon_mst_debugfs_init(struct radeon_device *rdev)
+{
+#if defined(CONFIG_DEBUG_FS)
+        return radeon_debugfs_add_files(rdev, radeon_debugfs_mst_list, 1);
+#endif
+        return 0;
+}
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index b088507057da..d688f6cd1ae4 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -191,6 +191,7 @@ int radeon_use_pflipirq = 2;
 int radeon_bapm = -1;
 int radeon_backlight = -1;
 int radeon_auxch = -1;
+int radeon_mst = 0;
 
 MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
 module_param_named(no_wb, radeon_no_wb, int, 0444);
@@ -279,6 +280,9 @@ module_param_named(backlight, radeon_backlight, int, 0444);
 MODULE_PARM_DESC(auxch, "Use native auxch experimental support (1 = enable, 0 = disable, -1 = auto)");
 module_param_named(auxch, radeon_auxch, int, 0444);
 
+MODULE_PARM_DESC(mst, "DisplayPort MST experimental support (1 = enable, 0 = disable)");
+module_param_named(mst, radeon_mst, int, 0444);
+
 static struct pci_device_id pciidlist[] = {
         radeon_PCI_IDS
 };
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index 3a297037cc17..ef99917f000d 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -247,7 +247,16 @@ radeon_get_connector_for_encoder(struct drm_encoder *encoder)
 
         list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
                 radeon_connector = to_radeon_connector(connector);
-                if (radeon_encoder->active_device & radeon_connector->devices)
+                if (radeon_encoder->is_mst_encoder) {
+                        struct radeon_encoder_mst *mst_enc;
+
+                        if (!radeon_connector->is_mst_connector)
+                                continue;
+
+                        mst_enc = radeon_encoder->enc_priv;
+                        if (mst_enc->connector == radeon_connector->mst_port)
+                                return connector;
+                } else if (radeon_encoder->active_device & radeon_connector->devices)
                         return connector;
         }
         return NULL;
@@ -393,6 +402,9 @@ bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
         case DRM_MODE_CONNECTOR_DVID:
         case DRM_MODE_CONNECTOR_HDMIA:
         case DRM_MODE_CONNECTOR_DisplayPort:
+                if (radeon_connector->is_mst_connector)
+                        return false;
+
                 dig_connector = radeon_connector->con_priv;
                 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
                     (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c
index e82ae819fc10..7162c935371c 100644
--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
@@ -89,6 +89,17 @@ static void radeon_hotplug_work_func(struct work_struct *work)
 
 static void radeon_dp_work_func(struct work_struct *work)
 {
+        struct radeon_device *rdev = container_of(work, struct radeon_device,
+                                                  dp_work);
+        struct drm_device *dev = rdev->ddev;
+        struct drm_mode_config *mode_config = &dev->mode_config;
+        struct drm_connector *connector;
+
+        /* this should take a mutex */
+        if (mode_config->num_connector) {
+                list_for_each_entry(connector, &mode_config->connector_list, head)
+                        radeon_connector_hotplug(connector);
+        }
 }
 /**
  * radeon_driver_irq_preinstall_kms - drm irq preinstall callback
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index c612289d7c60..fa91a17b81b6 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -33,6 +33,7 @@
 #include <drm/drm_crtc.h>
 #include <drm/drm_edid.h>
 #include <drm/drm_dp_helper.h>
+#include <drm/drm_dp_mst_helper.h>
 #include <drm/drm_fixed.h>
 #include <drm/drm_crtc_helper.h>
 #include <linux/i2c.h>
@@ -439,12 +440,24 @@ struct radeon_encoder_atom_dig {
         uint8_t backlight_level;
         int panel_mode;
         struct radeon_afmt *afmt;
+        int active_mst_links;
 };
 
 struct radeon_encoder_atom_dac {
         enum radeon_tv_std tv_std;
 };
 
+struct radeon_encoder_mst {
+        int crtc;
+        struct radeon_encoder *primary;
+        struct radeon_connector *connector;
+        struct drm_dp_mst_port *port;
+        int pbn;
+        int fe;
+        bool fe_from_be;
+        bool enc_active;
+};
+
 struct radeon_encoder {
         struct drm_encoder base;
         uint32_t encoder_enum;
@@ -464,6 +477,10 @@ struct radeon_encoder {
         u16 caps;
         struct radeon_audio_funcs *audio;
         enum radeon_output_csc output_csc;
+        bool can_mst;
+        uint32_t offset;
+        bool is_mst_encoder;
+        /* front end for this mst encoder */
 };
 
 struct radeon_connector_atom_dig {
@@ -474,6 +491,7 @@ struct radeon_connector_atom_dig {
         int dp_clock;
         int dp_lane_count;
         bool edp_on;
+        bool is_mst;
 };
 
 struct radeon_gpio_rec {
@@ -517,6 +535,11 @@ enum radeon_connector_dither {
         RADEON_FMT_DITHER_ENABLE = 1,
 };
 
+struct stream_attribs {
+        uint16_t fe;
+        uint16_t slots;
+};
+
 struct radeon_connector {
         struct drm_connector base;
         uint32_t connector_id;
@@ -538,6 +561,14 @@ struct radeon_connector {
         enum radeon_connector_audio audio;
         enum radeon_connector_dither dither;
         int pixelclock_for_modeset;
+        bool is_mst_connector;
+        struct radeon_connector *mst_port;
+        struct drm_dp_mst_port *port;
+        struct drm_dp_mst_topology_mgr mst_mgr;
+
+        struct radeon_encoder *mst_encoder;
+        struct stream_attribs cur_stream_attribs[6];
+        int enabled_attribs;
 };
 
 struct radeon_framebuffer {
@@ -740,6 +771,8 @@ extern void atombios_dig_transmitter_setup(struct drm_encoder *encoder,
 extern void atombios_dig_transmitter_setup2(struct drm_encoder *encoder,
                                             int action, uint8_t lane_num,
                                             uint8_t lane_set, int fe);
+extern void atombios_set_mst_encoder_crtc_source(struct drm_encoder *encoder,
+                                                 int fe);
 extern void radeon_atom_ext_encoder_setup_ddc(struct drm_encoder *encoder);
 extern struct drm_encoder *radeon_get_external_encoder(struct drm_encoder *encoder);
 void radeon_atom_copy_swap(u8 *dst, u8 *src, u8 num_bytes, bool to_le);
@@ -960,6 +993,15 @@ void radeon_crtc_handle_flip(struct radeon_device *rdev, int crtc_id);
 
 int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled);
 
+/* mst */
+int radeon_dp_mst_init(struct radeon_connector *radeon_connector);
+int radeon_dp_mst_probe(struct radeon_connector *radeon_connector);
+int radeon_dp_mst_check_status(struct radeon_connector *radeon_connector);
+int radeon_mst_debugfs_init(struct radeon_device *rdev);
+void radeon_dp_mst_prepare_pll(struct drm_crtc *crtc, struct drm_display_mode *mode);
+
+void radeon_setup_mst_connector(struct drm_device *dev);
+
 int radeon_atom_pick_dig_encoder(struct drm_encoder *encoder, int fe_idx);
 void radeon_atom_release_dig_encoder(struct radeon_device *rdev, int enc_idx);
 #endif