diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2014-08-09 14:18:42 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2014-08-11 07:23:38 -0400 |
commit | 87f1f46514babd40fc3551ca2d6148cdedd9c7e3 (patch) | |
tree | f11dd21e522d87a00b4363fc6786286a19417e5e /drivers/gpu/drm | |
parent | 82b6b6d786466e705e7244cc676189ce47a9199a (diff) |
drm/i915: Copy PCI device id into the device info block
This is so that we can make the drm_i915_private->info always the
preferred source for chipset type and feature queries.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/i915/i915_dma.c | 5 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 50 |
2 files changed, 29 insertions, 26 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index c965698a8bac..1867e2619e73 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -1603,9 +1603,10 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags) | |||
1603 | dev->dev_private = dev_priv; | 1603 | dev->dev_private = dev_priv; |
1604 | dev_priv->dev = dev; | 1604 | dev_priv->dev = dev; |
1605 | 1605 | ||
1606 | /* copy initial configuration to dev_priv->info */ | 1606 | /* Setup the write-once "constant" device info */ |
1607 | device_info = (struct intel_device_info *)&dev_priv->info; | 1607 | device_info = (struct intel_device_info *)&dev_priv->info; |
1608 | *device_info = *info; | 1608 | memcpy(device_info, info, sizeof(dev_priv->info)); |
1609 | device_info->device_id = dev->pdev->device; | ||
1609 | 1610 | ||
1610 | spin_lock_init(&dev_priv->irq_lock); | 1611 | spin_lock_init(&dev_priv->irq_lock); |
1611 | spin_lock_init(&dev_priv->gpu_error.lock); | 1612 | spin_lock_init(&dev_priv->gpu_error.lock); |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 5c3f033ff928..8a55f07d80cb 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -558,6 +558,7 @@ struct intel_uncore { | |||
558 | 558 | ||
559 | struct intel_device_info { | 559 | struct intel_device_info { |
560 | u32 display_mmio_offset; | 560 | u32 display_mmio_offset; |
561 | u16 device_id; | ||
561 | u8 num_pipes:3; | 562 | u8 num_pipes:3; |
562 | u8 num_sprites[I915_MAX_PIPES]; | 563 | u8 num_sprites[I915_MAX_PIPES]; |
563 | u8 gen; | 564 | u8 gen; |
@@ -1980,51 +1981,52 @@ struct drm_i915_cmd_table { | |||
1980 | int count; | 1981 | int count; |
1981 | }; | 1982 | }; |
1982 | 1983 | ||
1983 | #define INTEL_INFO(dev) (&to_i915(dev)->info) | 1984 | #define INTEL_INFO(p) (&to_i915(p)->info) |
1985 | #define INTEL_DEVID(p) (INTEL_INFO(p)->device_id) | ||
1984 | 1986 | ||
1985 | #define IS_I830(dev) ((dev)->pdev->device == 0x3577) | 1987 | #define IS_I830(dev) (INTEL_DEVID(dev) == 0x3577) |
1986 | #define IS_845G(dev) ((dev)->pdev->device == 0x2562) | 1988 | #define IS_845G(dev) (INTEL_DEVID(dev) == 0x2562) |
1987 | #define IS_I85X(dev) (INTEL_INFO(dev)->is_i85x) | 1989 | #define IS_I85X(dev) (INTEL_INFO(dev)->is_i85x) |
1988 | #define IS_I865G(dev) ((dev)->pdev->device == 0x2572) | 1990 | #define IS_I865G(dev) (INTEL_DEVID(dev) == 0x2572) |
1989 | #define IS_I915G(dev) (INTEL_INFO(dev)->is_i915g) | 1991 | #define IS_I915G(dev) (INTEL_INFO(dev)->is_i915g) |
1990 | #define IS_I915GM(dev) ((dev)->pdev->device == 0x2592) | 1992 | #define IS_I915GM(dev) (INTEL_DEVID(dev) == 0x2592) |
1991 | #define IS_I945G(dev) ((dev)->pdev->device == 0x2772) | 1993 | #define IS_I945G(dev) (INTEL_DEVID(dev) == 0x2772) |
1992 | #define IS_I945GM(dev) (INTEL_INFO(dev)->is_i945gm) | 1994 | #define IS_I945GM(dev) (INTEL_INFO(dev)->is_i945gm) |
1993 | #define IS_BROADWATER(dev) (INTEL_INFO(dev)->is_broadwater) | 1995 | #define IS_BROADWATER(dev) (INTEL_INFO(dev)->is_broadwater) |
1994 | #define IS_CRESTLINE(dev) (INTEL_INFO(dev)->is_crestline) | 1996 | #define IS_CRESTLINE(dev) (INTEL_INFO(dev)->is_crestline) |
1995 | #define IS_GM45(dev) ((dev)->pdev->device == 0x2A42) | 1997 | #define IS_GM45(dev) (INTEL_DEVID(dev) == 0x2A42) |
1996 | #define IS_G4X(dev) (INTEL_INFO(dev)->is_g4x) | 1998 | #define IS_G4X(dev) (INTEL_INFO(dev)->is_g4x) |
1997 | #define IS_PINEVIEW_G(dev) ((dev)->pdev->device == 0xa001) | 1999 | #define IS_PINEVIEW_G(dev) (INTEL_DEVID(dev) == 0xa001) |
1998 | #define IS_PINEVIEW_M(dev) ((dev)->pdev->device == 0xa011) | 2000 | #define IS_PINEVIEW_M(dev) (INTEL_DEVID(dev) == 0xa011) |
1999 | #define IS_PINEVIEW(dev) (INTEL_INFO(dev)->is_pineview) | 2001 | #define IS_PINEVIEW(dev) (INTEL_INFO(dev)->is_pineview) |
2000 | #define IS_G33(dev) (INTEL_INFO(dev)->is_g33) | 2002 | #define IS_G33(dev) (INTEL_INFO(dev)->is_g33) |
2001 | #define IS_IRONLAKE_M(dev) ((dev)->pdev->device == 0x0046) | 2003 | #define IS_IRONLAKE_M(dev) (INTEL_DEVID(dev) == 0x0046) |
2002 | #define IS_IVYBRIDGE(dev) (INTEL_INFO(dev)->is_ivybridge) | 2004 | #define IS_IVYBRIDGE(dev) (INTEL_INFO(dev)->is_ivybridge) |
2003 | #define IS_IVB_GT1(dev) ((dev)->pdev->device == 0x0156 || \ | 2005 | #define IS_IVB_GT1(dev) (INTEL_DEVID(dev) == 0x0156 || \ |
2004 | (dev)->pdev->device == 0x0152 || \ | 2006 | INTEL_DEVID(dev) == 0x0152 || \ |
2005 | (dev)->pdev->device == 0x015a) | 2007 | INTEL_DEVID(dev) == 0x015a) |
2006 | #define IS_SNB_GT1(dev) ((dev)->pdev->device == 0x0102 || \ | 2008 | #define IS_SNB_GT1(dev) (INTEL_DEVID(dev) == 0x0102 || \ |
2007 | (dev)->pdev->device == 0x0106 || \ | 2009 | INTEL_DEVID(dev) == 0x0106 || \ |
2008 | (dev)->pdev->device == 0x010A) | 2010 | INTEL_DEVID(dev) == 0x010A) |
2009 | #define IS_VALLEYVIEW(dev) (INTEL_INFO(dev)->is_valleyview) | 2011 | #define IS_VALLEYVIEW(dev) (INTEL_INFO(dev)->is_valleyview) |
2010 | #define IS_CHERRYVIEW(dev) (INTEL_INFO(dev)->is_valleyview && IS_GEN8(dev)) | 2012 | #define IS_CHERRYVIEW(dev) (INTEL_INFO(dev)->is_valleyview && IS_GEN8(dev)) |
2011 | #define IS_HASWELL(dev) (INTEL_INFO(dev)->is_haswell) | 2013 | #define IS_HASWELL(dev) (INTEL_INFO(dev)->is_haswell) |
2012 | #define IS_BROADWELL(dev) (!INTEL_INFO(dev)->is_valleyview && IS_GEN8(dev)) | 2014 | #define IS_BROADWELL(dev) (!INTEL_INFO(dev)->is_valleyview && IS_GEN8(dev)) |
2013 | #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile) | 2015 | #define IS_MOBILE(dev) (INTEL_INFO(dev)->is_mobile) |
2014 | #define IS_HSW_EARLY_SDV(dev) (IS_HASWELL(dev) && \ | 2016 | #define IS_HSW_EARLY_SDV(dev) (IS_HASWELL(dev) && \ |
2015 | ((dev)->pdev->device & 0xFF00) == 0x0C00) | 2017 | (INTEL_DEVID(dev) & 0xFF00) == 0x0C00) |
2016 | #define IS_BDW_ULT(dev) (IS_BROADWELL(dev) && \ | 2018 | #define IS_BDW_ULT(dev) (IS_BROADWELL(dev) && \ |
2017 | (((dev)->pdev->device & 0xf) == 0x2 || \ | 2019 | ((INTEL_DEVID(dev) & 0xf) == 0x2 || \ |
2018 | ((dev)->pdev->device & 0xf) == 0x6 || \ | 2020 | (INTEL_DEVID(dev) & 0xf) == 0x6 || \ |
2019 | ((dev)->pdev->device & 0xf) == 0xe)) | 2021 | (INTEL_DEVID(dev) & 0xf) == 0xe)) |
2020 | #define IS_HSW_ULT(dev) (IS_HASWELL(dev) && \ | 2022 | #define IS_HSW_ULT(dev) (IS_HASWELL(dev) && \ |
2021 | ((dev)->pdev->device & 0xFF00) == 0x0A00) | 2023 | (INTEL_DEVID(dev) & 0xFF00) == 0x0A00) |
2022 | #define IS_ULT(dev) (IS_HSW_ULT(dev) || IS_BDW_ULT(dev)) | 2024 | #define IS_ULT(dev) (IS_HSW_ULT(dev) || IS_BDW_ULT(dev)) |
2023 | #define IS_HSW_GT3(dev) (IS_HASWELL(dev) && \ | 2025 | #define IS_HSW_GT3(dev) (IS_HASWELL(dev) && \ |
2024 | ((dev)->pdev->device & 0x00F0) == 0x0020) | 2026 | (INTEL_DEVID(dev) & 0x00F0) == 0x0020) |
2025 | /* ULX machines are also considered ULT. */ | 2027 | /* ULX machines are also considered ULT. */ |
2026 | #define IS_HSW_ULX(dev) ((dev)->pdev->device == 0x0A0E || \ | 2028 | #define IS_HSW_ULX(dev) (INTEL_DEVID(dev) == 0x0A0E || \ |
2027 | (dev)->pdev->device == 0x0A1E) | 2029 | INTEL_DEVID(dev) == 0x0A1E) |
2028 | #define IS_PRELIMINARY_HW(intel_info) ((intel_info)->is_preliminary) | 2030 | #define IS_PRELIMINARY_HW(intel_info) ((intel_info)->is_preliminary) |
2029 | 2031 | ||
2030 | /* | 2032 | /* |