diff options
author | Imre Deak <imre.deak@intel.com> | 2014-12-15 11:59:27 -0500 |
---|---|---|
committer | Jani Nikula <jani.nikula@intel.com> | 2014-12-15 12:13:46 -0500 |
commit | 78e68d36dab31c1f41885f757195fdfb29fc3075 (patch) | |
tree | cbac4aeff0006b9d79f17a6dd79196e9d71d2170 /drivers/gpu/drm | |
parent | c352d1ba1e1e2c8a96af660944a58e86b12ac4af (diff) |
drm/i915: move RPS PM_IER enabling to gen6_enable_rps_interrupts
Paulo noticed that we don't enable RPS interrupts via PM_IER in
gen6_enable_rps_interrupts(). This wasn't a problem so far, since the
only place we disabled RPS interrupts was during system/runtime suspend
and after that we reenable all interrupts in the IRQ pre/postinstall
hooks.
In the next patch we'll disable/reenable RPS interrupts during GPU reset
too, but not call IRQ uninstall, pre/postinstall hooks, so there the
above wouldn't work. The logical place for programming PM_IER is
gen6_enable_rps_interrupts() and this also makes the function more
symmetric with gen6_disable_rps_interrupts(), so move the programming
there from the postinstall hooks.
Note that these changes don't affect the ILK RPS interrupt code, which
could be sanitized in a similar way. But that can be done as a
follow-up.
Credits-to: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 8bab2ab228b8..996c2931c499 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -281,10 +281,14 @@ void gen6_enable_rps_interrupts(struct drm_device *dev) | |||
281 | struct drm_i915_private *dev_priv = dev->dev_private; | 281 | struct drm_i915_private *dev_priv = dev->dev_private; |
282 | 282 | ||
283 | spin_lock_irq(&dev_priv->irq_lock); | 283 | spin_lock_irq(&dev_priv->irq_lock); |
284 | |||
284 | WARN_ON(dev_priv->rps.pm_iir); | 285 | WARN_ON(dev_priv->rps.pm_iir); |
285 | WARN_ON(I915_READ(gen6_pm_iir(dev_priv)) & dev_priv->pm_rps_events); | 286 | WARN_ON(I915_READ(gen6_pm_iir(dev_priv)) & dev_priv->pm_rps_events); |
286 | dev_priv->rps.interrupts_enabled = true; | 287 | dev_priv->rps.interrupts_enabled = true; |
288 | I915_WRITE(gen6_pm_ier(dev_priv), I915_READ(gen6_pm_ier(dev_priv)) | | ||
289 | dev_priv->pm_rps_events); | ||
287 | gen6_enable_pm_irq(dev_priv, dev_priv->pm_rps_events); | 290 | gen6_enable_pm_irq(dev_priv, dev_priv->pm_rps_events); |
291 | |||
288 | spin_unlock_irq(&dev_priv->irq_lock); | 292 | spin_unlock_irq(&dev_priv->irq_lock); |
289 | } | 293 | } |
290 | 294 | ||
@@ -3307,8 +3311,10 @@ static void gen5_gt_irq_postinstall(struct drm_device *dev) | |||
3307 | GEN5_IRQ_INIT(GT, dev_priv->gt_irq_mask, gt_irqs); | 3311 | GEN5_IRQ_INIT(GT, dev_priv->gt_irq_mask, gt_irqs); |
3308 | 3312 | ||
3309 | if (INTEL_INFO(dev)->gen >= 6) { | 3313 | if (INTEL_INFO(dev)->gen >= 6) { |
3310 | pm_irqs |= dev_priv->pm_rps_events; | 3314 | /* |
3311 | 3315 | * RPS interrupts will get enabled/disabled on demand when RPS | |
3316 | * itself is enabled/disabled. | ||
3317 | */ | ||
3312 | if (HAS_VEBOX(dev)) | 3318 | if (HAS_VEBOX(dev)) |
3313 | pm_irqs |= PM_VEBOX_USER_INTERRUPT; | 3319 | pm_irqs |= PM_VEBOX_USER_INTERRUPT; |
3314 | 3320 | ||
@@ -3520,7 +3526,11 @@ static void gen8_gt_irq_postinstall(struct drm_i915_private *dev_priv) | |||
3520 | dev_priv->pm_irq_mask = 0xffffffff; | 3526 | dev_priv->pm_irq_mask = 0xffffffff; |
3521 | GEN8_IRQ_INIT_NDX(GT, 0, ~gt_interrupts[0], gt_interrupts[0]); | 3527 | GEN8_IRQ_INIT_NDX(GT, 0, ~gt_interrupts[0], gt_interrupts[0]); |
3522 | GEN8_IRQ_INIT_NDX(GT, 1, ~gt_interrupts[1], gt_interrupts[1]); | 3528 | GEN8_IRQ_INIT_NDX(GT, 1, ~gt_interrupts[1], gt_interrupts[1]); |
3523 | GEN8_IRQ_INIT_NDX(GT, 2, dev_priv->pm_irq_mask, dev_priv->pm_rps_events); | 3529 | /* |
3530 | * RPS interrupts will get enabled/disabled on demand when RPS itself | ||
3531 | * is enabled/disabled. | ||
3532 | */ | ||
3533 | GEN8_IRQ_INIT_NDX(GT, 2, dev_priv->pm_irq_mask, 0); | ||
3524 | GEN8_IRQ_INIT_NDX(GT, 3, ~gt_interrupts[3], gt_interrupts[3]); | 3534 | GEN8_IRQ_INIT_NDX(GT, 3, ~gt_interrupts[3], gt_interrupts[3]); |
3525 | } | 3535 | } |
3526 | 3536 | ||