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authorDaniel Vetter <daniel.vetter@ffwll.ch>2012-04-17 05:13:03 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2012-04-17 05:16:20 -0400
commit767878908e7cc28c440c5431f6591157d8bd4ae7 (patch)
tree5780a93e07a5643e7ee33136f54b15dd7b9cab54 /drivers/gpu/drm
parent17038de5f16569a25343cf68668f3b657eafb00e (diff)
parente816b57a337ea3b755de72bec38c10c864f23015 (diff)
Merge tag 'v3.4-rc3' into drm-intel-next-queued
Backmerge Linux 3.4-rc3 into drm-intel-next to resolve a few things that conflict/depend upon patches in -rc3: - Second part of the Sandybridge workaround series - it changes some of the same registers. - Preparation for Chris Wilson's fencing cleanup - we need the fix from -rc3 merged before we can move around all that code. - Resolve the gmbus conflict - gmbus has been disabled in 3.4 again, but should be enabled on all generations in 3.5. Conflicts: drivers/gpu/drm/i915/intel_i2c.c Signed-Off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_buf.c47
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_core.c14
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_drv.h10
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fimd.c20
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_gem.c45
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_gem.h2
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_hdmi.c107
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_hdmi.h23
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_plane.c4
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_vidi.c20
-rw-r--r--drivers/gpu/drm/exynos/exynos_hdmi.c42
-rw-r--r--drivers/gpu/drm/exynos/exynos_mixer.c40
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c2
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c2
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h3
-rw-r--r--drivers/gpu/drm/i915/intel_display.c69
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c49
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c2
-rw-r--r--drivers/gpu/drm/i915/intel_sprite.c1
-rw-r--r--drivers/gpu/drm/radeon/atombios_encoders.c4
-rw-r--r--drivers/gpu/drm/radeon/r100.c2
-rw-r--r--drivers/gpu/drm/radeon/r600.c2
-rw-r--r--drivers/gpu/drm/radeon/r600_cp.c6
-rw-r--r--drivers/gpu/drm/radeon/radeon_clocks.c24
-rw-r--r--drivers/gpu/drm/radeon/radeon_combios.c8
-rw-r--r--drivers/gpu/drm/radeon/radeon_i2c.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_encoders.c12
-rw-r--r--drivers/gpu/drm/savage/savage_state.c6
28 files changed, 319 insertions, 251 deletions
diff --git a/drivers/gpu/drm/exynos/exynos_drm_buf.c b/drivers/gpu/drm/exynos/exynos_drm_buf.c
index 4a3a5f72ed4a..de8d2090bce3 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_buf.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_buf.c
@@ -34,14 +34,14 @@
34static int lowlevel_buffer_allocate(struct drm_device *dev, 34static int lowlevel_buffer_allocate(struct drm_device *dev,
35 unsigned int flags, struct exynos_drm_gem_buf *buf) 35 unsigned int flags, struct exynos_drm_gem_buf *buf)
36{ 36{
37 dma_addr_t start_addr, end_addr; 37 dma_addr_t start_addr;
38 unsigned int npages, page_size, i = 0; 38 unsigned int npages, page_size, i = 0;
39 struct scatterlist *sgl; 39 struct scatterlist *sgl;
40 int ret = 0; 40 int ret = 0;
41 41
42 DRM_DEBUG_KMS("%s\n", __FILE__); 42 DRM_DEBUG_KMS("%s\n", __FILE__);
43 43
44 if (flags & EXYNOS_BO_NONCONTIG) { 44 if (IS_NONCONTIG_BUFFER(flags)) {
45 DRM_DEBUG_KMS("not support allocation type.\n"); 45 DRM_DEBUG_KMS("not support allocation type.\n");
46 return -EINVAL; 46 return -EINVAL;
47 } 47 }
@@ -52,13 +52,13 @@ static int lowlevel_buffer_allocate(struct drm_device *dev,
52 } 52 }
53 53
54 if (buf->size >= SZ_1M) { 54 if (buf->size >= SZ_1M) {
55 npages = (buf->size >> SECTION_SHIFT) + 1; 55 npages = buf->size >> SECTION_SHIFT;
56 page_size = SECTION_SIZE; 56 page_size = SECTION_SIZE;
57 } else if (buf->size >= SZ_64K) { 57 } else if (buf->size >= SZ_64K) {
58 npages = (buf->size >> 16) + 1; 58 npages = buf->size >> 16;
59 page_size = SZ_64K; 59 page_size = SZ_64K;
60 } else { 60 } else {
61 npages = (buf->size >> PAGE_SHIFT) + 1; 61 npages = buf->size >> PAGE_SHIFT;
62 page_size = PAGE_SIZE; 62 page_size = PAGE_SIZE;
63 } 63 }
64 64
@@ -76,26 +76,13 @@ static int lowlevel_buffer_allocate(struct drm_device *dev,
76 return -ENOMEM; 76 return -ENOMEM;
77 } 77 }
78 78
79 buf->kvaddr = dma_alloc_writecombine(dev->dev, buf->size, 79 buf->kvaddr = dma_alloc_writecombine(dev->dev, buf->size,
80 &buf->dma_addr, GFP_KERNEL); 80 &buf->dma_addr, GFP_KERNEL);
81 if (!buf->kvaddr) { 81 if (!buf->kvaddr) {
82 DRM_ERROR("failed to allocate buffer.\n"); 82 DRM_ERROR("failed to allocate buffer.\n");
83 ret = -ENOMEM; 83 ret = -ENOMEM;
84 goto err1; 84 goto err1;
85 } 85 }
86
87 start_addr = buf->dma_addr;
88 end_addr = buf->dma_addr + buf->size;
89
90 buf->pages = kzalloc(sizeof(struct page) * npages, GFP_KERNEL);
91 if (!buf->pages) {
92 DRM_ERROR("failed to allocate pages.\n");
93 ret = -ENOMEM;
94 goto err2;
95 }
96
97 start_addr = buf->dma_addr;
98 end_addr = buf->dma_addr + buf->size;
99 86
100 buf->pages = kzalloc(sizeof(struct page) * npages, GFP_KERNEL); 87 buf->pages = kzalloc(sizeof(struct page) * npages, GFP_KERNEL);
101 if (!buf->pages) { 88 if (!buf->pages) {
@@ -105,23 +92,17 @@ static int lowlevel_buffer_allocate(struct drm_device *dev,
105 } 92 }
106 93
107 sgl = buf->sgt->sgl; 94 sgl = buf->sgt->sgl;
95 start_addr = buf->dma_addr;
108 96
109 while (i < npages) { 97 while (i < npages) {
110 buf->pages[i] = phys_to_page(start_addr); 98 buf->pages[i] = phys_to_page(start_addr);
111 sg_set_page(sgl, buf->pages[i], page_size, 0); 99 sg_set_page(sgl, buf->pages[i], page_size, 0);
112 sg_dma_address(sgl) = start_addr; 100 sg_dma_address(sgl) = start_addr;
113 start_addr += page_size; 101 start_addr += page_size;
114 if (end_addr - start_addr < page_size)
115 break;
116 sgl = sg_next(sgl); 102 sgl = sg_next(sgl);
117 i++; 103 i++;
118 } 104 }
119 105
120 buf->pages[i] = phys_to_page(start_addr);
121
122 sgl = sg_next(sgl);
123 sg_set_page(sgl, buf->pages[i+1], end_addr - start_addr, 0);
124
125 DRM_DEBUG_KMS("vaddr(0x%lx), dma_addr(0x%lx), size(0x%lx)\n", 106 DRM_DEBUG_KMS("vaddr(0x%lx), dma_addr(0x%lx), size(0x%lx)\n",
126 (unsigned long)buf->kvaddr, 107 (unsigned long)buf->kvaddr,
127 (unsigned long)buf->dma_addr, 108 (unsigned long)buf->dma_addr,
@@ -150,7 +131,7 @@ static void lowlevel_buffer_deallocate(struct drm_device *dev,
150 * non-continuous memory would be released by exynos 131 * non-continuous memory would be released by exynos
151 * gem framework. 132 * gem framework.
152 */ 133 */
153 if (flags & EXYNOS_BO_NONCONTIG) { 134 if (IS_NONCONTIG_BUFFER(flags)) {
154 DRM_DEBUG_KMS("not support allocation type.\n"); 135 DRM_DEBUG_KMS("not support allocation type.\n");
155 return; 136 return;
156 } 137 }
diff --git a/drivers/gpu/drm/exynos/exynos_drm_core.c b/drivers/gpu/drm/exynos/exynos_drm_core.c
index 411832e8e17a..eaf630dc5dba 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_core.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_core.c
@@ -54,16 +54,18 @@ static int exynos_drm_subdrv_probe(struct drm_device *dev,
54 * 54 *
55 * P.S. note that this driver is considered for modularization. 55 * P.S. note that this driver is considered for modularization.
56 */ 56 */
57 ret = subdrv->probe(dev, subdrv->manager.dev); 57 ret = subdrv->probe(dev, subdrv->dev);
58 if (ret) 58 if (ret)
59 return ret; 59 return ret;
60 } 60 }
61 61
62 if (subdrv->is_local) 62 if (!subdrv->manager)
63 return 0; 63 return 0;
64 64
65 subdrv->manager->dev = subdrv->dev;
66
65 /* create and initialize a encoder for this sub driver. */ 67 /* create and initialize a encoder for this sub driver. */
66 encoder = exynos_drm_encoder_create(dev, &subdrv->manager, 68 encoder = exynos_drm_encoder_create(dev, subdrv->manager,
67 (1 << MAX_CRTC) - 1); 69 (1 << MAX_CRTC) - 1);
68 if (!encoder) { 70 if (!encoder) {
69 DRM_ERROR("failed to create encoder\n"); 71 DRM_ERROR("failed to create encoder\n");
@@ -186,7 +188,7 @@ int exynos_drm_subdrv_open(struct drm_device *dev, struct drm_file *file)
186 188
187 list_for_each_entry(subdrv, &exynos_drm_subdrv_list, list) { 189 list_for_each_entry(subdrv, &exynos_drm_subdrv_list, list) {
188 if (subdrv->open) { 190 if (subdrv->open) {
189 ret = subdrv->open(dev, subdrv->manager.dev, file); 191 ret = subdrv->open(dev, subdrv->dev, file);
190 if (ret) 192 if (ret)
191 goto err; 193 goto err;
192 } 194 }
@@ -197,7 +199,7 @@ int exynos_drm_subdrv_open(struct drm_device *dev, struct drm_file *file)
197err: 199err:
198 list_for_each_entry_reverse(subdrv, &subdrv->list, list) { 200 list_for_each_entry_reverse(subdrv, &subdrv->list, list) {
199 if (subdrv->close) 201 if (subdrv->close)
200 subdrv->close(dev, subdrv->manager.dev, file); 202 subdrv->close(dev, subdrv->dev, file);
201 } 203 }
202 return ret; 204 return ret;
203} 205}
@@ -209,7 +211,7 @@ void exynos_drm_subdrv_close(struct drm_device *dev, struct drm_file *file)
209 211
210 list_for_each_entry(subdrv, &exynos_drm_subdrv_list, list) { 212 list_for_each_entry(subdrv, &exynos_drm_subdrv_list, list) {
211 if (subdrv->close) 213 if (subdrv->close)
212 subdrv->close(dev, subdrv->manager.dev, file); 214 subdrv->close(dev, subdrv->dev, file);
213 } 215 }
214} 216}
215EXPORT_SYMBOL_GPL(exynos_drm_subdrv_close); 217EXPORT_SYMBOL_GPL(exynos_drm_subdrv_close);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.h b/drivers/gpu/drm/exynos/exynos_drm_drv.h
index fbd0a232c93d..1d814175cd49 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.h
@@ -225,24 +225,25 @@ struct exynos_drm_private {
225 * Exynos drm sub driver structure. 225 * Exynos drm sub driver structure.
226 * 226 *
227 * @list: sub driver has its own list object to register to exynos drm driver. 227 * @list: sub driver has its own list object to register to exynos drm driver.
228 * @dev: pointer to device object for subdrv device driver.
228 * @drm_dev: pointer to drm_device and this pointer would be set 229 * @drm_dev: pointer to drm_device and this pointer would be set
229 * when sub driver calls exynos_drm_subdrv_register(). 230 * when sub driver calls exynos_drm_subdrv_register().
230 * @is_local: appear encoder and connector disrelated device. 231 * @manager: subdrv has its own manager to control a hardware appropriately
232 * and we can access a hardware drawing on this manager.
231 * @probe: this callback would be called by exynos drm driver after 233 * @probe: this callback would be called by exynos drm driver after
232 * subdrv is registered to it. 234 * subdrv is registered to it.
233 * @remove: this callback is used to release resources created 235 * @remove: this callback is used to release resources created
234 * by probe callback. 236 * by probe callback.
235 * @open: this would be called with drm device file open. 237 * @open: this would be called with drm device file open.
236 * @close: this would be called with drm device file close. 238 * @close: this would be called with drm device file close.
237 * @manager: subdrv has its own manager to control a hardware appropriately
238 * and we can access a hardware drawing on this manager.
239 * @encoder: encoder object owned by this sub driver. 239 * @encoder: encoder object owned by this sub driver.
240 * @connector: connector object owned by this sub driver. 240 * @connector: connector object owned by this sub driver.
241 */ 241 */
242struct exynos_drm_subdrv { 242struct exynos_drm_subdrv {
243 struct list_head list; 243 struct list_head list;
244 struct device *dev;
244 struct drm_device *drm_dev; 245 struct drm_device *drm_dev;
245 bool is_local; 246 struct exynos_drm_manager *manager;
246 247
247 int (*probe)(struct drm_device *drm_dev, struct device *dev); 248 int (*probe)(struct drm_device *drm_dev, struct device *dev);
248 void (*remove)(struct drm_device *dev); 249 void (*remove)(struct drm_device *dev);
@@ -251,7 +252,6 @@ struct exynos_drm_subdrv {
251 void (*close)(struct drm_device *drm_dev, struct device *dev, 252 void (*close)(struct drm_device *drm_dev, struct device *dev,
252 struct drm_file *file); 253 struct drm_file *file);
253 254
254 struct exynos_drm_manager manager;
255 struct drm_encoder *encoder; 255 struct drm_encoder *encoder;
256 struct drm_connector *connector; 256 struct drm_connector *connector;
257}; 257};
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index ecb6db229700..29fdbfeb43cb 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -172,7 +172,7 @@ static void fimd_dpms(struct device *subdrv_dev, int mode)
172static void fimd_apply(struct device *subdrv_dev) 172static void fimd_apply(struct device *subdrv_dev)
173{ 173{
174 struct fimd_context *ctx = get_fimd_context(subdrv_dev); 174 struct fimd_context *ctx = get_fimd_context(subdrv_dev);
175 struct exynos_drm_manager *mgr = &ctx->subdrv.manager; 175 struct exynos_drm_manager *mgr = ctx->subdrv.manager;
176 struct exynos_drm_manager_ops *mgr_ops = mgr->ops; 176 struct exynos_drm_manager_ops *mgr_ops = mgr->ops;
177 struct exynos_drm_overlay_ops *ovl_ops = mgr->overlay_ops; 177 struct exynos_drm_overlay_ops *ovl_ops = mgr->overlay_ops;
178 struct fimd_win_data *win_data; 178 struct fimd_win_data *win_data;
@@ -577,6 +577,13 @@ static struct exynos_drm_overlay_ops fimd_overlay_ops = {
577 .disable = fimd_win_disable, 577 .disable = fimd_win_disable,
578}; 578};
579 579
580static struct exynos_drm_manager fimd_manager = {
581 .pipe = -1,
582 .ops = &fimd_manager_ops,
583 .overlay_ops = &fimd_overlay_ops,
584 .display_ops = &fimd_display_ops,
585};
586
580static void fimd_finish_pageflip(struct drm_device *drm_dev, int crtc) 587static void fimd_finish_pageflip(struct drm_device *drm_dev, int crtc)
581{ 588{
582 struct exynos_drm_private *dev_priv = drm_dev->dev_private; 589 struct exynos_drm_private *dev_priv = drm_dev->dev_private;
@@ -628,7 +635,7 @@ static irqreturn_t fimd_irq_handler(int irq, void *dev_id)
628 struct fimd_context *ctx = (struct fimd_context *)dev_id; 635 struct fimd_context *ctx = (struct fimd_context *)dev_id;
629 struct exynos_drm_subdrv *subdrv = &ctx->subdrv; 636 struct exynos_drm_subdrv *subdrv = &ctx->subdrv;
630 struct drm_device *drm_dev = subdrv->drm_dev; 637 struct drm_device *drm_dev = subdrv->drm_dev;
631 struct exynos_drm_manager *manager = &subdrv->manager; 638 struct exynos_drm_manager *manager = subdrv->manager;
632 u32 val; 639 u32 val;
633 640
634 val = readl(ctx->regs + VIDINTCON1); 641 val = readl(ctx->regs + VIDINTCON1);
@@ -744,7 +751,7 @@ static void fimd_clear_win(struct fimd_context *ctx, int win)
744static int fimd_power_on(struct fimd_context *ctx, bool enable) 751static int fimd_power_on(struct fimd_context *ctx, bool enable)
745{ 752{
746 struct exynos_drm_subdrv *subdrv = &ctx->subdrv; 753 struct exynos_drm_subdrv *subdrv = &ctx->subdrv;
747 struct device *dev = subdrv->manager.dev; 754 struct device *dev = subdrv->dev;
748 755
749 DRM_DEBUG_KMS("%s\n", __FILE__); 756 DRM_DEBUG_KMS("%s\n", __FILE__);
750 757
@@ -867,13 +874,10 @@ static int __devinit fimd_probe(struct platform_device *pdev)
867 874
868 subdrv = &ctx->subdrv; 875 subdrv = &ctx->subdrv;
869 876
877 subdrv->dev = dev;
878 subdrv->manager = &fimd_manager;
870 subdrv->probe = fimd_subdrv_probe; 879 subdrv->probe = fimd_subdrv_probe;
871 subdrv->remove = fimd_subdrv_remove; 880 subdrv->remove = fimd_subdrv_remove;
872 subdrv->manager.pipe = -1;
873 subdrv->manager.ops = &fimd_manager_ops;
874 subdrv->manager.overlay_ops = &fimd_overlay_ops;
875 subdrv->manager.display_ops = &fimd_display_ops;
876 subdrv->manager.dev = dev;
877 881
878 mutex_init(&ctx->lock); 882 mutex_init(&ctx->lock);
879 883
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.c b/drivers/gpu/drm/exynos/exynos_drm_gem.c
index fa1aa94a3d8e..26d51979116b 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.c
@@ -56,9 +56,28 @@ static unsigned int convert_to_vm_err_msg(int msg)
56 return out_msg; 56 return out_msg;
57} 57}
58 58
59static unsigned int mask_gem_flags(unsigned int flags) 59static int check_gem_flags(unsigned int flags)
60{ 60{
61 return flags &= EXYNOS_BO_NONCONTIG; 61 if (flags & ~(EXYNOS_BO_MASK)) {
62 DRM_ERROR("invalid flags.\n");
63 return -EINVAL;
64 }
65
66 return 0;
67}
68
69static unsigned long roundup_gem_size(unsigned long size, unsigned int flags)
70{
71 if (!IS_NONCONTIG_BUFFER(flags)) {
72 if (size >= SZ_1M)
73 return roundup(size, SECTION_SIZE);
74 else if (size >= SZ_64K)
75 return roundup(size, SZ_64K);
76 else
77 goto out;
78 }
79out:
80 return roundup(size, PAGE_SIZE);
62} 81}
63 82
64static struct page **exynos_gem_get_pages(struct drm_gem_object *obj, 83static struct page **exynos_gem_get_pages(struct drm_gem_object *obj,
@@ -319,10 +338,17 @@ struct exynos_drm_gem_obj *exynos_drm_gem_create(struct drm_device *dev,
319 struct exynos_drm_gem_buf *buf; 338 struct exynos_drm_gem_buf *buf;
320 int ret; 339 int ret;
321 340
322 size = roundup(size, PAGE_SIZE); 341 if (!size) {
323 DRM_DEBUG_KMS("%s: size = 0x%lx\n", __FILE__, size); 342 DRM_ERROR("invalid size.\n");
343 return ERR_PTR(-EINVAL);
344 }
324 345
325 flags = mask_gem_flags(flags); 346 size = roundup_gem_size(size, flags);
347 DRM_DEBUG_KMS("%s\n", __FILE__);
348
349 ret = check_gem_flags(flags);
350 if (ret)
351 return ERR_PTR(ret);
326 352
327 buf = exynos_drm_init_buf(dev, size); 353 buf = exynos_drm_init_buf(dev, size);
328 if (!buf) 354 if (!buf)
@@ -331,7 +357,7 @@ struct exynos_drm_gem_obj *exynos_drm_gem_create(struct drm_device *dev,
331 exynos_gem_obj = exynos_drm_gem_init(dev, size); 357 exynos_gem_obj = exynos_drm_gem_init(dev, size);
332 if (!exynos_gem_obj) { 358 if (!exynos_gem_obj) {
333 ret = -ENOMEM; 359 ret = -ENOMEM;
334 goto err; 360 goto err_fini_buf;
335 } 361 }
336 362
337 exynos_gem_obj->buffer = buf; 363 exynos_gem_obj->buffer = buf;
@@ -347,18 +373,19 @@ struct exynos_drm_gem_obj *exynos_drm_gem_create(struct drm_device *dev,
347 ret = exynos_drm_gem_get_pages(&exynos_gem_obj->base); 373 ret = exynos_drm_gem_get_pages(&exynos_gem_obj->base);
348 if (ret < 0) { 374 if (ret < 0) {
349 drm_gem_object_release(&exynos_gem_obj->base); 375 drm_gem_object_release(&exynos_gem_obj->base);
350 goto err; 376 goto err_fini_buf;
351 } 377 }
352 } else { 378 } else {
353 ret = exynos_drm_alloc_buf(dev, buf, flags); 379 ret = exynos_drm_alloc_buf(dev, buf, flags);
354 if (ret < 0) { 380 if (ret < 0) {
355 drm_gem_object_release(&exynos_gem_obj->base); 381 drm_gem_object_release(&exynos_gem_obj->base);
356 goto err; 382 goto err_fini_buf;
357 } 383 }
358 } 384 }
359 385
360 return exynos_gem_obj; 386 return exynos_gem_obj;
361err: 387
388err_fini_buf:
362 exynos_drm_fini_buf(dev, buf); 389 exynos_drm_fini_buf(dev, buf);
363 return ERR_PTR(ret); 390 return ERR_PTR(ret);
364} 391}
diff --git a/drivers/gpu/drm/exynos/exynos_drm_gem.h b/drivers/gpu/drm/exynos/exynos_drm_gem.h
index e40fbad8b705..4ed842039505 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_gem.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_gem.h
@@ -29,6 +29,8 @@
29#define to_exynos_gem_obj(x) container_of(x,\ 29#define to_exynos_gem_obj(x) container_of(x,\
30 struct exynos_drm_gem_obj, base) 30 struct exynos_drm_gem_obj, base)
31 31
32#define IS_NONCONTIG_BUFFER(f) (f & EXYNOS_BO_NONCONTIG)
33
32/* 34/*
33 * exynos drm gem buffer structure. 35 * exynos drm gem buffer structure.
34 * 36 *
diff --git a/drivers/gpu/drm/exynos/exynos_drm_hdmi.c b/drivers/gpu/drm/exynos/exynos_drm_hdmi.c
index 14eb26b0ba1c..3424463676e0 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_hdmi.c
@@ -30,9 +30,8 @@
30 struct drm_hdmi_context, subdrv); 30 struct drm_hdmi_context, subdrv);
31 31
32/* these callback points shoud be set by specific drivers. */ 32/* these callback points shoud be set by specific drivers. */
33static struct exynos_hdmi_display_ops *hdmi_display_ops; 33static struct exynos_hdmi_ops *hdmi_ops;
34static struct exynos_hdmi_manager_ops *hdmi_manager_ops; 34static struct exynos_mixer_ops *mixer_ops;
35static struct exynos_hdmi_overlay_ops *hdmi_overlay_ops;
36 35
37struct drm_hdmi_context { 36struct drm_hdmi_context {
38 struct exynos_drm_subdrv subdrv; 37 struct exynos_drm_subdrv subdrv;
@@ -40,31 +39,20 @@ struct drm_hdmi_context {
40 struct exynos_drm_hdmi_context *mixer_ctx; 39 struct exynos_drm_hdmi_context *mixer_ctx;
41}; 40};
42 41
43void exynos_drm_display_ops_register(struct exynos_hdmi_display_ops 42void exynos_hdmi_ops_register(struct exynos_hdmi_ops *ops)
44 *display_ops)
45{ 43{
46 DRM_DEBUG_KMS("%s\n", __FILE__); 44 DRM_DEBUG_KMS("%s\n", __FILE__);
47 45
48 if (display_ops) 46 if (ops)
49 hdmi_display_ops = display_ops; 47 hdmi_ops = ops;
50} 48}
51 49
52void exynos_drm_manager_ops_register(struct exynos_hdmi_manager_ops 50void exynos_mixer_ops_register(struct exynos_mixer_ops *ops)
53 *manager_ops)
54{ 51{
55 DRM_DEBUG_KMS("%s\n", __FILE__); 52 DRM_DEBUG_KMS("%s\n", __FILE__);
56 53
57 if (manager_ops) 54 if (ops)
58 hdmi_manager_ops = manager_ops; 55 mixer_ops = ops;
59}
60
61void exynos_drm_overlay_ops_register(struct exynos_hdmi_overlay_ops
62 *overlay_ops)
63{
64 DRM_DEBUG_KMS("%s\n", __FILE__);
65
66 if (overlay_ops)
67 hdmi_overlay_ops = overlay_ops;
68} 56}
69 57
70static bool drm_hdmi_is_connected(struct device *dev) 58static bool drm_hdmi_is_connected(struct device *dev)
@@ -73,8 +61,8 @@ static bool drm_hdmi_is_connected(struct device *dev)
73 61
74 DRM_DEBUG_KMS("%s\n", __FILE__); 62 DRM_DEBUG_KMS("%s\n", __FILE__);
75 63
76 if (hdmi_display_ops && hdmi_display_ops->is_connected) 64 if (hdmi_ops && hdmi_ops->is_connected)
77 return hdmi_display_ops->is_connected(ctx->hdmi_ctx->ctx); 65 return hdmi_ops->is_connected(ctx->hdmi_ctx->ctx);
78 66
79 return false; 67 return false;
80} 68}
@@ -86,9 +74,9 @@ static int drm_hdmi_get_edid(struct device *dev,
86 74
87 DRM_DEBUG_KMS("%s\n", __FILE__); 75 DRM_DEBUG_KMS("%s\n", __FILE__);
88 76
89 if (hdmi_display_ops && hdmi_display_ops->get_edid) 77 if (hdmi_ops && hdmi_ops->get_edid)
90 return hdmi_display_ops->get_edid(ctx->hdmi_ctx->ctx, 78 return hdmi_ops->get_edid(ctx->hdmi_ctx->ctx, connector, edid,
91 connector, edid, len); 79 len);
92 80
93 return 0; 81 return 0;
94} 82}
@@ -99,9 +87,8 @@ static int drm_hdmi_check_timing(struct device *dev, void *timing)
99 87
100 DRM_DEBUG_KMS("%s\n", __FILE__); 88 DRM_DEBUG_KMS("%s\n", __FILE__);
101 89
102 if (hdmi_display_ops && hdmi_display_ops->check_timing) 90 if (hdmi_ops && hdmi_ops->check_timing)
103 return hdmi_display_ops->check_timing(ctx->hdmi_ctx->ctx, 91 return hdmi_ops->check_timing(ctx->hdmi_ctx->ctx, timing);
104 timing);
105 92
106 return 0; 93 return 0;
107} 94}
@@ -112,8 +99,8 @@ static int drm_hdmi_power_on(struct device *dev, int mode)
112 99
113 DRM_DEBUG_KMS("%s\n", __FILE__); 100 DRM_DEBUG_KMS("%s\n", __FILE__);
114 101
115 if (hdmi_display_ops && hdmi_display_ops->power_on) 102 if (hdmi_ops && hdmi_ops->power_on)
116 return hdmi_display_ops->power_on(ctx->hdmi_ctx->ctx, mode); 103 return hdmi_ops->power_on(ctx->hdmi_ctx->ctx, mode);
117 104
118 return 0; 105 return 0;
119} 106}
@@ -130,13 +117,13 @@ static int drm_hdmi_enable_vblank(struct device *subdrv_dev)
130{ 117{
131 struct drm_hdmi_context *ctx = to_context(subdrv_dev); 118 struct drm_hdmi_context *ctx = to_context(subdrv_dev);
132 struct exynos_drm_subdrv *subdrv = &ctx->subdrv; 119 struct exynos_drm_subdrv *subdrv = &ctx->subdrv;
133 struct exynos_drm_manager *manager = &subdrv->manager; 120 struct exynos_drm_manager *manager = subdrv->manager;
134 121
135 DRM_DEBUG_KMS("%s\n", __FILE__); 122 DRM_DEBUG_KMS("%s\n", __FILE__);
136 123
137 if (hdmi_overlay_ops && hdmi_overlay_ops->enable_vblank) 124 if (mixer_ops && mixer_ops->enable_vblank)
138 return hdmi_overlay_ops->enable_vblank(ctx->mixer_ctx->ctx, 125 return mixer_ops->enable_vblank(ctx->mixer_ctx->ctx,
139 manager->pipe); 126 manager->pipe);
140 127
141 return 0; 128 return 0;
142} 129}
@@ -147,8 +134,8 @@ static void drm_hdmi_disable_vblank(struct device *subdrv_dev)
147 134
148 DRM_DEBUG_KMS("%s\n", __FILE__); 135 DRM_DEBUG_KMS("%s\n", __FILE__);
149 136
150 if (hdmi_overlay_ops && hdmi_overlay_ops->disable_vblank) 137 if (mixer_ops && mixer_ops->disable_vblank)
151 return hdmi_overlay_ops->disable_vblank(ctx->mixer_ctx->ctx); 138 return mixer_ops->disable_vblank(ctx->mixer_ctx->ctx);
152} 139}
153 140
154static void drm_hdmi_mode_fixup(struct device *subdrv_dev, 141static void drm_hdmi_mode_fixup(struct device *subdrv_dev,
@@ -160,9 +147,9 @@ static void drm_hdmi_mode_fixup(struct device *subdrv_dev,
160 147
161 DRM_DEBUG_KMS("%s\n", __FILE__); 148 DRM_DEBUG_KMS("%s\n", __FILE__);
162 149
163 if (hdmi_manager_ops && hdmi_manager_ops->mode_fixup) 150 if (hdmi_ops && hdmi_ops->mode_fixup)
164 hdmi_manager_ops->mode_fixup(ctx->hdmi_ctx->ctx, connector, 151 hdmi_ops->mode_fixup(ctx->hdmi_ctx->ctx, connector, mode,
165 mode, adjusted_mode); 152 adjusted_mode);
166} 153}
167 154
168static void drm_hdmi_mode_set(struct device *subdrv_dev, void *mode) 155static void drm_hdmi_mode_set(struct device *subdrv_dev, void *mode)
@@ -171,8 +158,8 @@ static void drm_hdmi_mode_set(struct device *subdrv_dev, void *mode)
171 158
172 DRM_DEBUG_KMS("%s\n", __FILE__); 159 DRM_DEBUG_KMS("%s\n", __FILE__);
173 160
174 if (hdmi_manager_ops && hdmi_manager_ops->mode_set) 161 if (hdmi_ops && hdmi_ops->mode_set)
175 hdmi_manager_ops->mode_set(ctx->hdmi_ctx->ctx, mode); 162 hdmi_ops->mode_set(ctx->hdmi_ctx->ctx, mode);
176} 163}
177 164
178static void drm_hdmi_get_max_resol(struct device *subdrv_dev, 165static void drm_hdmi_get_max_resol(struct device *subdrv_dev,
@@ -182,9 +169,8 @@ static void drm_hdmi_get_max_resol(struct device *subdrv_dev,
182 169
183 DRM_DEBUG_KMS("%s\n", __FILE__); 170 DRM_DEBUG_KMS("%s\n", __FILE__);
184 171
185 if (hdmi_manager_ops && hdmi_manager_ops->get_max_resol) 172 if (hdmi_ops && hdmi_ops->get_max_resol)
186 hdmi_manager_ops->get_max_resol(ctx->hdmi_ctx->ctx, width, 173 hdmi_ops->get_max_resol(ctx->hdmi_ctx->ctx, width, height);
187 height);
188} 174}
189 175
190static void drm_hdmi_commit(struct device *subdrv_dev) 176static void drm_hdmi_commit(struct device *subdrv_dev)
@@ -193,8 +179,8 @@ static void drm_hdmi_commit(struct device *subdrv_dev)
193 179
194 DRM_DEBUG_KMS("%s\n", __FILE__); 180 DRM_DEBUG_KMS("%s\n", __FILE__);
195 181
196 if (hdmi_manager_ops && hdmi_manager_ops->commit) 182 if (hdmi_ops && hdmi_ops->commit)
197 hdmi_manager_ops->commit(ctx->hdmi_ctx->ctx); 183 hdmi_ops->commit(ctx->hdmi_ctx->ctx);
198} 184}
199 185
200static void drm_hdmi_dpms(struct device *subdrv_dev, int mode) 186static void drm_hdmi_dpms(struct device *subdrv_dev, int mode)
@@ -209,8 +195,8 @@ static void drm_hdmi_dpms(struct device *subdrv_dev, int mode)
209 case DRM_MODE_DPMS_STANDBY: 195 case DRM_MODE_DPMS_STANDBY:
210 case DRM_MODE_DPMS_SUSPEND: 196 case DRM_MODE_DPMS_SUSPEND:
211 case DRM_MODE_DPMS_OFF: 197 case DRM_MODE_DPMS_OFF:
212 if (hdmi_manager_ops && hdmi_manager_ops->disable) 198 if (hdmi_ops && hdmi_ops->disable)
213 hdmi_manager_ops->disable(ctx->hdmi_ctx->ctx); 199 hdmi_ops->disable(ctx->hdmi_ctx->ctx);
214 break; 200 break;
215 default: 201 default:
216 DRM_DEBUG_KMS("unkown dps mode: %d\n", mode); 202 DRM_DEBUG_KMS("unkown dps mode: %d\n", mode);
@@ -235,8 +221,8 @@ static void drm_mixer_mode_set(struct device *subdrv_dev,
235 221
236 DRM_DEBUG_KMS("%s\n", __FILE__); 222 DRM_DEBUG_KMS("%s\n", __FILE__);
237 223
238 if (hdmi_overlay_ops && hdmi_overlay_ops->win_mode_set) 224 if (mixer_ops && mixer_ops->win_mode_set)
239 hdmi_overlay_ops->win_mode_set(ctx->mixer_ctx->ctx, overlay); 225 mixer_ops->win_mode_set(ctx->mixer_ctx->ctx, overlay);
240} 226}
241 227
242static void drm_mixer_commit(struct device *subdrv_dev, int zpos) 228static void drm_mixer_commit(struct device *subdrv_dev, int zpos)
@@ -245,8 +231,8 @@ static void drm_mixer_commit(struct device *subdrv_dev, int zpos)
245 231
246 DRM_DEBUG_KMS("%s\n", __FILE__); 232 DRM_DEBUG_KMS("%s\n", __FILE__);
247 233
248 if (hdmi_overlay_ops && hdmi_overlay_ops->win_commit) 234 if (mixer_ops && mixer_ops->win_commit)
249 hdmi_overlay_ops->win_commit(ctx->mixer_ctx->ctx, zpos); 235 mixer_ops->win_commit(ctx->mixer_ctx->ctx, zpos);
250} 236}
251 237
252static void drm_mixer_disable(struct device *subdrv_dev, int zpos) 238static void drm_mixer_disable(struct device *subdrv_dev, int zpos)
@@ -255,8 +241,8 @@ static void drm_mixer_disable(struct device *subdrv_dev, int zpos)
255 241
256 DRM_DEBUG_KMS("%s\n", __FILE__); 242 DRM_DEBUG_KMS("%s\n", __FILE__);
257 243
258 if (hdmi_overlay_ops && hdmi_overlay_ops->win_disable) 244 if (mixer_ops && mixer_ops->win_disable)
259 hdmi_overlay_ops->win_disable(ctx->mixer_ctx->ctx, zpos); 245 mixer_ops->win_disable(ctx->mixer_ctx->ctx, zpos);
260} 246}
261 247
262static struct exynos_drm_overlay_ops drm_hdmi_overlay_ops = { 248static struct exynos_drm_overlay_ops drm_hdmi_overlay_ops = {
@@ -265,6 +251,12 @@ static struct exynos_drm_overlay_ops drm_hdmi_overlay_ops = {
265 .disable = drm_mixer_disable, 251 .disable = drm_mixer_disable,
266}; 252};
267 253
254static struct exynos_drm_manager hdmi_manager = {
255 .pipe = -1,
256 .ops = &drm_hdmi_manager_ops,
257 .overlay_ops = &drm_hdmi_overlay_ops,
258 .display_ops = &drm_hdmi_display_ops,
259};
268 260
269static int hdmi_subdrv_probe(struct drm_device *drm_dev, 261static int hdmi_subdrv_probe(struct drm_device *drm_dev,
270 struct device *dev) 262 struct device *dev)
@@ -332,12 +324,9 @@ static int __devinit exynos_drm_hdmi_probe(struct platform_device *pdev)
332 324
333 subdrv = &ctx->subdrv; 325 subdrv = &ctx->subdrv;
334 326
327 subdrv->dev = dev;
328 subdrv->manager = &hdmi_manager;
335 subdrv->probe = hdmi_subdrv_probe; 329 subdrv->probe = hdmi_subdrv_probe;
336 subdrv->manager.pipe = -1;
337 subdrv->manager.ops = &drm_hdmi_manager_ops;
338 subdrv->manager.overlay_ops = &drm_hdmi_overlay_ops;
339 subdrv->manager.display_ops = &drm_hdmi_display_ops;
340 subdrv->manager.dev = dev;
341 330
342 platform_set_drvdata(pdev, subdrv); 331 platform_set_drvdata(pdev, subdrv);
343 332
diff --git a/drivers/gpu/drm/exynos/exynos_drm_hdmi.h b/drivers/gpu/drm/exynos/exynos_drm_hdmi.h
index 44497cfb6c74..f3ae192c8dcf 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_hdmi.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_hdmi.h
@@ -38,15 +38,15 @@ struct exynos_drm_hdmi_context {
38 void *ctx; 38 void *ctx;
39}; 39};
40 40
41struct exynos_hdmi_display_ops { 41struct exynos_hdmi_ops {
42 /* display */
42 bool (*is_connected)(void *ctx); 43 bool (*is_connected)(void *ctx);
43 int (*get_edid)(void *ctx, struct drm_connector *connector, 44 int (*get_edid)(void *ctx, struct drm_connector *connector,
44 u8 *edid, int len); 45 u8 *edid, int len);
45 int (*check_timing)(void *ctx, void *timing); 46 int (*check_timing)(void *ctx, void *timing);
46 int (*power_on)(void *ctx, int mode); 47 int (*power_on)(void *ctx, int mode);
47};
48 48
49struct exynos_hdmi_manager_ops { 49 /* manager */
50 void (*mode_fixup)(void *ctx, struct drm_connector *connector, 50 void (*mode_fixup)(void *ctx, struct drm_connector *connector,
51 struct drm_display_mode *mode, 51 struct drm_display_mode *mode,
52 struct drm_display_mode *adjusted_mode); 52 struct drm_display_mode *adjusted_mode);
@@ -57,22 +57,17 @@ struct exynos_hdmi_manager_ops {
57 void (*disable)(void *ctx); 57 void (*disable)(void *ctx);
58}; 58};
59 59
60struct exynos_hdmi_overlay_ops { 60struct exynos_mixer_ops {
61 /* manager */
61 int (*enable_vblank)(void *ctx, int pipe); 62 int (*enable_vblank)(void *ctx, int pipe);
62 void (*disable_vblank)(void *ctx); 63 void (*disable_vblank)(void *ctx);
64
65 /* overlay */
63 void (*win_mode_set)(void *ctx, struct exynos_drm_overlay *overlay); 66 void (*win_mode_set)(void *ctx, struct exynos_drm_overlay *overlay);
64 void (*win_commit)(void *ctx, int zpos); 67 void (*win_commit)(void *ctx, int zpos);
65 void (*win_disable)(void *ctx, int zpos); 68 void (*win_disable)(void *ctx, int zpos);
66}; 69};
67 70
68extern struct platform_driver hdmi_driver; 71void exynos_hdmi_ops_register(struct exynos_hdmi_ops *ops);
69extern struct platform_driver mixer_driver; 72void exynos_mixer_ops_register(struct exynos_mixer_ops *ops);
70
71void exynos_drm_display_ops_register(struct exynos_hdmi_display_ops
72 *display_ops);
73void exynos_drm_manager_ops_register(struct exynos_hdmi_manager_ops
74 *manager_ops);
75void exynos_drm_overlay_ops_register(struct exynos_hdmi_overlay_ops
76 *overlay_ops);
77
78#endif 73#endif
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index c277a3a445f5..f92fe4c6174a 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -24,6 +24,10 @@ struct exynos_plane {
24 24
25static const uint32_t formats[] = { 25static const uint32_t formats[] = {
26 DRM_FORMAT_XRGB8888, 26 DRM_FORMAT_XRGB8888,
27 DRM_FORMAT_ARGB8888,
28 DRM_FORMAT_NV12,
29 DRM_FORMAT_NV12M,
30 DRM_FORMAT_NV12MT,
27}; 31};
28 32
29static int 33static int
diff --git a/drivers/gpu/drm/exynos/exynos_drm_vidi.c b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
index 8e1339f9fe1f..7b9c153dceb6 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_vidi.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_vidi.c
@@ -199,7 +199,7 @@ static void vidi_dpms(struct device *subdrv_dev, int mode)
199static void vidi_apply(struct device *subdrv_dev) 199static void vidi_apply(struct device *subdrv_dev)
200{ 200{
201 struct vidi_context *ctx = get_vidi_context(subdrv_dev); 201 struct vidi_context *ctx = get_vidi_context(subdrv_dev);
202 struct exynos_drm_manager *mgr = &ctx->subdrv.manager; 202 struct exynos_drm_manager *mgr = ctx->subdrv.manager;
203 struct exynos_drm_manager_ops *mgr_ops = mgr->ops; 203 struct exynos_drm_manager_ops *mgr_ops = mgr->ops;
204 struct exynos_drm_overlay_ops *ovl_ops = mgr->overlay_ops; 204 struct exynos_drm_overlay_ops *ovl_ops = mgr->overlay_ops;
205 struct vidi_win_data *win_data; 205 struct vidi_win_data *win_data;
@@ -374,6 +374,13 @@ static struct exynos_drm_overlay_ops vidi_overlay_ops = {
374 .disable = vidi_win_disable, 374 .disable = vidi_win_disable,
375}; 375};
376 376
377static struct exynos_drm_manager vidi_manager = {
378 .pipe = -1,
379 .ops = &vidi_manager_ops,
380 .overlay_ops = &vidi_overlay_ops,
381 .display_ops = &vidi_display_ops,
382};
383
377static void vidi_finish_pageflip(struct drm_device *drm_dev, int crtc) 384static void vidi_finish_pageflip(struct drm_device *drm_dev, int crtc)
378{ 385{
379 struct exynos_drm_private *dev_priv = drm_dev->dev_private; 386 struct exynos_drm_private *dev_priv = drm_dev->dev_private;
@@ -425,7 +432,7 @@ static void vidi_fake_vblank_handler(struct work_struct *work)
425 struct vidi_context *ctx = container_of(work, struct vidi_context, 432 struct vidi_context *ctx = container_of(work, struct vidi_context,
426 work); 433 work);
427 struct exynos_drm_subdrv *subdrv = &ctx->subdrv; 434 struct exynos_drm_subdrv *subdrv = &ctx->subdrv;
428 struct exynos_drm_manager *manager = &subdrv->manager; 435 struct exynos_drm_manager *manager = subdrv->manager;
429 436
430 if (manager->pipe < 0) 437 if (manager->pipe < 0)
431 return; 438 return;
@@ -471,7 +478,7 @@ static void vidi_subdrv_remove(struct drm_device *drm_dev)
471static int vidi_power_on(struct vidi_context *ctx, bool enable) 478static int vidi_power_on(struct vidi_context *ctx, bool enable)
472{ 479{
473 struct exynos_drm_subdrv *subdrv = &ctx->subdrv; 480 struct exynos_drm_subdrv *subdrv = &ctx->subdrv;
474 struct device *dev = subdrv->manager.dev; 481 struct device *dev = subdrv->dev;
475 482
476 DRM_DEBUG_KMS("%s\n", __FILE__); 483 DRM_DEBUG_KMS("%s\n", __FILE__);
477 484
@@ -611,13 +618,10 @@ static int __devinit vidi_probe(struct platform_device *pdev)
611 ctx->raw_edid = (struct edid *)fake_edid_info; 618 ctx->raw_edid = (struct edid *)fake_edid_info;
612 619
613 subdrv = &ctx->subdrv; 620 subdrv = &ctx->subdrv;
621 subdrv->dev = dev;
622 subdrv->manager = &vidi_manager;
614 subdrv->probe = vidi_subdrv_probe; 623 subdrv->probe = vidi_subdrv_probe;
615 subdrv->remove = vidi_subdrv_remove; 624 subdrv->remove = vidi_subdrv_remove;
616 subdrv->manager.pipe = -1;
617 subdrv->manager.ops = &vidi_manager_ops;
618 subdrv->manager.overlay_ops = &vidi_overlay_ops;
619 subdrv->manager.display_ops = &vidi_display_ops;
620 subdrv->manager.dev = dev;
621 625
622 mutex_init(&ctx->lock); 626 mutex_init(&ctx->lock);
623 627
diff --git a/drivers/gpu/drm/exynos/exynos_hdmi.c b/drivers/gpu/drm/exynos/exynos_hdmi.c
index 575a8cbd3533..b00353876458 100644
--- a/drivers/gpu/drm/exynos/exynos_hdmi.c
+++ b/drivers/gpu/drm/exynos/exynos_hdmi.c
@@ -40,7 +40,6 @@
40 40
41#include "exynos_hdmi.h" 41#include "exynos_hdmi.h"
42 42
43#define HDMI_OVERLAY_NUMBER 3
44#define MAX_WIDTH 1920 43#define MAX_WIDTH 1920
45#define MAX_HEIGHT 1080 44#define MAX_HEIGHT 1080
46#define get_hdmi_context(dev) platform_get_drvdata(to_platform_device(dev)) 45#define get_hdmi_context(dev) platform_get_drvdata(to_platform_device(dev))
@@ -1194,7 +1193,7 @@ static int hdmi_conf_index(struct hdmi_context *hdata,
1194 1193
1195static bool hdmi_is_connected(void *ctx) 1194static bool hdmi_is_connected(void *ctx)
1196{ 1195{
1197 struct hdmi_context *hdata = (struct hdmi_context *)ctx; 1196 struct hdmi_context *hdata = ctx;
1198 u32 val = hdmi_reg_read(hdata, HDMI_HPD_STATUS); 1197 u32 val = hdmi_reg_read(hdata, HDMI_HPD_STATUS);
1199 1198
1200 if (val) 1199 if (val)
@@ -1207,7 +1206,7 @@ static int hdmi_get_edid(void *ctx, struct drm_connector *connector,
1207 u8 *edid, int len) 1206 u8 *edid, int len)
1208{ 1207{
1209 struct edid *raw_edid; 1208 struct edid *raw_edid;
1210 struct hdmi_context *hdata = (struct hdmi_context *)ctx; 1209 struct hdmi_context *hdata = ctx;
1211 1210
1212 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 1211 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
1213 1212
@@ -1275,7 +1274,7 @@ static int hdmi_v14_check_timing(struct fb_videomode *check_timing)
1275 1274
1276static int hdmi_check_timing(void *ctx, void *timing) 1275static int hdmi_check_timing(void *ctx, void *timing)
1277{ 1276{
1278 struct hdmi_context *hdata = (struct hdmi_context *)ctx; 1277 struct hdmi_context *hdata = ctx;
1279 struct fb_videomode *check_timing = timing; 1278 struct fb_videomode *check_timing = timing;
1280 1279
1281 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 1280 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
@@ -1312,13 +1311,6 @@ static int hdmi_display_power_on(void *ctx, int mode)
1312 return 0; 1311 return 0;
1313} 1312}
1314 1313
1315static struct exynos_hdmi_display_ops display_ops = {
1316 .is_connected = hdmi_is_connected,
1317 .get_edid = hdmi_get_edid,
1318 .check_timing = hdmi_check_timing,
1319 .power_on = hdmi_display_power_on,
1320};
1321
1322static void hdmi_set_acr(u32 freq, u8 *acr) 1314static void hdmi_set_acr(u32 freq, u8 *acr)
1323{ 1315{
1324 u32 n, cts; 1316 u32 n, cts;
@@ -1914,7 +1906,7 @@ static void hdmi_mode_fixup(void *ctx, struct drm_connector *connector,
1914 struct drm_display_mode *adjusted_mode) 1906 struct drm_display_mode *adjusted_mode)
1915{ 1907{
1916 struct drm_display_mode *m; 1908 struct drm_display_mode *m;
1917 struct hdmi_context *hdata = (struct hdmi_context *)ctx; 1909 struct hdmi_context *hdata = ctx;
1918 int index; 1910 int index;
1919 1911
1920 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 1912 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
@@ -1951,7 +1943,7 @@ static void hdmi_mode_fixup(void *ctx, struct drm_connector *connector,
1951 1943
1952static void hdmi_mode_set(void *ctx, void *mode) 1944static void hdmi_mode_set(void *ctx, void *mode)
1953{ 1945{
1954 struct hdmi_context *hdata = (struct hdmi_context *)ctx; 1946 struct hdmi_context *hdata = ctx;
1955 int conf_idx; 1947 int conf_idx;
1956 1948
1957 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 1949 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
@@ -1974,7 +1966,7 @@ static void hdmi_get_max_resol(void *ctx, unsigned int *width,
1974 1966
1975static void hdmi_commit(void *ctx) 1967static void hdmi_commit(void *ctx)
1976{ 1968{
1977 struct hdmi_context *hdata = (struct hdmi_context *)ctx; 1969 struct hdmi_context *hdata = ctx;
1978 1970
1979 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 1971 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
1980 1972
@@ -1985,7 +1977,7 @@ static void hdmi_commit(void *ctx)
1985 1977
1986static void hdmi_disable(void *ctx) 1978static void hdmi_disable(void *ctx)
1987{ 1979{
1988 struct hdmi_context *hdata = (struct hdmi_context *)ctx; 1980 struct hdmi_context *hdata = ctx;
1989 1981
1990 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 1982 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
1991 1983
@@ -1996,7 +1988,14 @@ static void hdmi_disable(void *ctx)
1996 } 1988 }
1997} 1989}
1998 1990
1999static struct exynos_hdmi_manager_ops manager_ops = { 1991static struct exynos_hdmi_ops hdmi_ops = {
1992 /* display */
1993 .is_connected = hdmi_is_connected,
1994 .get_edid = hdmi_get_edid,
1995 .check_timing = hdmi_check_timing,
1996 .power_on = hdmi_display_power_on,
1997
1998 /* manager */
2000 .mode_fixup = hdmi_mode_fixup, 1999 .mode_fixup = hdmi_mode_fixup,
2001 .mode_set = hdmi_mode_set, 2000 .mode_set = hdmi_mode_set,
2002 .get_max_resol = hdmi_get_max_resol, 2001 .get_max_resol = hdmi_get_max_resol,
@@ -2020,7 +2019,7 @@ static void hdmi_hotplug_func(struct work_struct *work)
2020static irqreturn_t hdmi_irq_handler(int irq, void *arg) 2019static irqreturn_t hdmi_irq_handler(int irq, void *arg)
2021{ 2020{
2022 struct exynos_drm_hdmi_context *ctx = arg; 2021 struct exynos_drm_hdmi_context *ctx = arg;
2023 struct hdmi_context *hdata = (struct hdmi_context *)ctx->ctx; 2022 struct hdmi_context *hdata = ctx->ctx;
2024 u32 intc_flag; 2023 u32 intc_flag;
2025 2024
2026 intc_flag = hdmi_reg_read(hdata, HDMI_INTC_FLAG); 2025 intc_flag = hdmi_reg_read(hdata, HDMI_INTC_FLAG);
@@ -2173,7 +2172,7 @@ static int hdmi_runtime_suspend(struct device *dev)
2173 2172
2174 DRM_DEBUG_KMS("%s\n", __func__); 2173 DRM_DEBUG_KMS("%s\n", __func__);
2175 2174
2176 hdmi_resource_poweroff((struct hdmi_context *)ctx->ctx); 2175 hdmi_resource_poweroff(ctx->ctx);
2177 2176
2178 return 0; 2177 return 0;
2179} 2178}
@@ -2184,7 +2183,7 @@ static int hdmi_runtime_resume(struct device *dev)
2184 2183
2185 DRM_DEBUG_KMS("%s\n", __func__); 2184 DRM_DEBUG_KMS("%s\n", __func__);
2186 2185
2187 hdmi_resource_poweron((struct hdmi_context *)ctx->ctx); 2186 hdmi_resource_poweron(ctx->ctx);
2188 2187
2189 return 0; 2188 return 0;
2190} 2189}
@@ -2322,8 +2321,7 @@ static int __devinit hdmi_probe(struct platform_device *pdev)
2322 hdata->irq = res->start; 2321 hdata->irq = res->start;
2323 2322
2324 /* register specific callbacks to common hdmi. */ 2323 /* register specific callbacks to common hdmi. */
2325 exynos_drm_display_ops_register(&display_ops); 2324 exynos_hdmi_ops_register(&hdmi_ops);
2326 exynos_drm_manager_ops_register(&manager_ops);
2327 2325
2328 hdmi_resource_poweron(hdata); 2326 hdmi_resource_poweron(hdata);
2329 2327
@@ -2351,7 +2349,7 @@ err_data:
2351static int __devexit hdmi_remove(struct platform_device *pdev) 2349static int __devexit hdmi_remove(struct platform_device *pdev)
2352{ 2350{
2353 struct exynos_drm_hdmi_context *ctx = platform_get_drvdata(pdev); 2351 struct exynos_drm_hdmi_context *ctx = platform_get_drvdata(pdev);
2354 struct hdmi_context *hdata = (struct hdmi_context *)ctx->ctx; 2352 struct hdmi_context *hdata = ctx->ctx;
2355 2353
2356 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__); 2354 DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
2357 2355
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index 4d5f41e19527..e15438c01129 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -37,7 +37,8 @@
37#include "exynos_drm_drv.h" 37#include "exynos_drm_drv.h"
38#include "exynos_drm_hdmi.h" 38#include "exynos_drm_hdmi.h"
39 39
40#define HDMI_OVERLAY_NUMBER 3 40#define MIXER_WIN_NR 3
41#define MIXER_DEFAULT_WIN 0
41 42
42#define get_mixer_context(dev) platform_get_drvdata(to_platform_device(dev)) 43#define get_mixer_context(dev) platform_get_drvdata(to_platform_device(dev))
43 44
@@ -75,16 +76,12 @@ struct mixer_resources {
75}; 76};
76 77
77struct mixer_context { 78struct mixer_context {
78 struct fb_videomode *default_timing;
79 unsigned int default_win;
80 unsigned int default_bpp;
81 unsigned int irq; 79 unsigned int irq;
82 int pipe; 80 int pipe;
83 bool interlace; 81 bool interlace;
84 bool vp_enabled;
85 82
86 struct mixer_resources mixer_res; 83 struct mixer_resources mixer_res;
87 struct hdmi_win_data win_data[HDMI_OVERLAY_NUMBER]; 84 struct hdmi_win_data win_data[MIXER_WIN_NR];
88}; 85};
89 86
90static const u8 filter_y_horiz_tap8[] = { 87static const u8 filter_y_horiz_tap8[] = {
@@ -643,9 +640,9 @@ static void mixer_win_mode_set(void *ctx,
643 640
644 win = overlay->zpos; 641 win = overlay->zpos;
645 if (win == DEFAULT_ZPOS) 642 if (win == DEFAULT_ZPOS)
646 win = mixer_ctx->default_win; 643 win = MIXER_DEFAULT_WIN;
647 644
648 if (win < 0 || win > HDMI_OVERLAY_NUMBER) { 645 if (win < 0 || win > MIXER_WIN_NR) {
649 DRM_ERROR("overlay plane[%d] is wrong\n", win); 646 DRM_ERROR("overlay plane[%d] is wrong\n", win);
650 return; 647 return;
651 } 648 }
@@ -683,9 +680,9 @@ static void mixer_win_commit(void *ctx, int zpos)
683 DRM_DEBUG_KMS("[%d] %s, win: %d\n", __LINE__, __func__, win); 680 DRM_DEBUG_KMS("[%d] %s, win: %d\n", __LINE__, __func__, win);
684 681
685 if (win == DEFAULT_ZPOS) 682 if (win == DEFAULT_ZPOS)
686 win = mixer_ctx->default_win; 683 win = MIXER_DEFAULT_WIN;
687 684
688 if (win < 0 || win > HDMI_OVERLAY_NUMBER) { 685 if (win < 0 || win > MIXER_WIN_NR) {
689 DRM_ERROR("overlay plane[%d] is wrong\n", win); 686 DRM_ERROR("overlay plane[%d] is wrong\n", win);
690 return; 687 return;
691 } 688 }
@@ -706,9 +703,9 @@ static void mixer_win_disable(void *ctx, int zpos)
706 DRM_DEBUG_KMS("[%d] %s, win: %d\n", __LINE__, __func__, win); 703 DRM_DEBUG_KMS("[%d] %s, win: %d\n", __LINE__, __func__, win);
707 704
708 if (win == DEFAULT_ZPOS) 705 if (win == DEFAULT_ZPOS)
709 win = mixer_ctx->default_win; 706 win = MIXER_DEFAULT_WIN;
710 707
711 if (win < 0 || win > HDMI_OVERLAY_NUMBER) { 708 if (win < 0 || win > MIXER_WIN_NR) {
712 DRM_ERROR("overlay plane[%d] is wrong\n", win); 709 DRM_ERROR("overlay plane[%d] is wrong\n", win);
713 return; 710 return;
714 } 711 }
@@ -722,9 +719,12 @@ static void mixer_win_disable(void *ctx, int zpos)
722 spin_unlock_irqrestore(&res->reg_slock, flags); 719 spin_unlock_irqrestore(&res->reg_slock, flags);
723} 720}
724 721
725static struct exynos_hdmi_overlay_ops overlay_ops = { 722static struct exynos_mixer_ops mixer_ops = {
723 /* manager */
726 .enable_vblank = mixer_enable_vblank, 724 .enable_vblank = mixer_enable_vblank,
727 .disable_vblank = mixer_disable_vblank, 725 .disable_vblank = mixer_disable_vblank,
726
727 /* overlay */
728 .win_mode_set = mixer_win_mode_set, 728 .win_mode_set = mixer_win_mode_set,
729 .win_commit = mixer_win_commit, 729 .win_commit = mixer_win_commit,
730 .win_disable = mixer_win_disable, 730 .win_disable = mixer_win_disable,
@@ -771,8 +771,7 @@ static void mixer_finish_pageflip(struct drm_device *drm_dev, int crtc)
771static irqreturn_t mixer_irq_handler(int irq, void *arg) 771static irqreturn_t mixer_irq_handler(int irq, void *arg)
772{ 772{
773 struct exynos_drm_hdmi_context *drm_hdmi_ctx = arg; 773 struct exynos_drm_hdmi_context *drm_hdmi_ctx = arg;
774 struct mixer_context *ctx = 774 struct mixer_context *ctx = drm_hdmi_ctx->ctx;
775 (struct mixer_context *)drm_hdmi_ctx->ctx;
776 struct mixer_resources *res = &ctx->mixer_res; 775 struct mixer_resources *res = &ctx->mixer_res;
777 u32 val, val_base; 776 u32 val, val_base;
778 777
@@ -902,7 +901,7 @@ static int mixer_runtime_resume(struct device *dev)
902 901
903 DRM_DEBUG_KMS("resume - start\n"); 902 DRM_DEBUG_KMS("resume - start\n");
904 903
905 mixer_resource_poweron((struct mixer_context *)ctx->ctx); 904 mixer_resource_poweron(ctx->ctx);
906 905
907 return 0; 906 return 0;
908} 907}
@@ -913,7 +912,7 @@ static int mixer_runtime_suspend(struct device *dev)
913 912
914 DRM_DEBUG_KMS("suspend - start\n"); 913 DRM_DEBUG_KMS("suspend - start\n");
915 914
916 mixer_resource_poweroff((struct mixer_context *)ctx->ctx); 915 mixer_resource_poweroff(ctx->ctx);
917 916
918 return 0; 917 return 0;
919} 918}
@@ -926,8 +925,7 @@ static const struct dev_pm_ops mixer_pm_ops = {
926static int __devinit mixer_resources_init(struct exynos_drm_hdmi_context *ctx, 925static int __devinit mixer_resources_init(struct exynos_drm_hdmi_context *ctx,
927 struct platform_device *pdev) 926 struct platform_device *pdev)
928{ 927{
929 struct mixer_context *mixer_ctx = 928 struct mixer_context *mixer_ctx = ctx->ctx;
930 (struct mixer_context *)ctx->ctx;
931 struct device *dev = &pdev->dev; 929 struct device *dev = &pdev->dev;
932 struct mixer_resources *mixer_res = &mixer_ctx->mixer_res; 930 struct mixer_resources *mixer_res = &mixer_ctx->mixer_res;
933 struct resource *res; 931 struct resource *res;
@@ -1076,7 +1074,7 @@ static int __devinit mixer_probe(struct platform_device *pdev)
1076 goto fail; 1074 goto fail;
1077 1075
1078 /* register specific callback point to common hdmi. */ 1076 /* register specific callback point to common hdmi. */
1079 exynos_drm_overlay_ops_register(&overlay_ops); 1077 exynos_mixer_ops_register(&mixer_ops);
1080 1078
1081 mixer_resource_poweron(ctx); 1079 mixer_resource_poweron(ctx);
1082 1080
@@ -1093,7 +1091,7 @@ static int mixer_remove(struct platform_device *pdev)
1093 struct device *dev = &pdev->dev; 1091 struct device *dev = &pdev->dev;
1094 struct exynos_drm_hdmi_context *drm_hdmi_ctx = 1092 struct exynos_drm_hdmi_context *drm_hdmi_ctx =
1095 platform_get_drvdata(pdev); 1093 platform_get_drvdata(pdev);
1096 struct mixer_context *ctx = (struct mixer_context *)drm_hdmi_ctx->ctx; 1094 struct mixer_context *ctx = drm_hdmi_ctx->ctx;
1097 1095
1098 dev_info(dev, "remove successful\n"); 1096 dev_info(dev, "remove successful\n");
1099 1097
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index ccfdc813171d..3effcf71e1b1 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -64,7 +64,7 @@ MODULE_PARM_DESC(semaphores,
64 "Use semaphores for inter-ring sync (default: -1 (use per-chip defaults))"); 64 "Use semaphores for inter-ring sync (default: -1 (use per-chip defaults))");
65 65
66int i915_enable_rc6 __read_mostly = -1; 66int i915_enable_rc6 __read_mostly = -1;
67module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600); 67module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0400);
68MODULE_PARM_DESC(i915_enable_rc6, 68MODULE_PARM_DESC(i915_enable_rc6,
69 "Enable power-saving render C-state 6. " 69 "Enable power-saving render C-state 6. "
70 "Different stages can be selected via bitmask values " 70 "Different stages can be selected via bitmask values "
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 9415c07b6285..ac8bc1df7c8f 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1416,6 +1416,7 @@ i915_gem_object_move_off_active(struct drm_i915_gem_object *obj)
1416{ 1416{
1417 list_del_init(&obj->ring_list); 1417 list_del_init(&obj->ring_list);
1418 obj->last_rendering_seqno = 0; 1418 obj->last_rendering_seqno = 0;
1419 obj->last_fenced_seqno = 0;
1419} 1420}
1420 1421
1421static void 1422static void
@@ -1444,6 +1445,7 @@ i915_gem_object_move_to_inactive(struct drm_i915_gem_object *obj)
1444 BUG_ON(!list_empty(&obj->gpu_write_list)); 1445 BUG_ON(!list_empty(&obj->gpu_write_list));
1445 BUG_ON(!obj->active); 1446 BUG_ON(!obj->active);
1446 obj->ring = NULL; 1447 obj->ring = NULL;
1448 obj->last_fenced_ring = NULL;
1447 1449
1448 i915_gem_object_move_off_active(obj); 1450 i915_gem_object_move_off_active(obj);
1449 obj->fenced_gpu_access = false; 1451 obj->fenced_gpu_access = false;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 972321fda4d8..3f7fc4629363 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3891,6 +3891,9 @@
3891#define GT_FIFO_FREE_ENTRIES 0x120008 3891#define GT_FIFO_FREE_ENTRIES 0x120008
3892#define GT_FIFO_NUM_RESERVED_ENTRIES 20 3892#define GT_FIFO_NUM_RESERVED_ENTRIES 20
3893 3893
3894#define GEN6_UCGCTL1 0x9400
3895# define GEN6_BLBUNIT_CLOCK_GATE_DISABLE (1 << 5)
3896
3894#define GEN6_UCGCTL2 0x9404 3897#define GEN6_UCGCTL2 0x9404
3895# define GEN6_RCZUNIT_CLOCK_GATE_DISABLE (1 << 13) 3898# define GEN6_RCZUNIT_CLOCK_GATE_DISABLE (1 << 13)
3896# define GEN6_RCPBUNIT_CLOCK_GATE_DISABLE (1 << 12) 3899# define GEN6_RCPBUNIT_CLOCK_GATE_DISABLE (1 << 12)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index fdf8c9f5cd6b..2d0dc27323c1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2344,6 +2344,33 @@ intel_pipe_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb,
2344} 2344}
2345 2345
2346static int 2346static int
2347intel_finish_fb(struct drm_framebuffer *old_fb)
2348{
2349 struct drm_i915_gem_object *obj = to_intel_framebuffer(old_fb)->obj;
2350 struct drm_i915_private *dev_priv = obj->base.dev->dev_private;
2351 bool was_interruptible = dev_priv->mm.interruptible;
2352 int ret;
2353
2354 wait_event(dev_priv->pending_flip_queue,
2355 atomic_read(&dev_priv->mm.wedged) ||
2356 atomic_read(&obj->pending_flip) == 0);
2357
2358 /* Big Hammer, we also need to ensure that any pending
2359 * MI_WAIT_FOR_EVENT inside a user batch buffer on the
2360 * current scanout is retired before unpinning the old
2361 * framebuffer.
2362 *
2363 * This should only fail upon a hung GPU, in which case we
2364 * can safely continue.
2365 */
2366 dev_priv->mm.interruptible = false;
2367 ret = i915_gem_object_finish_gpu(obj);
2368 dev_priv->mm.interruptible = was_interruptible;
2369
2370 return ret;
2371}
2372
2373static int
2347intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, 2374intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
2348 struct drm_framebuffer *old_fb) 2375 struct drm_framebuffer *old_fb)
2349{ 2376{
@@ -2381,25 +2408,8 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
2381 return ret; 2408 return ret;
2382 } 2409 }
2383 2410
2384 if (old_fb) { 2411 if (old_fb)
2385 struct drm_i915_private *dev_priv = dev->dev_private; 2412 intel_finish_fb(old_fb);
2386 struct drm_i915_gem_object *obj = to_intel_framebuffer(old_fb)->obj;
2387
2388 wait_event(dev_priv->pending_flip_queue,
2389 atomic_read(&dev_priv->mm.wedged) ||
2390 atomic_read(&obj->pending_flip) == 0);
2391
2392 /* Big Hammer, we also need to ensure that any pending
2393 * MI_WAIT_FOR_EVENT inside a user batch buffer on the
2394 * current scanout is retired before unpinning the old
2395 * framebuffer.
2396 *
2397 * This should only fail upon a hung GPU, in which case we
2398 * can safely continue.
2399 */
2400 ret = i915_gem_object_finish_gpu(obj);
2401 (void) ret;
2402 }
2403 2413
2404 ret = intel_pipe_set_base_atomic(crtc, crtc->fb, x, y, 2414 ret = intel_pipe_set_base_atomic(crtc, crtc->fb, x, y,
2405 LEAVE_ATOMIC_MODE_SET); 2415 LEAVE_ATOMIC_MODE_SET);
@@ -3478,6 +3488,23 @@ static void intel_crtc_disable(struct drm_crtc *crtc)
3478 struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private; 3488 struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
3479 struct drm_device *dev = crtc->dev; 3489 struct drm_device *dev = crtc->dev;
3480 3490
3491 /* Flush any pending WAITs before we disable the pipe. Note that
3492 * we need to drop the struct_mutex in order to acquire it again
3493 * during the lowlevel dpms routines around a couple of the
3494 * operations. It does not look trivial nor desirable to move
3495 * that locking higher. So instead we leave a window for the
3496 * submission of further commands on the fb before we can actually
3497 * disable it. This race with userspace exists anyway, and we can
3498 * only rely on the pipe being disabled by userspace after it
3499 * receives the hotplug notification and has flushed any pending
3500 * batches.
3501 */
3502 if (crtc->fb) {
3503 mutex_lock(&dev->struct_mutex);
3504 intel_finish_fb(crtc->fb);
3505 mutex_unlock(&dev->struct_mutex);
3506 }
3507
3481 crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF); 3508 crtc_funcs->dpms(crtc, DRM_MODE_DPMS_OFF);
3482 assert_plane_disabled(dev->dev_private, to_intel_crtc(crtc)->plane); 3509 assert_plane_disabled(dev->dev_private, to_intel_crtc(crtc)->plane);
3483 assert_pipe_disabled(dev->dev_private, to_intel_crtc(crtc)->pipe); 3510 assert_pipe_disabled(dev->dev_private, to_intel_crtc(crtc)->pipe);
@@ -8851,6 +8878,10 @@ static void gen6_init_clock_gating(struct drm_device *dev)
8851 I915_WRITE(WM2_LP_ILK, 0); 8878 I915_WRITE(WM2_LP_ILK, 0);
8852 I915_WRITE(WM1_LP_ILK, 0); 8879 I915_WRITE(WM1_LP_ILK, 0);
8853 8880
8881 I915_WRITE(GEN6_UCGCTL1,
8882 I915_READ(GEN6_UCGCTL1) |
8883 GEN6_BLBUNIT_CLOCK_GATE_DISABLE);
8884
8854 /* According to the BSpec vol1g, bit 12 (RCPBUNIT) clock 8885 /* According to the BSpec vol1g, bit 12 (RCPBUNIT) clock
8855 * gating disable must be set. Failure to set it results in 8886 * gating disable must be set. Failure to set it results in
8856 * flickering pixels due to Z write ordering failures after 8887 * flickering pixels due to Z write ordering failures after
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 38d097db696f..44cf32c8bcbf 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -219,14 +219,38 @@ intel_dp_max_data_rate(int max_link_clock, int max_lanes)
219 return (max_link_clock * max_lanes * 8) / 10; 219 return (max_link_clock * max_lanes * 8) / 10;
220} 220}
221 221
222static bool
223intel_dp_adjust_dithering(struct intel_dp *intel_dp,
224 struct drm_display_mode *mode,
225 struct drm_display_mode *adjusted_mode)
226{
227 int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_dp));
228 int max_lanes = intel_dp_max_lane_count(intel_dp);
229 int max_rate, mode_rate;
230
231 mode_rate = intel_dp_link_required(mode->clock, 24);
232 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
233
234 if (mode_rate > max_rate) {
235 mode_rate = intel_dp_link_required(mode->clock, 18);
236 if (mode_rate > max_rate)
237 return false;
238
239 if (adjusted_mode)
240 adjusted_mode->private_flags
241 |= INTEL_MODE_DP_FORCE_6BPC;
242
243 return true;
244 }
245
246 return true;
247}
248
222static int 249static int
223intel_dp_mode_valid(struct drm_connector *connector, 250intel_dp_mode_valid(struct drm_connector *connector,
224 struct drm_display_mode *mode) 251 struct drm_display_mode *mode)
225{ 252{
226 struct intel_dp *intel_dp = intel_attached_dp(connector); 253 struct intel_dp *intel_dp = intel_attached_dp(connector);
227 int max_link_clock = intel_dp_link_clock(intel_dp_max_link_bw(intel_dp));
228 int max_lanes = intel_dp_max_lane_count(intel_dp);
229 int max_rate, mode_rate;
230 254
231 if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) { 255 if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) {
232 if (mode->hdisplay > intel_dp->panel_fixed_mode->hdisplay) 256 if (mode->hdisplay > intel_dp->panel_fixed_mode->hdisplay)
@@ -236,16 +260,8 @@ intel_dp_mode_valid(struct drm_connector *connector,
236 return MODE_PANEL; 260 return MODE_PANEL;
237 } 261 }
238 262
239 mode_rate = intel_dp_link_required(mode->clock, 24); 263 if (!intel_dp_adjust_dithering(intel_dp, mode, NULL))
240 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes); 264 return MODE_CLOCK_HIGH;
241
242 if (mode_rate > max_rate) {
243 mode_rate = intel_dp_link_required(mode->clock, 18);
244 if (mode_rate > max_rate)
245 return MODE_CLOCK_HIGH;
246 else
247 mode->private_flags |= INTEL_MODE_DP_FORCE_6BPC;
248 }
249 265
250 if (mode->clock < 10000) 266 if (mode->clock < 10000)
251 return MODE_CLOCK_LOW; 267 return MODE_CLOCK_LOW;
@@ -672,7 +688,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
672 int lane_count, clock; 688 int lane_count, clock;
673 int max_lane_count = intel_dp_max_lane_count(intel_dp); 689 int max_lane_count = intel_dp_max_lane_count(intel_dp);
674 int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0; 690 int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0;
675 int bpp = mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24; 691 int bpp;
676 static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; 692 static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 };
677 693
678 if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) { 694 if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) {
@@ -686,6 +702,11 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
686 mode->clock = intel_dp->panel_fixed_mode->clock; 702 mode->clock = intel_dp->panel_fixed_mode->clock;
687 } 703 }
688 704
705 if (!intel_dp_adjust_dithering(intel_dp, mode, adjusted_mode))
706 return false;
707
708 bpp = adjusted_mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24;
709
689 for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) { 710 for (lane_count = 1; lane_count <= max_lane_count; lane_count <<= 1) {
690 for (clock = 0; clock <= max_clock; clock++) { 711 for (clock = 0; clock <= max_clock; clock++) {
691 int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count); 712 int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 6c144574a5b7..9d4e5f06edc3 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -948,7 +948,7 @@ int intel_init_ring_buffer(struct drm_device *dev,
948 * of the buffer. 948 * of the buffer.
949 */ 949 */
950 ring->effective_size = ring->size; 950 ring->effective_size = ring->size;
951 if (IS_I830(ring->dev)) 951 if (IS_I830(ring->dev) || IS_845G(ring->dev))
952 ring->effective_size -= 128; 952 ring->effective_size -= 128;
953 953
954 return 0; 954 return 0;
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index 749d04356306..987800a0234f 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -95,7 +95,6 @@ ivb_update_plane(struct drm_plane *plane, struct drm_framebuffer *fb,
95 /* must disable */ 95 /* must disable */
96 sprctl |= SPRITE_TRICKLE_FEED_DISABLE; 96 sprctl |= SPRITE_TRICKLE_FEED_DISABLE;
97 sprctl |= SPRITE_ENABLE; 97 sprctl |= SPRITE_ENABLE;
98 sprctl |= SPRITE_DEST_KEY;
99 98
100 /* Sizes are 0 based */ 99 /* Sizes are 0 based */
101 src_w--; 100 src_w--;
diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c
index e607c4d7dd98..2d39f9977e00 100644
--- a/drivers/gpu/drm/radeon/atombios_encoders.c
+++ b/drivers/gpu/drm/radeon/atombios_encoders.c
@@ -230,6 +230,10 @@ atombios_dvo_setup(struct drm_encoder *encoder, int action)
230 if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) 230 if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev))
231 return; 231 return;
232 232
233 /* some R4xx chips have the wrong frev */
234 if (rdev->family <= CHIP_RV410)
235 frev = 1;
236
233 switch (frev) { 237 switch (frev) {
234 case 1: 238 case 1:
235 switch (crev) { 239 switch (crev) {
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index e11df778e194..cb1141854282 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -2557,7 +2557,7 @@ static void r100_pll_errata_after_data(struct radeon_device *rdev)
2557 * or the chip could hang on a subsequent access 2557 * or the chip could hang on a subsequent access
2558 */ 2558 */
2559 if (rdev->pll_errata & CHIP_ERRATA_PLL_DELAY) { 2559 if (rdev->pll_errata & CHIP_ERRATA_PLL_DELAY) {
2560 udelay(5000); 2560 mdelay(5);
2561 } 2561 }
2562 2562
2563 /* This function is required to workaround a hardware bug in some (all?) 2563 /* This function is required to workaround a hardware bug in some (all?)
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 4added1c7ee9..5b9b81c69b66 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2839,7 +2839,7 @@ void r600_rlc_stop(struct radeon_device *rdev)
2839 /* r7xx asics need to soft reset RLC before halting */ 2839 /* r7xx asics need to soft reset RLC before halting */
2840 WREG32(SRBM_SOFT_RESET, SOFT_RESET_RLC); 2840 WREG32(SRBM_SOFT_RESET, SOFT_RESET_RLC);
2841 RREG32(SRBM_SOFT_RESET); 2841 RREG32(SRBM_SOFT_RESET);
2842 udelay(15000); 2842 mdelay(15);
2843 WREG32(SRBM_SOFT_RESET, 0); 2843 WREG32(SRBM_SOFT_RESET, 0);
2844 RREG32(SRBM_SOFT_RESET); 2844 RREG32(SRBM_SOFT_RESET);
2845 } 2845 }
diff --git a/drivers/gpu/drm/radeon/r600_cp.c b/drivers/gpu/drm/radeon/r600_cp.c
index 84c546250955..75ed17c96115 100644
--- a/drivers/gpu/drm/radeon/r600_cp.c
+++ b/drivers/gpu/drm/radeon/r600_cp.c
@@ -407,7 +407,7 @@ static void r600_cp_load_microcode(drm_radeon_private_t *dev_priv)
407 407
408 RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP); 408 RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP);
409 RADEON_READ(R600_GRBM_SOFT_RESET); 409 RADEON_READ(R600_GRBM_SOFT_RESET);
410 DRM_UDELAY(15000); 410 mdelay(15);
411 RADEON_WRITE(R600_GRBM_SOFT_RESET, 0); 411 RADEON_WRITE(R600_GRBM_SOFT_RESET, 0);
412 412
413 fw_data = (const __be32 *)dev_priv->me_fw->data; 413 fw_data = (const __be32 *)dev_priv->me_fw->data;
@@ -500,7 +500,7 @@ static void r700_cp_load_microcode(drm_radeon_private_t *dev_priv)
500 500
501 RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP); 501 RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP);
502 RADEON_READ(R600_GRBM_SOFT_RESET); 502 RADEON_READ(R600_GRBM_SOFT_RESET);
503 DRM_UDELAY(15000); 503 mdelay(15);
504 RADEON_WRITE(R600_GRBM_SOFT_RESET, 0); 504 RADEON_WRITE(R600_GRBM_SOFT_RESET, 0);
505 505
506 fw_data = (const __be32 *)dev_priv->pfp_fw->data; 506 fw_data = (const __be32 *)dev_priv->pfp_fw->data;
@@ -1797,7 +1797,7 @@ static void r600_cp_init_ring_buffer(struct drm_device *dev,
1797 1797
1798 RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP); 1798 RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP);
1799 RADEON_READ(R600_GRBM_SOFT_RESET); 1799 RADEON_READ(R600_GRBM_SOFT_RESET);
1800 DRM_UDELAY(15000); 1800 mdelay(15);
1801 RADEON_WRITE(R600_GRBM_SOFT_RESET, 0); 1801 RADEON_WRITE(R600_GRBM_SOFT_RESET, 0);
1802 1802
1803 1803
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c
index 6ae0c75f016a..9c6b29a41927 100644
--- a/drivers/gpu/drm/radeon/radeon_clocks.c
+++ b/drivers/gpu/drm/radeon/radeon_clocks.c
@@ -633,7 +633,7 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable)
633 tmp &= ~(R300_SCLK_FORCE_VAP); 633 tmp &= ~(R300_SCLK_FORCE_VAP);
634 tmp |= RADEON_SCLK_FORCE_CP; 634 tmp |= RADEON_SCLK_FORCE_CP;
635 WREG32_PLL(RADEON_SCLK_CNTL, tmp); 635 WREG32_PLL(RADEON_SCLK_CNTL, tmp);
636 udelay(15000); 636 mdelay(15);
637 637
638 tmp = RREG32_PLL(R300_SCLK_CNTL2); 638 tmp = RREG32_PLL(R300_SCLK_CNTL2);
639 tmp &= ~(R300_SCLK_FORCE_TCL | 639 tmp &= ~(R300_SCLK_FORCE_TCL |
@@ -651,12 +651,12 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable)
651 tmp |= (RADEON_ENGIN_DYNCLK_MODE | 651 tmp |= (RADEON_ENGIN_DYNCLK_MODE |
652 (0x01 << RADEON_ACTIVE_HILO_LAT_SHIFT)); 652 (0x01 << RADEON_ACTIVE_HILO_LAT_SHIFT));
653 WREG32_PLL(RADEON_CLK_PWRMGT_CNTL, tmp); 653 WREG32_PLL(RADEON_CLK_PWRMGT_CNTL, tmp);
654 udelay(15000); 654 mdelay(15);
655 655
656 tmp = RREG32_PLL(RADEON_CLK_PIN_CNTL); 656 tmp = RREG32_PLL(RADEON_CLK_PIN_CNTL);
657 tmp |= RADEON_SCLK_DYN_START_CNTL; 657 tmp |= RADEON_SCLK_DYN_START_CNTL;
658 WREG32_PLL(RADEON_CLK_PIN_CNTL, tmp); 658 WREG32_PLL(RADEON_CLK_PIN_CNTL, tmp);
659 udelay(15000); 659 mdelay(15);
660 660
661 /* When DRI is enabled, setting DYN_STOP_LAT to zero can cause some R200 661 /* When DRI is enabled, setting DYN_STOP_LAT to zero can cause some R200
662 to lockup randomly, leave them as set by BIOS. 662 to lockup randomly, leave them as set by BIOS.
@@ -696,7 +696,7 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable)
696 tmp |= RADEON_SCLK_MORE_FORCEON; 696 tmp |= RADEON_SCLK_MORE_FORCEON;
697 } 697 }
698 WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp); 698 WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);
699 udelay(15000); 699 mdelay(15);
700 } 700 }
701 701
702 /* RV200::A11 A12, RV250::A11 A12 */ 702 /* RV200::A11 A12, RV250::A11 A12 */
@@ -709,7 +709,7 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable)
709 tmp |= RADEON_TCL_BYPASS_DISABLE; 709 tmp |= RADEON_TCL_BYPASS_DISABLE;
710 WREG32_PLL(RADEON_PLL_PWRMGT_CNTL, tmp); 710 WREG32_PLL(RADEON_PLL_PWRMGT_CNTL, tmp);
711 } 711 }
712 udelay(15000); 712 mdelay(15);
713 713
714 /*enable dynamic mode for display clocks (PIXCLK and PIX2CLK) */ 714 /*enable dynamic mode for display clocks (PIXCLK and PIX2CLK) */
715 tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL); 715 tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL);
@@ -722,14 +722,14 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable)
722 RADEON_PIXCLK_TMDS_ALWAYS_ONb); 722 RADEON_PIXCLK_TMDS_ALWAYS_ONb);
723 723
724 WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp); 724 WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);
725 udelay(15000); 725 mdelay(15);
726 726
727 tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL); 727 tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);
728 tmp |= (RADEON_PIXCLK_ALWAYS_ONb | 728 tmp |= (RADEON_PIXCLK_ALWAYS_ONb |
729 RADEON_PIXCLK_DAC_ALWAYS_ONb); 729 RADEON_PIXCLK_DAC_ALWAYS_ONb);
730 730
731 WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp); 731 WREG32_PLL(RADEON_VCLK_ECP_CNTL, tmp);
732 udelay(15000); 732 mdelay(15);
733 } 733 }
734 } else { 734 } else {
735 /* Turn everything OFF (ForceON to everything) */ 735 /* Turn everything OFF (ForceON to everything) */
@@ -861,7 +861,7 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable)
861 } 861 }
862 WREG32_PLL(RADEON_SCLK_CNTL, tmp); 862 WREG32_PLL(RADEON_SCLK_CNTL, tmp);
863 863
864 udelay(16000); 864 mdelay(16);
865 865
866 if ((rdev->family == CHIP_R300) || 866 if ((rdev->family == CHIP_R300) ||
867 (rdev->family == CHIP_R350)) { 867 (rdev->family == CHIP_R350)) {
@@ -870,7 +870,7 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable)
870 R300_SCLK_FORCE_GA | 870 R300_SCLK_FORCE_GA |
871 R300_SCLK_FORCE_CBA); 871 R300_SCLK_FORCE_CBA);
872 WREG32_PLL(R300_SCLK_CNTL2, tmp); 872 WREG32_PLL(R300_SCLK_CNTL2, tmp);
873 udelay(16000); 873 mdelay(16);
874 } 874 }
875 875
876 if (rdev->flags & RADEON_IS_IGP) { 876 if (rdev->flags & RADEON_IS_IGP) {
@@ -878,7 +878,7 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable)
878 tmp &= ~(RADEON_FORCEON_MCLKA | 878 tmp &= ~(RADEON_FORCEON_MCLKA |
879 RADEON_FORCEON_YCLKA); 879 RADEON_FORCEON_YCLKA);
880 WREG32_PLL(RADEON_MCLK_CNTL, tmp); 880 WREG32_PLL(RADEON_MCLK_CNTL, tmp);
881 udelay(16000); 881 mdelay(16);
882 } 882 }
883 883
884 if ((rdev->family == CHIP_RV200) || 884 if ((rdev->family == CHIP_RV200) ||
@@ -887,7 +887,7 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable)
887 tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL); 887 tmp = RREG32_PLL(RADEON_SCLK_MORE_CNTL);
888 tmp |= RADEON_SCLK_MORE_FORCEON; 888 tmp |= RADEON_SCLK_MORE_FORCEON;
889 WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp); 889 WREG32_PLL(RADEON_SCLK_MORE_CNTL, tmp);
890 udelay(16000); 890 mdelay(16);
891 } 891 }
892 892
893 tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL); 893 tmp = RREG32_PLL(RADEON_PIXCLKS_CNTL);
@@ -900,7 +900,7 @@ void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable)
900 RADEON_PIXCLK_TMDS_ALWAYS_ONb); 900 RADEON_PIXCLK_TMDS_ALWAYS_ONb);
901 901
902 WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp); 902 WREG32_PLL(RADEON_PIXCLKS_CNTL, tmp);
903 udelay(16000); 903 mdelay(16);
904 904
905 tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL); 905 tmp = RREG32_PLL(RADEON_VCLK_ECP_CNTL);
906 tmp &= ~(RADEON_PIXCLK_ALWAYS_ONb | 906 tmp &= ~(RADEON_PIXCLK_ALWAYS_ONb |
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index 81fc100be7e1..2cad9fde92fc 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -2845,7 +2845,7 @@ bool radeon_combios_external_tmds_setup(struct drm_encoder *encoder)
2845 case 4: 2845 case 4:
2846 val = RBIOS16(index); 2846 val = RBIOS16(index);
2847 index += 2; 2847 index += 2;
2848 udelay(val * 1000); 2848 mdelay(val);
2849 break; 2849 break;
2850 case 6: 2850 case 6:
2851 slave_addr = id & 0xff; 2851 slave_addr = id & 0xff;
@@ -3044,7 +3044,7 @@ static void combios_parse_pll_table(struct drm_device *dev, uint16_t offset)
3044 udelay(150); 3044 udelay(150);
3045 break; 3045 break;
3046 case 2: 3046 case 2:
3047 udelay(1000); 3047 mdelay(1);
3048 break; 3048 break;
3049 case 3: 3049 case 3:
3050 while (tmp--) { 3050 while (tmp--) {
@@ -3075,13 +3075,13 @@ static void combios_parse_pll_table(struct drm_device *dev, uint16_t offset)
3075 /*mclk_cntl |= 0x00001111;*//* ??? */ 3075 /*mclk_cntl |= 0x00001111;*//* ??? */
3076 WREG32_PLL(RADEON_MCLK_CNTL, 3076 WREG32_PLL(RADEON_MCLK_CNTL,
3077 mclk_cntl); 3077 mclk_cntl);
3078 udelay(10000); 3078 mdelay(10);
3079#endif 3079#endif
3080 WREG32_PLL 3080 WREG32_PLL
3081 (RADEON_CLK_PWRMGT_CNTL, 3081 (RADEON_CLK_PWRMGT_CNTL,
3082 tmp & 3082 tmp &
3083 ~RADEON_CG_NO1_DEBUG_0); 3083 ~RADEON_CG_NO1_DEBUG_0);
3084 udelay(10000); 3084 mdelay(10);
3085 } 3085 }
3086 break; 3086 break;
3087 default: 3087 default:
diff --git a/drivers/gpu/drm/radeon/radeon_i2c.c b/drivers/gpu/drm/radeon/radeon_i2c.c
index 85bcfc8923a7..3edec1c198e3 100644
--- a/drivers/gpu/drm/radeon/radeon_i2c.c
+++ b/drivers/gpu/drm/radeon/radeon_i2c.c
@@ -900,6 +900,10 @@ struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
900 struct radeon_i2c_chan *i2c; 900 struct radeon_i2c_chan *i2c;
901 int ret; 901 int ret;
902 902
903 /* don't add the mm_i2c bus unless hw_i2c is enabled */
904 if (rec->mm_i2c && (radeon_hw_i2c == 0))
905 return NULL;
906
903 i2c = kzalloc(sizeof(struct radeon_i2c_chan), GFP_KERNEL); 907 i2c = kzalloc(sizeof(struct radeon_i2c_chan), GFP_KERNEL);
904 if (i2c == NULL) 908 if (i2c == NULL)
905 return NULL; 909 return NULL;
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
index 2f46e0c8df53..42db254f6bb0 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
@@ -88,7 +88,7 @@ static void radeon_legacy_lvds_update(struct drm_encoder *encoder, int mode)
88 lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL); 88 lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL);
89 lvds_pll_cntl |= RADEON_LVDS_PLL_EN; 89 lvds_pll_cntl |= RADEON_LVDS_PLL_EN;
90 WREG32(RADEON_LVDS_PLL_CNTL, lvds_pll_cntl); 90 WREG32(RADEON_LVDS_PLL_CNTL, lvds_pll_cntl);
91 udelay(1000); 91 mdelay(1);
92 92
93 lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL); 93 lvds_pll_cntl = RREG32(RADEON_LVDS_PLL_CNTL);
94 lvds_pll_cntl &= ~RADEON_LVDS_PLL_RESET; 94 lvds_pll_cntl &= ~RADEON_LVDS_PLL_RESET;
@@ -101,7 +101,7 @@ static void radeon_legacy_lvds_update(struct drm_encoder *encoder, int mode)
101 (backlight_level << RADEON_LVDS_BL_MOD_LEVEL_SHIFT)); 101 (backlight_level << RADEON_LVDS_BL_MOD_LEVEL_SHIFT));
102 if (is_mac) 102 if (is_mac)
103 lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN; 103 lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN;
104 udelay(panel_pwr_delay * 1000); 104 mdelay(panel_pwr_delay);
105 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); 105 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
106 break; 106 break;
107 case DRM_MODE_DPMS_STANDBY: 107 case DRM_MODE_DPMS_STANDBY:
@@ -118,10 +118,10 @@ static void radeon_legacy_lvds_update(struct drm_encoder *encoder, int mode)
118 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); 118 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
119 lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON); 119 lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON);
120 } 120 }
121 udelay(panel_pwr_delay * 1000); 121 mdelay(panel_pwr_delay);
122 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); 122 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
123 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); 123 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
124 udelay(panel_pwr_delay * 1000); 124 mdelay(panel_pwr_delay);
125 break; 125 break;
126 } 126 }
127 127
@@ -656,7 +656,7 @@ static enum drm_connector_status radeon_legacy_primary_dac_detect(struct drm_enc
656 656
657 WREG32(RADEON_DAC_MACRO_CNTL, tmp); 657 WREG32(RADEON_DAC_MACRO_CNTL, tmp);
658 658
659 udelay(2000); 659 mdelay(2);
660 660
661 if (RREG32(RADEON_DAC_CNTL) & RADEON_DAC_CMP_OUTPUT) 661 if (RREG32(RADEON_DAC_CNTL) & RADEON_DAC_CMP_OUTPUT)
662 found = connector_status_connected; 662 found = connector_status_connected;
@@ -1499,7 +1499,7 @@ static enum drm_connector_status radeon_legacy_tv_dac_detect(struct drm_encoder
1499 tmp = dac_cntl2 | RADEON_DAC2_DAC2_CLK_SEL | RADEON_DAC2_CMP_EN; 1499 tmp = dac_cntl2 | RADEON_DAC2_DAC2_CLK_SEL | RADEON_DAC2_CMP_EN;
1500 WREG32(RADEON_DAC_CNTL2, tmp); 1500 WREG32(RADEON_DAC_CNTL2, tmp);
1501 1501
1502 udelay(10000); 1502 mdelay(10);
1503 1503
1504 if (ASIC_IS_R300(rdev)) { 1504 if (ASIC_IS_R300(rdev)) {
1505 if (RREG32(RADEON_DAC_CNTL2) & RADEON_DAC2_CMP_OUT_B) 1505 if (RREG32(RADEON_DAC_CNTL2) & RADEON_DAC2_CMP_OUT_B)
diff --git a/drivers/gpu/drm/savage/savage_state.c b/drivers/gpu/drm/savage/savage_state.c
index 031aaaf79ac2..b6d8608375cd 100644
--- a/drivers/gpu/drm/savage/savage_state.c
+++ b/drivers/gpu/drm/savage/savage_state.c
@@ -988,7 +988,7 @@ int savage_bci_cmdbuf(struct drm_device *dev, void *data, struct drm_file *file_
988 * for locking on FreeBSD. 988 * for locking on FreeBSD.
989 */ 989 */
990 if (cmdbuf->size) { 990 if (cmdbuf->size) {
991 kcmd_addr = kmalloc(cmdbuf->size * 8, GFP_KERNEL); 991 kcmd_addr = kmalloc_array(cmdbuf->size, 8, GFP_KERNEL);
992 if (kcmd_addr == NULL) 992 if (kcmd_addr == NULL)
993 return -ENOMEM; 993 return -ENOMEM;
994 994
@@ -1015,8 +1015,8 @@ int savage_bci_cmdbuf(struct drm_device *dev, void *data, struct drm_file *file_
1015 cmdbuf->vb_addr = kvb_addr; 1015 cmdbuf->vb_addr = kvb_addr;
1016 } 1016 }
1017 if (cmdbuf->nbox) { 1017 if (cmdbuf->nbox) {
1018 kbox_addr = kmalloc(cmdbuf->nbox * sizeof(struct drm_clip_rect), 1018 kbox_addr = kmalloc_array(cmdbuf->nbox, sizeof(struct drm_clip_rect),
1019 GFP_KERNEL); 1019 GFP_KERNEL);
1020 if (kbox_addr == NULL) { 1020 if (kbox_addr == NULL) {
1021 ret = -ENOMEM; 1021 ret = -ENOMEM;
1022 goto done; 1022 goto done;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-25 19:49:07 -0500