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authorDaniel Vetter <daniel.vetter@ffwll.ch>2013-03-26 19:44:55 -0400
committerDaniel Vetter <daniel.vetter@ffwll.ch>2013-03-27 19:50:07 -0400
commit5bfe2ac00395ca37219b7187299cd9d23ae06682 (patch)
tree8ede781c5bdc12fb66e08b194e06375d5a654b00 /drivers/gpu/drm
parent31fac9dca28a54cdb8b2e13cdcae88c7d7916870 (diff)
drm/i915: add pipe_config->has_pch_encoder
This is used way too often in the enable/disable paths. And will be even more useful in the future. Note that correct semantics of this change highly depend upon correct updating of intel_crtc->config: Like with all other modeset state, we need to call ->disable with the old config, but ->mode_set and ->enable with the new config. v2: Do not yet use the flag in the ->disable callbacks - atm we don't yet have support for the information stored in the pipe_config in the hw state readout code, so this will be wrong at boot-up/resume. v3: Rebased on top of the hdmi/dp ddi encoder merging. v4: Fixup stupid rebase error which lead to a NULL vfunc deref. v5: On haswell the VGA port is on the PCH! v6: s/IS_HASWELL/HAS_DDI/, spotted by Paulo Zanoni. Also add a missing parameter name in a function declaration. v7: Don't forget to git add ... Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/i915/intel_crt.c12
-rw-r--r--drivers/gpu/drm/i915/intel_ddi.c16
-rw-r--r--drivers/gpu/drm/i915/intel_display.c40
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c16
-rw-r--r--drivers/gpu/drm/i915/intel_drv.h13
-rw-r--r--drivers/gpu/drm/i915/intel_hdmi.c14
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c2
-rw-r--r--drivers/gpu/drm/i915/intel_sdvo.c3
8 files changed, 54 insertions, 62 deletions
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 756ae552e7e5..1ae2d7f39c6f 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -206,10 +206,14 @@ static int intel_crt_mode_valid(struct drm_connector *connector,
206 return MODE_OK; 206 return MODE_OK;
207} 207}
208 208
209static bool intel_crt_mode_fixup(struct drm_encoder *encoder, 209static bool intel_crt_compute_config(struct intel_encoder *encoder,
210 const struct drm_display_mode *mode, 210 struct intel_crtc_config *pipe_config)
211 struct drm_display_mode *adjusted_mode)
212{ 211{
212 struct drm_device *dev = encoder->base.dev;
213
214 if (HAS_PCH_SPLIT(dev))
215 pipe_config->has_pch_encoder = true;
216
213 return true; 217 return true;
214} 218}
215 219
@@ -683,7 +687,6 @@ static void intel_crt_reset(struct drm_connector *connector)
683 */ 687 */
684 688
685static const struct drm_encoder_helper_funcs crt_encoder_funcs = { 689static const struct drm_encoder_helper_funcs crt_encoder_funcs = {
686 .mode_fixup = intel_crt_mode_fixup,
687 .mode_set = intel_crt_mode_set, 690 .mode_set = intel_crt_mode_set,
688}; 691};
689 692
@@ -774,6 +777,7 @@ void intel_crt_init(struct drm_device *dev)
774 else 777 else
775 crt->adpa_reg = ADPA; 778 crt->adpa_reg = ADPA;
776 779
780 crt->base.compute_config = intel_crt_compute_config;
777 crt->base.disable = intel_disable_crt; 781 crt->base.disable = intel_disable_crt;
778 crt->base.enable = intel_enable_crt; 782 crt->base.enable = intel_enable_crt;
779 if (I915_HAS_HOTPLUG(dev)) 783 if (I915_HAS_HOTPLUG(dev))
diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
index 258e38e08b6e..baeb4700e5e6 100644
--- a/drivers/gpu/drm/i915/intel_ddi.c
+++ b/drivers/gpu/drm/i915/intel_ddi.c
@@ -1476,19 +1476,17 @@ static void intel_ddi_destroy(struct drm_encoder *encoder)
1476 intel_dp_encoder_destroy(encoder); 1476 intel_dp_encoder_destroy(encoder);
1477} 1477}
1478 1478
1479static bool intel_ddi_mode_fixup(struct drm_encoder *encoder, 1479static bool intel_ddi_compute_config(struct intel_encoder *encoder,
1480 const struct drm_display_mode *mode, 1480 struct intel_crtc_config *pipe_config)
1481 struct drm_display_mode *adjusted_mode)
1482{ 1481{
1483 struct intel_encoder *intel_encoder = to_intel_encoder(encoder); 1482 int type = encoder->type;
1484 int type = intel_encoder->type;
1485 1483
1486 WARN(type == INTEL_OUTPUT_UNKNOWN, "mode_fixup() on unknown output!\n"); 1484 WARN(type == INTEL_OUTPUT_UNKNOWN, "compute_config() on unknown output!\n");
1487 1485
1488 if (type == INTEL_OUTPUT_HDMI) 1486 if (type == INTEL_OUTPUT_HDMI)
1489 return intel_hdmi_mode_fixup(encoder, mode, adjusted_mode); 1487 return intel_hdmi_compute_config(encoder, pipe_config);
1490 else 1488 else
1491 return intel_dp_mode_fixup(encoder, mode, adjusted_mode); 1489 return intel_dp_compute_config(encoder, pipe_config);
1492} 1490}
1493 1491
1494static const struct drm_encoder_funcs intel_ddi_funcs = { 1492static const struct drm_encoder_funcs intel_ddi_funcs = {
@@ -1496,7 +1494,6 @@ static const struct drm_encoder_funcs intel_ddi_funcs = {
1496}; 1494};
1497 1495
1498static const struct drm_encoder_helper_funcs intel_ddi_helper_funcs = { 1496static const struct drm_encoder_helper_funcs intel_ddi_helper_funcs = {
1499 .mode_fixup = intel_ddi_mode_fixup,
1500 .mode_set = intel_ddi_mode_set, 1497 .mode_set = intel_ddi_mode_set,
1501}; 1498};
1502 1499
@@ -1536,6 +1533,7 @@ void intel_ddi_init(struct drm_device *dev, enum port port)
1536 DRM_MODE_ENCODER_TMDS); 1533 DRM_MODE_ENCODER_TMDS);
1537 drm_encoder_helper_add(encoder, &intel_ddi_helper_funcs); 1534 drm_encoder_helper_add(encoder, &intel_ddi_helper_funcs);
1538 1535
1536 intel_encoder->compute_config = intel_ddi_compute_config;
1539 intel_encoder->enable = intel_enable_ddi; 1537 intel_encoder->enable = intel_enable_ddi;
1540 intel_encoder->pre_enable = intel_ddi_pre_enable; 1538 intel_encoder->pre_enable = intel_ddi_pre_enable;
1541 intel_encoder->disable = intel_disable_ddi; 1539 intel_encoder->disable = intel_disable_ddi;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 7335ec2733de..14e7e919ca51 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2977,27 +2977,6 @@ static void intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc)
2977 mutex_unlock(&dev->struct_mutex); 2977 mutex_unlock(&dev->struct_mutex);
2978} 2978}
2979 2979
2980static bool ironlake_crtc_driving_pch(struct drm_crtc *crtc)
2981{
2982 struct drm_device *dev = crtc->dev;
2983 struct intel_encoder *intel_encoder;
2984
2985 /*
2986 * If there's a non-PCH eDP on this crtc, it must be DP_A, and that
2987 * must be driven by its own crtc; no sharing is possible.
2988 */
2989 for_each_encoder_on_crtc(dev, crtc, intel_encoder) {
2990 switch (intel_encoder->type) {
2991 case INTEL_OUTPUT_EDP:
2992 if (!intel_encoder_is_pch_edp(&intel_encoder->base))
2993 return false;
2994 continue;
2995 }
2996 }
2997
2998 return true;
2999}
3000
3001static bool haswell_crtc_driving_pch(struct drm_crtc *crtc) 2980static bool haswell_crtc_driving_pch(struct drm_crtc *crtc)
3002{ 2981{
3003 return intel_pipe_has_type(crtc, INTEL_OUTPUT_ANALOG); 2982 return intel_pipe_has_type(crtc, INTEL_OUTPUT_ANALOG);
@@ -3338,7 +3317,6 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
3338 int pipe = intel_crtc->pipe; 3317 int pipe = intel_crtc->pipe;
3339 int plane = intel_crtc->plane; 3318 int plane = intel_crtc->plane;
3340 u32 temp; 3319 u32 temp;
3341 bool is_pch_port;
3342 3320
3343 WARN_ON(!crtc->enabled); 3321 WARN_ON(!crtc->enabled);
3344 3322
@@ -3354,9 +3332,8 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
3354 I915_WRITE(PCH_LVDS, temp | LVDS_PORT_EN); 3332 I915_WRITE(PCH_LVDS, temp | LVDS_PORT_EN);
3355 } 3333 }
3356 3334
3357 is_pch_port = ironlake_crtc_driving_pch(crtc);
3358 3335
3359 if (is_pch_port) { 3336 if (intel_crtc->config.has_pch_encoder) {
3360 /* Note: FDI PLL enabling _must_ be done before we enable the 3337 /* Note: FDI PLL enabling _must_ be done before we enable the
3361 * cpu pipes, hence this is separate from all the other fdi/pch 3338 * cpu pipes, hence this is separate from all the other fdi/pch
3362 * enabling. */ 3339 * enabling. */
@@ -3393,10 +3370,11 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
3393 */ 3370 */
3394 intel_crtc_load_lut(crtc); 3371 intel_crtc_load_lut(crtc);
3395 3372
3396 intel_enable_pipe(dev_priv, pipe, is_pch_port); 3373 intel_enable_pipe(dev_priv, pipe,
3374 intel_crtc->config.has_pch_encoder);
3397 intel_enable_plane(dev_priv, plane, pipe); 3375 intel_enable_plane(dev_priv, plane, pipe);
3398 3376
3399 if (is_pch_port) 3377 if (intel_crtc->config.has_pch_encoder)
3400 ironlake_pch_enable(crtc); 3378 ironlake_pch_enable(crtc);
3401 3379
3402 mutex_lock(&dev->struct_mutex); 3380 mutex_lock(&dev->struct_mutex);
@@ -3430,7 +3408,6 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
3430 struct intel_encoder *encoder; 3408 struct intel_encoder *encoder;
3431 int pipe = intel_crtc->pipe; 3409 int pipe = intel_crtc->pipe;
3432 int plane = intel_crtc->plane; 3410 int plane = intel_crtc->plane;
3433 bool is_pch_port;
3434 3411
3435 WARN_ON(!crtc->enabled); 3412 WARN_ON(!crtc->enabled);
3436 3413
@@ -3440,9 +3417,7 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
3440 intel_crtc->active = true; 3417 intel_crtc->active = true;
3441 intel_update_watermarks(dev); 3418 intel_update_watermarks(dev);
3442 3419
3443 is_pch_port = haswell_crtc_driving_pch(crtc); 3420 if (intel_crtc->config.has_pch_encoder)
3444
3445 if (is_pch_port)
3446 dev_priv->display.fdi_link_train(crtc); 3421 dev_priv->display.fdi_link_train(crtc);
3447 3422
3448 for_each_encoder_on_crtc(dev, crtc, encoder) 3423 for_each_encoder_on_crtc(dev, crtc, encoder)
@@ -3473,10 +3448,11 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
3473 intel_ddi_set_pipe_settings(crtc); 3448 intel_ddi_set_pipe_settings(crtc);
3474 intel_ddi_enable_transcoder_func(crtc); 3449 intel_ddi_enable_transcoder_func(crtc);
3475 3450
3476 intel_enable_pipe(dev_priv, pipe, is_pch_port); 3451 intel_enable_pipe(dev_priv, pipe,
3452 intel_crtc->config.has_pch_encoder);
3477 intel_enable_plane(dev_priv, plane, pipe); 3453 intel_enable_plane(dev_priv, plane, pipe);
3478 3454
3479 if (is_pch_port) 3455 if (intel_crtc->config.has_pch_encoder)
3480 lpt_pch_enable(crtc); 3456 lpt_pch_enable(crtc);
3481 3457
3482 mutex_lock(&dev->struct_mutex); 3458 mutex_lock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index ad6bba3ba06a..65550e467464 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -689,12 +689,13 @@ intel_dp_i2c_init(struct intel_dp *intel_dp,
689} 689}
690 690
691bool 691bool
692intel_dp_mode_fixup(struct drm_encoder *encoder, 692intel_dp_compute_config(struct intel_encoder *encoder,
693 const struct drm_display_mode *mode, 693 struct intel_crtc_config *pipe_config)
694 struct drm_display_mode *adjusted_mode)
695{ 694{
696 struct drm_device *dev = encoder->dev; 695 struct drm_device *dev = encoder->base.dev;
697 struct intel_dp *intel_dp = enc_to_intel_dp(encoder); 696 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
697 struct drm_display_mode *mode = &pipe_config->requested_mode;
698 struct intel_dp *intel_dp = enc_to_intel_dp(&encoder->base);
698 struct intel_connector *intel_connector = intel_dp->attached_connector; 699 struct intel_connector *intel_connector = intel_dp->attached_connector;
699 int lane_count, clock; 700 int lane_count, clock;
700 int max_lane_count = drm_dp_max_lane_count(intel_dp->dpcd); 701 int max_lane_count = drm_dp_max_lane_count(intel_dp->dpcd);
@@ -702,6 +703,9 @@ intel_dp_mode_fixup(struct drm_encoder *encoder,
702 int bpp, mode_rate; 703 int bpp, mode_rate;
703 static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; 704 static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 };
704 705
706 if (HAS_PCH_SPLIT(dev) && !HAS_DDI(dev) && !is_cpu_edp(intel_dp))
707 pipe_config->has_pch_encoder = true;
708
705 if (is_edp(intel_dp) && intel_connector->panel.fixed_mode) { 709 if (is_edp(intel_dp) && intel_connector->panel.fixed_mode) {
706 intel_fixed_panel_mode(intel_connector->panel.fixed_mode, 710 intel_fixed_panel_mode(intel_connector->panel.fixed_mode,
707 adjusted_mode); 711 adjusted_mode);
@@ -2527,7 +2531,6 @@ void intel_dp_encoder_destroy(struct drm_encoder *encoder)
2527} 2531}
2528 2532
2529static const struct drm_encoder_helper_funcs intel_dp_helper_funcs = { 2533static const struct drm_encoder_helper_funcs intel_dp_helper_funcs = {
2530 .mode_fixup = intel_dp_mode_fixup,
2531 .mode_set = intel_dp_mode_set, 2534 .mode_set = intel_dp_mode_set,
2532}; 2535};
2533 2536
@@ -2947,6 +2950,7 @@ intel_dp_init(struct drm_device *dev, int output_reg, enum port port)
2947 DRM_MODE_ENCODER_TMDS); 2950 DRM_MODE_ENCODER_TMDS);
2948 drm_encoder_helper_add(&intel_encoder->base, &intel_dp_helper_funcs); 2951 drm_encoder_helper_add(&intel_encoder->base, &intel_dp_helper_funcs);
2949 2952
2953 intel_encoder->compute_config = intel_dp_compute_config;
2950 intel_encoder->enable = intel_enable_dp; 2954 intel_encoder->enable = intel_enable_dp;
2951 intel_encoder->pre_enable = intel_pre_enable_dp; 2955 intel_encoder->pre_enable = intel_pre_enable_dp;
2952 intel_encoder->disable = intel_disable_dp; 2956 intel_encoder->disable = intel_disable_dp;
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index f0e5462c665b..8de1855f5872 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -190,6 +190,9 @@ struct intel_crtc_config {
190 * changes the crtc timings in the mode to prevent the crtc fixup from 190 * changes the crtc timings in the mode to prevent the crtc fixup from
191 * overwriting them. Currently only lvds needs that. */ 191 * overwriting them. Currently only lvds needs that. */
192 bool timings_set; 192 bool timings_set;
193 /* Whether to set up the PCH/FDI. Note that we never allow sharing
194 * between pch encoders and cpu encoders. */
195 bool has_pch_encoder;
193 /* Used by SDVO (and if we ever fix it, HDMI). */ 196 /* Used by SDVO (and if we ever fix it, HDMI). */
194 unsigned pixel_multiplier; 197 unsigned pixel_multiplier;
195}; 198};
@@ -449,9 +452,8 @@ extern void intel_hdmi_init(struct drm_device *dev,
449extern void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port, 452extern void intel_hdmi_init_connector(struct intel_digital_port *intel_dig_port,
450 struct intel_connector *intel_connector); 453 struct intel_connector *intel_connector);
451extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder); 454extern struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder);
452extern bool intel_hdmi_mode_fixup(struct drm_encoder *encoder, 455extern bool intel_hdmi_compute_config(struct intel_encoder *encoder,
453 const struct drm_display_mode *mode, 456 struct intel_crtc_config *pipe_config);
454 struct drm_display_mode *adjusted_mode);
455extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if); 457extern void intel_dip_infoframe_csum(struct dip_infoframe *avi_if);
456extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, 458extern bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg,
457 bool is_sdvob); 459 bool is_sdvob);
@@ -475,9 +477,8 @@ extern void intel_dp_complete_link_train(struct intel_dp *intel_dp);
475extern void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode); 477extern void intel_dp_sink_dpms(struct intel_dp *intel_dp, int mode);
476extern void intel_dp_encoder_destroy(struct drm_encoder *encoder); 478extern void intel_dp_encoder_destroy(struct drm_encoder *encoder);
477extern void intel_dp_check_link_status(struct intel_dp *intel_dp); 479extern void intel_dp_check_link_status(struct intel_dp *intel_dp);
478extern bool intel_dp_mode_fixup(struct drm_encoder *encoder, 480extern bool intel_dp_compute_config(struct intel_encoder *encoder,
479 const struct drm_display_mode *mode, 481 struct intel_crtc_config *pipe_config);
480 struct drm_display_mode *adjusted_mode);
481extern bool intel_dpd_is_edp(struct drm_device *dev); 482extern bool intel_dpd_is_edp(struct drm_device *dev);
482extern void ironlake_edp_backlight_on(struct intel_dp *intel_dp); 483extern void ironlake_edp_backlight_on(struct intel_dp *intel_dp);
483extern void ironlake_edp_backlight_off(struct intel_dp *intel_dp); 484extern void ironlake_edp_backlight_off(struct intel_dp *intel_dp);
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index b9a83d7c804b..b588e6c547e2 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -768,11 +768,12 @@ static int intel_hdmi_mode_valid(struct drm_connector *connector,
768 return MODE_OK; 768 return MODE_OK;
769} 769}
770 770
771bool intel_hdmi_mode_fixup(struct drm_encoder *encoder, 771bool intel_hdmi_compute_config(struct intel_encoder *encoder,
772 const struct drm_display_mode *mode, 772 struct intel_crtc_config *pipe_config)
773 struct drm_display_mode *adjusted_mode)
774{ 773{
775 struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(encoder); 774 struct intel_hdmi *intel_hdmi = enc_to_intel_hdmi(&encoder->base);
775 struct drm_device *dev = encoder->base.dev;
776 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
776 777
777 if (intel_hdmi->color_range_auto) { 778 if (intel_hdmi->color_range_auto) {
778 /* See CEA-861-E - 5.1 Default Encoding Parameters */ 779 /* See CEA-861-E - 5.1 Default Encoding Parameters */
@@ -786,6 +787,9 @@ bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
786 if (intel_hdmi->color_range) 787 if (intel_hdmi->color_range)
787 adjusted_mode->private_flags |= INTEL_MODE_LIMITED_COLOR_RANGE; 788 adjusted_mode->private_flags |= INTEL_MODE_LIMITED_COLOR_RANGE;
788 789
790 if (HAS_PCH_SPLIT(dev) && !HAS_DDI(dev))
791 pipe_config->has_pch_encoder = true;
792
789 return true; 793 return true;
790} 794}
791 795
@@ -937,7 +941,6 @@ static void intel_hdmi_destroy(struct drm_connector *connector)
937} 941}
938 942
939static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = { 943static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
940 .mode_fixup = intel_hdmi_mode_fixup,
941 .mode_set = intel_hdmi_mode_set, 944 .mode_set = intel_hdmi_mode_set,
942}; 945};
943 946
@@ -1066,6 +1069,7 @@ void intel_hdmi_init(struct drm_device *dev, int hdmi_reg, enum port port)
1066 DRM_MODE_ENCODER_TMDS); 1069 DRM_MODE_ENCODER_TMDS);
1067 drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs); 1070 drm_encoder_helper_add(&intel_encoder->base, &intel_hdmi_helper_funcs);
1068 1071
1072 intel_encoder->compute_config = intel_hdmi_compute_config;
1069 intel_encoder->enable = intel_enable_hdmi; 1073 intel_encoder->enable = intel_enable_hdmi;
1070 intel_encoder->disable = intel_disable_hdmi; 1074 intel_encoder->disable = intel_disable_hdmi;
1071 intel_encoder->get_hw_state = intel_hdmi_get_hw_state; 1075 intel_encoder->get_hw_state = intel_hdmi_get_hw_state;
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index a2c516c116cb..9d6ed91b443d 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -331,6 +331,8 @@ static bool intel_lvds_compute_config(struct intel_encoder *intel_encoder,
331 adjusted_mode); 331 adjusted_mode);
332 332
333 if (HAS_PCH_SPLIT(dev)) { 333 if (HAS_PCH_SPLIT(dev)) {
334 pipe_config->has_pch_encoder = true;
335
334 intel_pch_panel_fitting(dev, 336 intel_pch_panel_fitting(dev,
335 intel_connector->panel.fitting_mode, 337 intel_connector->panel.fitting_mode,
336 mode, adjusted_mode); 338 mode, adjusted_mode);
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 6912742378a1..5f3f9e9e661e 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -1047,6 +1047,9 @@ static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1047 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode; 1047 struct drm_display_mode *adjusted_mode = &pipe_config->adjusted_mode;
1048 struct drm_display_mode *mode = &pipe_config->requested_mode; 1048 struct drm_display_mode *mode = &pipe_config->requested_mode;
1049 1049
1050 if (HAS_PCH_SPLIT(encoder->base.dev))
1051 pipe_config->has_pch_encoder = true;
1052
1050 /* We need to construct preferred input timings based on our 1053 /* We need to construct preferred input timings based on our
1051 * output timings. To do that, we have to set the output 1054 * output timings. To do that, we have to set the output
1052 * timings, even though this isn't really the right place in 1055 * timings, even though this isn't really the right place in