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authorIlija Hadzic <ihadzic@research.bell-labs.com>2011-10-26 15:43:58 -0400
committerDave Airlie <airlied@redhat.com>2011-11-01 12:02:10 -0400
commit54bd5206bf1615eadee5b87c64252c6991d737dc (patch)
tree7f4a198f3e8114cc4910bce5666a9848c2a3af96 /drivers/gpu/drm
parent77b1bad423599c9841ea282a82172f039bb2ff92 (diff)
drm/radeon/kms: use defined constants for crtc/hpd count instead of hard-coded value 6
radeon_driver_irq_preinstall_kms and radeon_driver_irq_uninstall_kms hard code the loop to 6 which happens to be the current maximum number of crtcs and hpd pins; if one day an ASIC with more crtcs (or hpd pins) comes out, this is a trouble waiting to happen. introduce constants for maximum CRTC count, maximum HPD pins count and maximum HDMI blocks count (per FIXME in radeon_irq structure) and correct the loops in radeon_driver_irq_preinstall_kms and radeon_driver_irq_uninstall_kms v2: take care of goofs pointed out by Alex Deucher Signed-off-by: Ilija Hadzic <ihadzic@research.bell-labs.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/radeon/radeon.h19
-rw-r--r--drivers/gpu/drm/radeon/radeon_irq_kms.c12
2 files changed, 16 insertions, 15 deletions
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 3a78f8666fa7..00f6dc4973a9 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -437,25 +437,26 @@ union radeon_irq_stat_regs {
437 struct evergreen_irq_stat_regs evergreen; 437 struct evergreen_irq_stat_regs evergreen;
438}; 438};
439 439
440#define RADEON_MAX_HPD_PINS 6
441#define RADEON_MAX_CRTCS 6
442#define RADEON_MAX_HDMI_BLOCKS 2
443
440struct radeon_irq { 444struct radeon_irq {
441 bool installed; 445 bool installed;
442 bool sw_int; 446 bool sw_int;
443 /* FIXME: use a define max crtc rather than hardcode it */ 447 bool crtc_vblank_int[RADEON_MAX_CRTCS];
444 bool crtc_vblank_int[6]; 448 bool pflip[RADEON_MAX_CRTCS];
445 bool pflip[6];
446 wait_queue_head_t vblank_queue; 449 wait_queue_head_t vblank_queue;
447 /* FIXME: use defines for max hpd/dacs */ 450 bool hpd[RADEON_MAX_HPD_PINS];
448 bool hpd[6];
449 bool gui_idle; 451 bool gui_idle;
450 bool gui_idle_acked; 452 bool gui_idle_acked;
451 wait_queue_head_t idle_queue; 453 wait_queue_head_t idle_queue;
452 /* FIXME: use defines for max HDMI blocks */ 454 bool hdmi[RADEON_MAX_HDMI_BLOCKS];
453 bool hdmi[2];
454 spinlock_t sw_lock; 455 spinlock_t sw_lock;
455 int sw_refcount; 456 int sw_refcount;
456 union radeon_irq_stat_regs stat_regs; 457 union radeon_irq_stat_regs stat_regs;
457 spinlock_t pflip_lock[6]; 458 spinlock_t pflip_lock[RADEON_MAX_CRTCS];
458 int pflip_refcount[6]; 459 int pflip_refcount[RADEON_MAX_CRTCS];
459}; 460};
460 461
461int radeon_irq_kms_init(struct radeon_device *rdev); 462int radeon_irq_kms_init(struct radeon_device *rdev);
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c
index 9ec830c77af0..93da85515cd2 100644
--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
@@ -67,10 +67,10 @@ void radeon_driver_irq_preinstall_kms(struct drm_device *dev)
67 /* Disable *all* interrupts */ 67 /* Disable *all* interrupts */
68 rdev->irq.sw_int = false; 68 rdev->irq.sw_int = false;
69 rdev->irq.gui_idle = false; 69 rdev->irq.gui_idle = false;
70 for (i = 0; i < rdev->num_crtc; i++) 70 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
71 rdev->irq.crtc_vblank_int[i] = false;
72 for (i = 0; i < 6; i++) {
73 rdev->irq.hpd[i] = false; 71 rdev->irq.hpd[i] = false;
72 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
73 rdev->irq.crtc_vblank_int[i] = false;
74 rdev->irq.pflip[i] = false; 74 rdev->irq.pflip[i] = false;
75 } 75 }
76 radeon_irq_set(rdev); 76 radeon_irq_set(rdev);
@@ -99,10 +99,10 @@ void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
99 /* Disable *all* interrupts */ 99 /* Disable *all* interrupts */
100 rdev->irq.sw_int = false; 100 rdev->irq.sw_int = false;
101 rdev->irq.gui_idle = false; 101 rdev->irq.gui_idle = false;
102 for (i = 0; i < rdev->num_crtc; i++) 102 for (i = 0; i < RADEON_MAX_HPD_PINS; i++)
103 rdev->irq.crtc_vblank_int[i] = false;
104 for (i = 0; i < 6; i++) {
105 rdev->irq.hpd[i] = false; 103 rdev->irq.hpd[i] = false;
104 for (i = 0; i < RADEON_MAX_CRTCS; i++) {
105 rdev->irq.crtc_vblank_int[i] = false;
106 rdev->irq.pflip[i] = false; 106 rdev->irq.pflip[i] = false;
107 } 107 }
108 radeon_irq_set(rdev); 108 radeon_irq_set(rdev);