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authorArnd Bergmann <arnd@arndb.de>2012-02-28 07:39:56 -0500
committerArnd Bergmann <arnd@arndb.de>2012-02-28 07:40:01 -0500
commit4d8cfec692e988b844dcaeaeb76b5780b7ef9d28 (patch)
tree67d43adab2afd18a74d08f347e3676ae1a64193f /drivers/gpu/drm
parenta3a3c4664184f86ef964323d106c62158e2b3f25 (diff)
parent1d8c38c3d1b48eeb9cfaa42a8be13a1423569eb2 (diff)
Merge branch 'cleanup-3.4' of git://github.com/hzhuang1/linux into next/cleanup
* 'cleanup-3.4' of git://github.com/hzhuang1/linux: (2 commits) rtc: sa1100: remove verification code of alarm rtc: sa1100: remove periodic code (update to v3.3-rc5)
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/drm_ioc32.c3
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_core.c3
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_crtc.c6
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_drv.c26
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_encoder.c34
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_encoder.h1
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fbdev.c70
-rw-r--r--drivers/gpu/drm/exynos/exynos_drm_fimd.c7
-rw-r--r--drivers/gpu/drm/exynos/exynos_mixer.c19
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h15
-rw-r--r--drivers/gpu/drm/i915/intel_display.c32
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c20
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c8
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c2
-rw-r--r--drivers/gpu/drm/radeon/ni.c1
-rw-r--r--drivers/gpu/drm/radeon/r100.c12
-rw-r--r--drivers/gpu/drm/radeon/r300.c8
-rw-r--r--drivers/gpu/drm/radeon/r420.c8
-rw-r--r--drivers/gpu/drm/radeon/r520.c8
-rw-r--r--drivers/gpu/drm/radeon/r600.c1
-rw-r--r--drivers/gpu/drm/radeon/radeon_atombios.c20
-rw-r--r--drivers/gpu/drm/radeon/radeon_cs.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_fence.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_ring.c7
-rw-r--r--drivers/gpu/drm/radeon/rs400.c8
-rw-r--r--drivers/gpu/drm/radeon/rs600.c12
-rw-r--r--drivers/gpu/drm/radeon/rs690.c8
-rw-r--r--drivers/gpu/drm/radeon/rv515.c8
-rw-r--r--drivers/gpu/drm/radeon/rv770.c1
29 files changed, 233 insertions, 123 deletions
diff --git a/drivers/gpu/drm/drm_ioc32.c b/drivers/gpu/drm/drm_ioc32.c
index ddd70db45f76..637fcc3766c7 100644
--- a/drivers/gpu/drm/drm_ioc32.c
+++ b/drivers/gpu/drm/drm_ioc32.c
@@ -315,7 +315,8 @@ static int compat_drm_getclient(struct file *file, unsigned int cmd,
315 if (err) 315 if (err)
316 return err; 316 return err;
317 317
318 if (__get_user(c32.auth, &client->auth) 318 if (__get_user(c32.idx, &client->idx)
319 || __get_user(c32.auth, &client->auth)
319 || __get_user(c32.pid, &client->pid) 320 || __get_user(c32.pid, &client->pid)
320 || __get_user(c32.uid, &client->uid) 321 || __get_user(c32.uid, &client->uid)
321 || __get_user(c32.magic, &client->magic) 322 || __get_user(c32.magic, &client->magic)
diff --git a/drivers/gpu/drm/exynos/exynos_drm_core.c b/drivers/gpu/drm/exynos/exynos_drm_core.c
index 661a03571d0c..d08a55896d50 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_core.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_core.c
@@ -193,6 +193,9 @@ int exynos_drm_subdrv_register(struct exynos_drm_subdrv *subdrv)
193 return err; 193 return err;
194 } 194 }
195 195
196 /* setup possible_clones. */
197 exynos_drm_encoder_setup(drm_dev);
198
196 /* 199 /*
197 * if any specific driver such as fimd or hdmi driver called 200 * if any specific driver such as fimd or hdmi driver called
198 * exynos_drm_subdrv_register() later than drm_load(), 201 * exynos_drm_subdrv_register() later than drm_load(),
diff --git a/drivers/gpu/drm/exynos/exynos_drm_crtc.c b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
index e3861ac49295..de818831a511 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_crtc.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_crtc.c
@@ -307,9 +307,6 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
307 */ 307 */
308 event->pipe = exynos_crtc->pipe; 308 event->pipe = exynos_crtc->pipe;
309 309
310 list_add_tail(&event->base.link,
311 &dev_priv->pageflip_event_list);
312
313 ret = drm_vblank_get(dev, exynos_crtc->pipe); 310 ret = drm_vblank_get(dev, exynos_crtc->pipe);
314 if (ret) { 311 if (ret) {
315 DRM_DEBUG("failed to acquire vblank counter\n"); 312 DRM_DEBUG("failed to acquire vblank counter\n");
@@ -318,6 +315,9 @@ static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
318 goto out; 315 goto out;
319 } 316 }
320 317
318 list_add_tail(&event->base.link,
319 &dev_priv->pageflip_event_list);
320
321 crtc->fb = fb; 321 crtc->fb = fb;
322 ret = exynos_drm_crtc_update(crtc); 322 ret = exynos_drm_crtc_update(crtc);
323 if (ret) { 323 if (ret) {
diff --git a/drivers/gpu/drm/exynos/exynos_drm_drv.c b/drivers/gpu/drm/exynos/exynos_drm_drv.c
index 35889ca255e9..58820ebd3558 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_drv.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_drv.c
@@ -33,6 +33,7 @@
33 33
34#include "exynos_drm_drv.h" 34#include "exynos_drm_drv.h"
35#include "exynos_drm_crtc.h" 35#include "exynos_drm_crtc.h"
36#include "exynos_drm_encoder.h"
36#include "exynos_drm_fbdev.h" 37#include "exynos_drm_fbdev.h"
37#include "exynos_drm_fb.h" 38#include "exynos_drm_fb.h"
38#include "exynos_drm_gem.h" 39#include "exynos_drm_gem.h"
@@ -99,6 +100,9 @@ static int exynos_drm_load(struct drm_device *dev, unsigned long flags)
99 if (ret) 100 if (ret)
100 goto err_vblank; 101 goto err_vblank;
101 102
103 /* setup possible_clones. */
104 exynos_drm_encoder_setup(dev);
105
102 /* 106 /*
103 * create and configure fb helper and also exynos specific 107 * create and configure fb helper and also exynos specific
104 * fbdev object. 108 * fbdev object.
@@ -141,16 +145,21 @@ static int exynos_drm_unload(struct drm_device *dev)
141} 145}
142 146
143static void exynos_drm_preclose(struct drm_device *dev, 147static void exynos_drm_preclose(struct drm_device *dev,
144 struct drm_file *file_priv) 148 struct drm_file *file)
145{ 149{
146 struct exynos_drm_private *dev_priv = dev->dev_private; 150 DRM_DEBUG_DRIVER("%s\n", __FILE__);
147 151
148 /* 152}
149 * drm framework frees all events at release time, 153
150 * so private event list should be cleared. 154static void exynos_drm_postclose(struct drm_device *dev, struct drm_file *file)
151 */ 155{
152 if (!list_empty(&dev_priv->pageflip_event_list)) 156 DRM_DEBUG_DRIVER("%s\n", __FILE__);
153 INIT_LIST_HEAD(&dev_priv->pageflip_event_list); 157
158 if (!file->driver_priv)
159 return;
160
161 kfree(file->driver_priv);
162 file->driver_priv = NULL;
154} 163}
155 164
156static void exynos_drm_lastclose(struct drm_device *dev) 165static void exynos_drm_lastclose(struct drm_device *dev)
@@ -195,6 +204,7 @@ static struct drm_driver exynos_drm_driver = {
195 .unload = exynos_drm_unload, 204 .unload = exynos_drm_unload,
196 .preclose = exynos_drm_preclose, 205 .preclose = exynos_drm_preclose,
197 .lastclose = exynos_drm_lastclose, 206 .lastclose = exynos_drm_lastclose,
207 .postclose = exynos_drm_postclose,
198 .get_vblank_counter = drm_vblank_count, 208 .get_vblank_counter = drm_vblank_count,
199 .enable_vblank = exynos_drm_crtc_enable_vblank, 209 .enable_vblank = exynos_drm_crtc_enable_vblank,
200 .disable_vblank = exynos_drm_crtc_disable_vblank, 210 .disable_vblank = exynos_drm_crtc_disable_vblank,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_encoder.c b/drivers/gpu/drm/exynos/exynos_drm_encoder.c
index 86b93dde219a..ef4754f1519b 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_encoder.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_encoder.c
@@ -195,6 +195,40 @@ static struct drm_encoder_funcs exynos_encoder_funcs = {
195 .destroy = exynos_drm_encoder_destroy, 195 .destroy = exynos_drm_encoder_destroy,
196}; 196};
197 197
198static unsigned int exynos_drm_encoder_clones(struct drm_encoder *encoder)
199{
200 struct drm_encoder *clone;
201 struct drm_device *dev = encoder->dev;
202 struct exynos_drm_encoder *exynos_encoder = to_exynos_encoder(encoder);
203 struct exynos_drm_display_ops *display_ops =
204 exynos_encoder->manager->display_ops;
205 unsigned int clone_mask = 0;
206 int cnt = 0;
207
208 list_for_each_entry(clone, &dev->mode_config.encoder_list, head) {
209 switch (display_ops->type) {
210 case EXYNOS_DISPLAY_TYPE_LCD:
211 case EXYNOS_DISPLAY_TYPE_HDMI:
212 clone_mask |= (1 << (cnt++));
213 break;
214 default:
215 continue;
216 }
217 }
218
219 return clone_mask;
220}
221
222void exynos_drm_encoder_setup(struct drm_device *dev)
223{
224 struct drm_encoder *encoder;
225
226 DRM_DEBUG_KMS("%s\n", __FILE__);
227
228 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head)
229 encoder->possible_clones = exynos_drm_encoder_clones(encoder);
230}
231
198struct drm_encoder * 232struct drm_encoder *
199exynos_drm_encoder_create(struct drm_device *dev, 233exynos_drm_encoder_create(struct drm_device *dev,
200 struct exynos_drm_manager *manager, 234 struct exynos_drm_manager *manager,
diff --git a/drivers/gpu/drm/exynos/exynos_drm_encoder.h b/drivers/gpu/drm/exynos/exynos_drm_encoder.h
index 97b087a51cb6..eb7d2316847e 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_encoder.h
+++ b/drivers/gpu/drm/exynos/exynos_drm_encoder.h
@@ -30,6 +30,7 @@
30 30
31struct exynos_drm_manager; 31struct exynos_drm_manager;
32 32
33void exynos_drm_encoder_setup(struct drm_device *dev);
33struct drm_encoder *exynos_drm_encoder_create(struct drm_device *dev, 34struct drm_encoder *exynos_drm_encoder_create(struct drm_device *dev,
34 struct exynos_drm_manager *mgr, 35 struct exynos_drm_manager *mgr,
35 unsigned int possible_crtcs); 36 unsigned int possible_crtcs);
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
index d7ae29d2f3d6..3508700e529b 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fbdev.c
@@ -195,66 +195,6 @@ out:
195 return ret; 195 return ret;
196} 196}
197 197
198static bool
199exynos_drm_fbdev_is_samefb(struct drm_framebuffer *fb,
200 struct drm_fb_helper_surface_size *sizes)
201{
202 if (fb->width != sizes->surface_width)
203 return false;
204 if (fb->height != sizes->surface_height)
205 return false;
206 if (fb->bits_per_pixel != sizes->surface_bpp)
207 return false;
208 if (fb->depth != sizes->surface_depth)
209 return false;
210
211 return true;
212}
213
214static int exynos_drm_fbdev_recreate(struct drm_fb_helper *helper,
215 struct drm_fb_helper_surface_size *sizes)
216{
217 struct drm_device *dev = helper->dev;
218 struct exynos_drm_fbdev *exynos_fbdev = to_exynos_fbdev(helper);
219 struct exynos_drm_gem_obj *exynos_gem_obj;
220 struct drm_framebuffer *fb = helper->fb;
221 struct drm_mode_fb_cmd2 mode_cmd = { 0 };
222 unsigned long size;
223
224 DRM_DEBUG_KMS("%s\n", __FILE__);
225
226 if (exynos_drm_fbdev_is_samefb(fb, sizes))
227 return 0;
228
229 mode_cmd.width = sizes->surface_width;
230 mode_cmd.height = sizes->surface_height;
231 mode_cmd.pitches[0] = sizes->surface_width * (sizes->surface_bpp >> 3);
232 mode_cmd.pixel_format = drm_mode_legacy_fb_format(sizes->surface_bpp,
233 sizes->surface_depth);
234
235 if (exynos_fbdev->exynos_gem_obj)
236 exynos_drm_gem_destroy(exynos_fbdev->exynos_gem_obj);
237
238 if (fb->funcs->destroy)
239 fb->funcs->destroy(fb);
240
241 size = mode_cmd.pitches[0] * mode_cmd.height;
242 exynos_gem_obj = exynos_drm_gem_create(dev, size);
243 if (IS_ERR(exynos_gem_obj))
244 return PTR_ERR(exynos_gem_obj);
245
246 exynos_fbdev->exynos_gem_obj = exynos_gem_obj;
247
248 helper->fb = exynos_drm_framebuffer_init(dev, &mode_cmd,
249 &exynos_gem_obj->base);
250 if (IS_ERR_OR_NULL(helper->fb)) {
251 DRM_ERROR("failed to create drm framebuffer.\n");
252 return PTR_ERR(helper->fb);
253 }
254
255 return exynos_drm_fbdev_update(helper, helper->fb);
256}
257
258static int exynos_drm_fbdev_probe(struct drm_fb_helper *helper, 198static int exynos_drm_fbdev_probe(struct drm_fb_helper *helper,
259 struct drm_fb_helper_surface_size *sizes) 199 struct drm_fb_helper_surface_size *sizes)
260{ 200{
@@ -262,6 +202,10 @@ static int exynos_drm_fbdev_probe(struct drm_fb_helper *helper,
262 202
263 DRM_DEBUG_KMS("%s\n", __FILE__); 203 DRM_DEBUG_KMS("%s\n", __FILE__);
264 204
205 /*
206 * with !helper->fb, it means that this funcion is called first time
207 * and after that, the helper->fb would be used as clone mode.
208 */
265 if (!helper->fb) { 209 if (!helper->fb) {
266 ret = exynos_drm_fbdev_create(helper, sizes); 210 ret = exynos_drm_fbdev_create(helper, sizes);
267 if (ret < 0) { 211 if (ret < 0) {
@@ -274,12 +218,6 @@ static int exynos_drm_fbdev_probe(struct drm_fb_helper *helper,
274 * because register_framebuffer() should be called. 218 * because register_framebuffer() should be called.
275 */ 219 */
276 ret = 1; 220 ret = 1;
277 } else {
278 ret = exynos_drm_fbdev_recreate(helper, sizes);
279 if (ret < 0) {
280 DRM_ERROR("failed to reconfigure fbdev\n");
281 return ret;
282 }
283 } 221 }
284 222
285 return ret; 223 return ret;
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index b6a737d196ae..0dbb32bb18a3 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -604,7 +604,12 @@ static void fimd_finish_pageflip(struct drm_device *drm_dev, int crtc)
604 } 604 }
605 605
606 if (is_checked) { 606 if (is_checked) {
607 drm_vblank_put(drm_dev, crtc); 607 /*
608 * call drm_vblank_put only in case that drm_vblank_get was
609 * called.
610 */
611 if (atomic_read(&drm_dev->vblank_refcount[crtc]) > 0)
612 drm_vblank_put(drm_dev, crtc);
608 613
609 /* 614 /*
610 * don't off vblank if vblank_disable_allowed is 1, 615 * don't off vblank if vblank_disable_allowed is 1,
diff --git a/drivers/gpu/drm/exynos/exynos_mixer.c b/drivers/gpu/drm/exynos/exynos_mixer.c
index ac24cff39775..93846e810e38 100644
--- a/drivers/gpu/drm/exynos/exynos_mixer.c
+++ b/drivers/gpu/drm/exynos/exynos_mixer.c
@@ -712,7 +712,12 @@ static void mixer_finish_pageflip(struct drm_device *drm_dev, int crtc)
712 } 712 }
713 713
714 if (is_checked) 714 if (is_checked)
715 drm_vblank_put(drm_dev, crtc); 715 /*
716 * call drm_vblank_put only in case that drm_vblank_get was
717 * called.
718 */
719 if (atomic_read(&drm_dev->vblank_refcount[crtc]) > 0)
720 drm_vblank_put(drm_dev, crtc);
716 721
717 spin_unlock_irqrestore(&drm_dev->event_lock, flags); 722 spin_unlock_irqrestore(&drm_dev->event_lock, flags);
718} 723}
@@ -779,15 +784,15 @@ static void mixer_win_reset(struct mixer_context *ctx)
779 mixer_reg_writemask(res, MXR_STATUS, MXR_STATUS_16_BURST, 784 mixer_reg_writemask(res, MXR_STATUS, MXR_STATUS_16_BURST,
780 MXR_STATUS_BURST_MASK); 785 MXR_STATUS_BURST_MASK);
781 786
782 /* setting default layer priority: layer1 > video > layer0 787 /* setting default layer priority: layer1 > layer0 > video
783 * because typical usage scenario would be 788 * because typical usage scenario would be
789 * layer1 - OSD
784 * layer0 - framebuffer 790 * layer0 - framebuffer
785 * video - video overlay 791 * video - video overlay
786 * layer1 - OSD
787 */ 792 */
788 val = MXR_LAYER_CFG_GRP0_VAL(1); 793 val = MXR_LAYER_CFG_GRP1_VAL(3);
789 val |= MXR_LAYER_CFG_VP_VAL(2); 794 val |= MXR_LAYER_CFG_GRP0_VAL(2);
790 val |= MXR_LAYER_CFG_GRP1_VAL(3); 795 val |= MXR_LAYER_CFG_VP_VAL(1);
791 mixer_reg_write(res, MXR_LAYER_CFG, val); 796 mixer_reg_write(res, MXR_LAYER_CFG, val);
792 797
793 /* setting background color */ 798 /* setting background color */
@@ -1044,7 +1049,7 @@ static int mixer_remove(struct platform_device *pdev)
1044 platform_get_drvdata(pdev); 1049 platform_get_drvdata(pdev);
1045 struct mixer_context *ctx = (struct mixer_context *)drm_hdmi_ctx->ctx; 1050 struct mixer_context *ctx = (struct mixer_context *)drm_hdmi_ctx->ctx;
1046 1051
1047 dev_info(dev, "remove sucessful\n"); 1052 dev_info(dev, "remove successful\n");
1048 1053
1049 mixer_resource_poweroff(ctx); 1054 mixer_resource_poweroff(ctx);
1050 mixer_resources_cleanup(ctx); 1055 mixer_resources_cleanup(ctx);
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index c3afb783cb9d..03c53fcf8653 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -3028,6 +3028,20 @@
3028#define DISP_TILE_SURFACE_SWIZZLING (1<<13) 3028#define DISP_TILE_SURFACE_SWIZZLING (1<<13)
3029#define DISP_FBC_WM_DIS (1<<15) 3029#define DISP_FBC_WM_DIS (1<<15)
3030 3030
3031/* GEN7 chicken */
3032#define GEN7_COMMON_SLICE_CHICKEN1 0x7010
3033# define GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC ((1<<10) | (1<<26))
3034
3035#define GEN7_L3CNTLREG1 0xB01C
3036#define GEN7_WA_FOR_GEN7_L3_CONTROL 0x3C4FFF8C
3037
3038#define GEN7_L3_CHICKEN_MODE_REGISTER 0xB030
3039#define GEN7_WA_L3_CHICKEN_MODE 0x20000000
3040
3041/* WaCatErrorRejectionIssue */
3042#define GEN7_SQ_CHICKEN_MBCUNIT_CONFIG 0x9030
3043#define GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB (1<<11)
3044
3031/* PCH */ 3045/* PCH */
3032 3046
3033/* south display engine interrupt */ 3047/* south display engine interrupt */
@@ -3618,6 +3632,7 @@
3618#define GT_FIFO_NUM_RESERVED_ENTRIES 20 3632#define GT_FIFO_NUM_RESERVED_ENTRIES 20
3619 3633
3620#define GEN6_UCGCTL2 0x9404 3634#define GEN6_UCGCTL2 0x9404
3635# define GEN6_RCZUNIT_CLOCK_GATE_DISABLE (1 << 13)
3621# define GEN6_RCPBUNIT_CLOCK_GATE_DISABLE (1 << 12) 3636# define GEN6_RCPBUNIT_CLOCK_GATE_DISABLE (1 << 12)
3622# define GEN6_RCCUNIT_CLOCK_GATE_DISABLE (1 << 11) 3637# define GEN6_RCCUNIT_CLOCK_GATE_DISABLE (1 << 11)
3623 3638
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index b3b51c43dad0..f425b23e3803 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1872,7 +1872,7 @@ static void intel_update_fbc(struct drm_device *dev)
1872 if (enable_fbc < 0) { 1872 if (enable_fbc < 0) {
1873 DRM_DEBUG_KMS("fbc set to per-chip default\n"); 1873 DRM_DEBUG_KMS("fbc set to per-chip default\n");
1874 enable_fbc = 1; 1874 enable_fbc = 1;
1875 if (INTEL_INFO(dev)->gen <= 5) 1875 if (INTEL_INFO(dev)->gen <= 6)
1876 enable_fbc = 0; 1876 enable_fbc = 0;
1877 } 1877 }
1878 if (!enable_fbc) { 1878 if (!enable_fbc) {
@@ -5307,6 +5307,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
5307 } 5307 }
5308 } 5308 }
5309 5309
5310 pipeconf &= ~PIPECONF_INTERLACE_MASK;
5310 if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) { 5311 if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
5311 pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION; 5312 pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
5312 /* the chip adds 2 halflines automatically */ 5313 /* the chip adds 2 halflines automatically */
@@ -5317,7 +5318,7 @@ static int i9xx_crtc_mode_set(struct drm_crtc *crtc,
5317 adjusted_mode->crtc_vsync_end -= 1; 5318 adjusted_mode->crtc_vsync_end -= 1;
5318 adjusted_mode->crtc_vsync_start -= 1; 5319 adjusted_mode->crtc_vsync_start -= 1;
5319 } else 5320 } else
5320 pipeconf &= ~PIPECONF_INTERLACE_MASK; /* progressive */ 5321 pipeconf |= PIPECONF_PROGRESSIVE;
5321 5322
5322 I915_WRITE(HTOTAL(pipe), 5323 I915_WRITE(HTOTAL(pipe),
5323 (adjusted_mode->crtc_hdisplay - 1) | 5324 (adjusted_mode->crtc_hdisplay - 1) |
@@ -5902,6 +5903,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
5902 } 5903 }
5903 } 5904 }
5904 5905
5906 pipeconf &= ~PIPECONF_INTERLACE_MASK;
5905 if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) { 5907 if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
5906 pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION; 5908 pipeconf |= PIPECONF_INTERLACE_W_FIELD_INDICATION;
5907 /* the chip adds 2 halflines automatically */ 5909 /* the chip adds 2 halflines automatically */
@@ -5912,7 +5914,7 @@ static int ironlake_crtc_mode_set(struct drm_crtc *crtc,
5912 adjusted_mode->crtc_vsync_end -= 1; 5914 adjusted_mode->crtc_vsync_end -= 1;
5913 adjusted_mode->crtc_vsync_start -= 1; 5915 adjusted_mode->crtc_vsync_start -= 1;
5914 } else 5916 } else
5915 pipeconf &= ~PIPECONF_INTERLACE_W_FIELD_INDICATION; /* progressive */ 5917 pipeconf |= PIPECONF_PROGRESSIVE;
5916 5918
5917 I915_WRITE(HTOTAL(pipe), 5919 I915_WRITE(HTOTAL(pipe),
5918 (adjusted_mode->crtc_hdisplay - 1) | 5920 (adjusted_mode->crtc_hdisplay - 1) |
@@ -8182,8 +8184,8 @@ void gen6_enable_rps(struct drm_i915_private *dev_priv)
8182 I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */ 8184 I915_WRITE(GEN6_RC6pp_THRESHOLD, 64000); /* unused */
8183 8185
8184 if (intel_enable_rc6(dev_priv->dev)) 8186 if (intel_enable_rc6(dev_priv->dev))
8185 rc6_mask = GEN6_RC_CTL_RC6p_ENABLE | 8187 rc6_mask = GEN6_RC_CTL_RC6_ENABLE |
8186 GEN6_RC_CTL_RC6_ENABLE; 8188 (IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0;
8187 8189
8188 I915_WRITE(GEN6_RC_CONTROL, 8190 I915_WRITE(GEN6_RC_CONTROL,
8189 rc6_mask | 8191 rc6_mask |
@@ -8461,12 +8463,32 @@ static void ivybridge_init_clock_gating(struct drm_device *dev)
8461 I915_WRITE(WM2_LP_ILK, 0); 8463 I915_WRITE(WM2_LP_ILK, 0);
8462 I915_WRITE(WM1_LP_ILK, 0); 8464 I915_WRITE(WM1_LP_ILK, 0);
8463 8465
8466 /* According to the spec, bit 13 (RCZUNIT) must be set on IVB.
8467 * This implements the WaDisableRCZUnitClockGating workaround.
8468 */
8469 I915_WRITE(GEN6_UCGCTL2, GEN6_RCZUNIT_CLOCK_GATE_DISABLE);
8470
8464 I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE); 8471 I915_WRITE(ILK_DSPCLK_GATE, IVB_VRHUNIT_CLK_GATE);
8465 8472
8466 I915_WRITE(IVB_CHICKEN3, 8473 I915_WRITE(IVB_CHICKEN3,
8467 CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE | 8474 CHICKEN3_DGMG_REQ_OUT_FIX_DISABLE |
8468 CHICKEN3_DGMG_DONE_FIX_DISABLE); 8475 CHICKEN3_DGMG_DONE_FIX_DISABLE);
8469 8476
8477 /* Apply the WaDisableRHWOOptimizationForRenderHang workaround. */
8478 I915_WRITE(GEN7_COMMON_SLICE_CHICKEN1,
8479 GEN7_CSC1_RHWO_OPT_DISABLE_IN_RCC);
8480
8481 /* WaApplyL3ControlAndL3ChickenMode requires those two on Ivy Bridge */
8482 I915_WRITE(GEN7_L3CNTLREG1,
8483 GEN7_WA_FOR_GEN7_L3_CONTROL);
8484 I915_WRITE(GEN7_L3_CHICKEN_MODE_REGISTER,
8485 GEN7_WA_L3_CHICKEN_MODE);
8486
8487 /* This is required by WaCatErrorRejectionIssue */
8488 I915_WRITE(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG,
8489 I915_READ(GEN7_SQ_CHICKEN_MBCUNIT_CONFIG) |
8490 GEN7_SQ_CHICKEN_MBCUNIT_SQINTMOB);
8491
8470 for_each_pipe(pipe) { 8492 for_each_pipe(pipe) {
8471 I915_WRITE(DSPCNTR(pipe), 8493 I915_WRITE(DSPCNTR(pipe),
8472 I915_READ(DSPCNTR(pipe)) | 8494 I915_READ(DSPCNTR(pipe)) |
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index db3b461ad412..94f860cce3f7 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -208,17 +208,8 @@ intel_dp_link_clock(uint8_t link_bw)
208 */ 208 */
209 209
210static int 210static int
211intel_dp_link_required(struct intel_dp *intel_dp, int pixel_clock, int check_bpp) 211intel_dp_link_required(int pixel_clock, int bpp)
212{ 212{
213 struct drm_crtc *crtc = intel_dp->base.base.crtc;
214 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
215 int bpp = 24;
216
217 if (check_bpp)
218 bpp = check_bpp;
219 else if (intel_crtc)
220 bpp = intel_crtc->bpp;
221
222 return (pixel_clock * bpp + 9) / 10; 213 return (pixel_clock * bpp + 9) / 10;
223} 214}
224 215
@@ -245,12 +236,11 @@ intel_dp_mode_valid(struct drm_connector *connector,
245 return MODE_PANEL; 236 return MODE_PANEL;
246 } 237 }
247 238
248 mode_rate = intel_dp_link_required(intel_dp, mode->clock, 0); 239 mode_rate = intel_dp_link_required(mode->clock, 24);
249 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes); 240 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes);
250 241
251 if (mode_rate > max_rate) { 242 if (mode_rate > max_rate) {
252 mode_rate = intel_dp_link_required(intel_dp, 243 mode_rate = intel_dp_link_required(mode->clock, 18);
253 mode->clock, 18);
254 if (mode_rate > max_rate) 244 if (mode_rate > max_rate)
255 return MODE_CLOCK_HIGH; 245 return MODE_CLOCK_HIGH;
256 else 246 else
@@ -683,7 +673,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
683 int lane_count, clock; 673 int lane_count, clock;
684 int max_lane_count = intel_dp_max_lane_count(intel_dp); 674 int max_lane_count = intel_dp_max_lane_count(intel_dp);
685 int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0; 675 int max_clock = intel_dp_max_link_bw(intel_dp) == DP_LINK_BW_2_7 ? 1 : 0;
686 int bpp = mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 0; 676 int bpp = mode->private_flags & INTEL_MODE_DP_FORCE_6BPC ? 18 : 24;
687 static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 }; 677 static int bws[2] = { DP_LINK_BW_1_62, DP_LINK_BW_2_7 };
688 678
689 if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) { 679 if (is_edp(intel_dp) && intel_dp->panel_fixed_mode) {
@@ -701,7 +691,7 @@ intel_dp_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
701 for (clock = 0; clock <= max_clock; clock++) { 691 for (clock = 0; clock <= max_clock; clock++) {
702 int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count); 692 int link_avail = intel_dp_max_data_rate(intel_dp_link_clock(bws[clock]), lane_count);
703 693
704 if (intel_dp_link_required(intel_dp, mode->clock, bpp) 694 if (intel_dp_link_required(mode->clock, bpp)
705 <= link_avail) { 695 <= link_avail) {
706 intel_dp->link_bw = bws[clock]; 696 intel_dp->link_bw = bws[clock];
707 intel_dp->lane_count = lane_count; 697 intel_dp->lane_count = lane_count;
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 798f6e1aa544..aa84832b0e1a 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -694,6 +694,14 @@ static const struct dmi_system_id intel_no_lvds[] = {
694 }, 694 },
695 { 695 {
696 .callback = intel_no_lvds_dmi_callback, 696 .callback = intel_no_lvds_dmi_callback,
697 .ident = "AOpen i45GMx-I",
698 .matches = {
699 DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"),
700 DMI_MATCH(DMI_BOARD_NAME, "i45GMx-I"),
701 },
702 },
703 {
704 .callback = intel_no_lvds_dmi_callback,
697 .ident = "Aopen i945GTt-VFA", 705 .ident = "Aopen i945GTt-VFA",
698 .matches = { 706 .matches = {
699 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), 707 DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"),
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index ae09fe82afbc..f58254a3fb01 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3191,6 +3191,7 @@ static int evergreen_startup(struct radeon_device *rdev)
3191 if (r) { 3191 if (r) {
3192 DRM_ERROR("radeon: failed testing IB (%d).\n", r); 3192 DRM_ERROR("radeon: failed testing IB (%d).\n", r);
3193 rdev->accel_working = false; 3193 rdev->accel_working = false;
3194 return r;
3194 } 3195 }
3195 3196
3196 r = r600_audio_init(rdev); 3197 r = r600_audio_init(rdev);
@@ -3222,6 +3223,7 @@ int evergreen_resume(struct radeon_device *rdev)
3222 r = evergreen_startup(rdev); 3223 r = evergreen_startup(rdev);
3223 if (r) { 3224 if (r) {
3224 DRM_ERROR("evergreen startup failed on resume\n"); 3225 DRM_ERROR("evergreen startup failed on resume\n");
3226 rdev->accel_working = false;
3225 return r; 3227 return r;
3226 } 3228 }
3227 3229
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index db09065e68fd..2509c505acb8 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1547,6 +1547,7 @@ int cayman_resume(struct radeon_device *rdev)
1547 r = cayman_startup(rdev); 1547 r = cayman_startup(rdev);
1548 if (r) { 1548 if (r) {
1549 DRM_ERROR("cayman startup failed on resume\n"); 1549 DRM_ERROR("cayman startup failed on resume\n");
1550 rdev->accel_working = false;
1550 return r; 1551 return r;
1551 } 1552 }
1552 return r; 1553 return r;
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index bfd36ab643a6..333cde9d4e7b 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -789,9 +789,7 @@ int r100_irq_process(struct radeon_device *rdev)
789 WREG32(RADEON_AIC_CNTL, msi_rearm | RS400_MSI_REARM); 789 WREG32(RADEON_AIC_CNTL, msi_rearm | RS400_MSI_REARM);
790 break; 790 break;
791 default: 791 default:
792 msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN; 792 WREG32(RADEON_MSI_REARM_EN, RV370_MSI_REARM_EN);
793 WREG32(RADEON_MSI_REARM_EN, msi_rearm);
794 WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN);
795 break; 793 break;
796 } 794 }
797 } 795 }
@@ -3930,6 +3928,8 @@ static int r100_startup(struct radeon_device *rdev)
3930 3928
3931int r100_resume(struct radeon_device *rdev) 3929int r100_resume(struct radeon_device *rdev)
3932{ 3930{
3931 int r;
3932
3933 /* Make sur GART are not working */ 3933 /* Make sur GART are not working */
3934 if (rdev->flags & RADEON_IS_PCI) 3934 if (rdev->flags & RADEON_IS_PCI)
3935 r100_pci_gart_disable(rdev); 3935 r100_pci_gart_disable(rdev);
@@ -3949,7 +3949,11 @@ int r100_resume(struct radeon_device *rdev)
3949 radeon_surface_init(rdev); 3949 radeon_surface_init(rdev);
3950 3950
3951 rdev->accel_working = true; 3951 rdev->accel_working = true;
3952 return r100_startup(rdev); 3952 r = r100_startup(rdev);
3953 if (r) {
3954 rdev->accel_working = false;
3955 }
3956 return r;
3953} 3957}
3954 3958
3955int r100_suspend(struct radeon_device *rdev) 3959int r100_suspend(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 3fc0d29a5f39..6829638cca40 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -1431,6 +1431,8 @@ static int r300_startup(struct radeon_device *rdev)
1431 1431
1432int r300_resume(struct radeon_device *rdev) 1432int r300_resume(struct radeon_device *rdev)
1433{ 1433{
1434 int r;
1435
1434 /* Make sur GART are not working */ 1436 /* Make sur GART are not working */
1435 if (rdev->flags & RADEON_IS_PCIE) 1437 if (rdev->flags & RADEON_IS_PCIE)
1436 rv370_pcie_gart_disable(rdev); 1438 rv370_pcie_gart_disable(rdev);
@@ -1452,7 +1454,11 @@ int r300_resume(struct radeon_device *rdev)
1452 radeon_surface_init(rdev); 1454 radeon_surface_init(rdev);
1453 1455
1454 rdev->accel_working = true; 1456 rdev->accel_working = true;
1455 return r300_startup(rdev); 1457 r = r300_startup(rdev);
1458 if (r) {
1459 rdev->accel_working = false;
1460 }
1461 return r;
1456} 1462}
1457 1463
1458int r300_suspend(struct radeon_device *rdev) 1464int r300_suspend(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index 666e28fe509c..b14323053bad 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -291,6 +291,8 @@ static int r420_startup(struct radeon_device *rdev)
291 291
292int r420_resume(struct radeon_device *rdev) 292int r420_resume(struct radeon_device *rdev)
293{ 293{
294 int r;
295
294 /* Make sur GART are not working */ 296 /* Make sur GART are not working */
295 if (rdev->flags & RADEON_IS_PCIE) 297 if (rdev->flags & RADEON_IS_PCIE)
296 rv370_pcie_gart_disable(rdev); 298 rv370_pcie_gart_disable(rdev);
@@ -316,7 +318,11 @@ int r420_resume(struct radeon_device *rdev)
316 radeon_surface_init(rdev); 318 radeon_surface_init(rdev);
317 319
318 rdev->accel_working = true; 320 rdev->accel_working = true;
319 return r420_startup(rdev); 321 r = r420_startup(rdev);
322 if (r) {
323 rdev->accel_working = false;
324 }
325 return r;
320} 326}
321 327
322int r420_suspend(struct radeon_device *rdev) 328int r420_suspend(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index 4ae1615e752f..25084e824dbc 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -218,6 +218,8 @@ static int r520_startup(struct radeon_device *rdev)
218 218
219int r520_resume(struct radeon_device *rdev) 219int r520_resume(struct radeon_device *rdev)
220{ 220{
221 int r;
222
221 /* Make sur GART are not working */ 223 /* Make sur GART are not working */
222 if (rdev->flags & RADEON_IS_PCIE) 224 if (rdev->flags & RADEON_IS_PCIE)
223 rv370_pcie_gart_disable(rdev); 225 rv370_pcie_gart_disable(rdev);
@@ -237,7 +239,11 @@ int r520_resume(struct radeon_device *rdev)
237 radeon_surface_init(rdev); 239 radeon_surface_init(rdev);
238 240
239 rdev->accel_working = true; 241 rdev->accel_working = true;
240 return r520_startup(rdev); 242 r = r520_startup(rdev);
243 if (r) {
244 rdev->accel_working = false;
245 }
246 return r;
241} 247}
242 248
243int r520_init(struct radeon_device *rdev) 249int r520_init(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 4f08e5e6ee9d..fbcd84803b60 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2529,6 +2529,7 @@ int r600_resume(struct radeon_device *rdev)
2529 r = r600_startup(rdev); 2529 r = r600_startup(rdev);
2530 if (r) { 2530 if (r) {
2531 DRM_ERROR("r600 startup failed on resume\n"); 2531 DRM_ERROR("r600 startup failed on resume\n");
2532 rdev->accel_working = false;
2532 return r; 2533 return r;
2533 } 2534 }
2534 2535
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 5082d17d14dc..1f53ae74ada1 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -2931,6 +2931,20 @@ radeon_atombios_connected_scratch_regs(struct drm_connector *connector,
2931 bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP5; 2931 bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP5;
2932 } 2932 }
2933 } 2933 }
2934 if ((radeon_encoder->devices & ATOM_DEVICE_DFP6_SUPPORT) &&
2935 (radeon_connector->devices & ATOM_DEVICE_DFP6_SUPPORT)) {
2936 if (connected) {
2937 DRM_DEBUG_KMS("DFP6 connected\n");
2938 bios_0_scratch |= ATOM_S0_DFP6;
2939 bios_3_scratch |= ATOM_S3_DFP6_ACTIVE;
2940 bios_6_scratch |= ATOM_S6_ACC_REQ_DFP6;
2941 } else {
2942 DRM_DEBUG_KMS("DFP6 disconnected\n");
2943 bios_0_scratch &= ~ATOM_S0_DFP6;
2944 bios_3_scratch &= ~ATOM_S3_DFP6_ACTIVE;
2945 bios_6_scratch &= ~ATOM_S6_ACC_REQ_DFP6;
2946 }
2947 }
2934 2948
2935 if (rdev->family >= CHIP_R600) { 2949 if (rdev->family >= CHIP_R600) {
2936 WREG32(R600_BIOS_0_SCRATCH, bios_0_scratch); 2950 WREG32(R600_BIOS_0_SCRATCH, bios_0_scratch);
@@ -2951,6 +2965,9 @@ radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc)
2951 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 2965 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
2952 uint32_t bios_3_scratch; 2966 uint32_t bios_3_scratch;
2953 2967
2968 if (ASIC_IS_DCE4(rdev))
2969 return;
2970
2954 if (rdev->family >= CHIP_R600) 2971 if (rdev->family >= CHIP_R600)
2955 bios_3_scratch = RREG32(R600_BIOS_3_SCRATCH); 2972 bios_3_scratch = RREG32(R600_BIOS_3_SCRATCH);
2956 else 2973 else
@@ -3003,6 +3020,9 @@ radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on)
3003 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 3020 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
3004 uint32_t bios_2_scratch; 3021 uint32_t bios_2_scratch;
3005 3022
3023 if (ASIC_IS_DCE4(rdev))
3024 return;
3025
3006 if (rdev->family >= CHIP_R600) 3026 if (rdev->family >= CHIP_R600)
3007 bios_2_scratch = RREG32(R600_BIOS_2_SCRATCH); 3027 bios_2_scratch = RREG32(R600_BIOS_2_SCRATCH);
3008 else 3028 else
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c
index 435a3d970ab8..e64bec488ed8 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -453,6 +453,10 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
453 int r; 453 int r;
454 454
455 radeon_mutex_lock(&rdev->cs_mutex); 455 radeon_mutex_lock(&rdev->cs_mutex);
456 if (!rdev->accel_working) {
457 radeon_mutex_unlock(&rdev->cs_mutex);
458 return -EBUSY;
459 }
456 /* initialize parser */ 460 /* initialize parser */
457 memset(&parser, 0, sizeof(struct radeon_cs_parser)); 461 memset(&parser, 0, sizeof(struct radeon_cs_parser));
458 parser.filp = filp; 462 parser.filp = filp;
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c
index 64ea3dd9e6ff..4bd36a354fbe 100644
--- a/drivers/gpu/drm/radeon/radeon_fence.c
+++ b/drivers/gpu/drm/radeon/radeon_fence.c
@@ -364,8 +364,10 @@ int radeon_fence_count_emitted(struct radeon_device *rdev, int ring)
364 int not_processed = 0; 364 int not_processed = 0;
365 365
366 read_lock_irqsave(&rdev->fence_lock, irq_flags); 366 read_lock_irqsave(&rdev->fence_lock, irq_flags);
367 if (!rdev->fence_drv[ring].initialized) 367 if (!rdev->fence_drv[ring].initialized) {
368 read_unlock_irqrestore(&rdev->fence_lock, irq_flags);
368 return 0; 369 return 0;
370 }
369 371
370 if (!list_empty(&rdev->fence_drv[ring].emitted)) { 372 if (!list_empty(&rdev->fence_drv[ring].emitted)) {
371 struct list_head *ptr; 373 struct list_head *ptr;
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c
index 30a4c5014c8b..92c9ea4751fb 100644
--- a/drivers/gpu/drm/radeon/radeon_ring.c
+++ b/drivers/gpu/drm/radeon/radeon_ring.c
@@ -500,8 +500,11 @@ static char radeon_debugfs_ib_names[RADEON_IB_POOL_SIZE][32];
500int radeon_debugfs_ring_init(struct radeon_device *rdev) 500int radeon_debugfs_ring_init(struct radeon_device *rdev)
501{ 501{
502#if defined(CONFIG_DEBUG_FS) 502#if defined(CONFIG_DEBUG_FS)
503 return radeon_debugfs_add_files(rdev, radeon_debugfs_ring_info_list, 503 if (rdev->family >= CHIP_CAYMAN)
504 ARRAY_SIZE(radeon_debugfs_ring_info_list)); 504 return radeon_debugfs_add_files(rdev, radeon_debugfs_ring_info_list,
505 ARRAY_SIZE(radeon_debugfs_ring_info_list));
506 else
507 return radeon_debugfs_add_files(rdev, radeon_debugfs_ring_info_list, 1);
505#else 508#else
506 return 0; 509 return 0;
507#endif 510#endif
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index b0ce84a20a68..866a05be75f2 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -442,6 +442,8 @@ static int rs400_startup(struct radeon_device *rdev)
442 442
443int rs400_resume(struct radeon_device *rdev) 443int rs400_resume(struct radeon_device *rdev)
444{ 444{
445 int r;
446
445 /* Make sur GART are not working */ 447 /* Make sur GART are not working */
446 rs400_gart_disable(rdev); 448 rs400_gart_disable(rdev);
447 /* Resume clock before doing reset */ 449 /* Resume clock before doing reset */
@@ -462,7 +464,11 @@ int rs400_resume(struct radeon_device *rdev)
462 radeon_surface_init(rdev); 464 radeon_surface_init(rdev);
463 465
464 rdev->accel_working = true; 466 rdev->accel_working = true;
465 return rs400_startup(rdev); 467 r = rs400_startup(rdev);
468 if (r) {
469 rdev->accel_working = false;
470 }
471 return r;
466} 472}
467 473
468int rs400_suspend(struct radeon_device *rdev) 474int rs400_suspend(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index ec46eb45e34c..4fc700684dcd 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -684,9 +684,7 @@ int rs600_irq_process(struct radeon_device *rdev)
684 WREG32(RADEON_BUS_CNTL, msi_rearm | RS600_MSI_REARM); 684 WREG32(RADEON_BUS_CNTL, msi_rearm | RS600_MSI_REARM);
685 break; 685 break;
686 default: 686 default:
687 msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN; 687 WREG32(RADEON_MSI_REARM_EN, RV370_MSI_REARM_EN);
688 WREG32(RADEON_MSI_REARM_EN, msi_rearm);
689 WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN);
690 break; 688 break;
691 } 689 }
692 } 690 }
@@ -878,6 +876,8 @@ static int rs600_startup(struct radeon_device *rdev)
878 876
879int rs600_resume(struct radeon_device *rdev) 877int rs600_resume(struct radeon_device *rdev)
880{ 878{
879 int r;
880
881 /* Make sur GART are not working */ 881 /* Make sur GART are not working */
882 rs600_gart_disable(rdev); 882 rs600_gart_disable(rdev);
883 /* Resume clock before doing reset */ 883 /* Resume clock before doing reset */
@@ -896,7 +896,11 @@ int rs600_resume(struct radeon_device *rdev)
896 radeon_surface_init(rdev); 896 radeon_surface_init(rdev);
897 897
898 rdev->accel_working = true; 898 rdev->accel_working = true;
899 return rs600_startup(rdev); 899 r = rs600_startup(rdev);
900 if (r) {
901 rdev->accel_working = false;
902 }
903 return r;
900} 904}
901 905
902int rs600_suspend(struct radeon_device *rdev) 906int rs600_suspend(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 4f24a0fa8c82..f68dff2fadcb 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -659,6 +659,8 @@ static int rs690_startup(struct radeon_device *rdev)
659 659
660int rs690_resume(struct radeon_device *rdev) 660int rs690_resume(struct radeon_device *rdev)
661{ 661{
662 int r;
663
662 /* Make sur GART are not working */ 664 /* Make sur GART are not working */
663 rs400_gart_disable(rdev); 665 rs400_gart_disable(rdev);
664 /* Resume clock before doing reset */ 666 /* Resume clock before doing reset */
@@ -677,7 +679,11 @@ int rs690_resume(struct radeon_device *rdev)
677 radeon_surface_init(rdev); 679 radeon_surface_init(rdev);
678 680
679 rdev->accel_working = true; 681 rdev->accel_working = true;
680 return rs690_startup(rdev); 682 r = rs690_startup(rdev);
683 if (r) {
684 rdev->accel_working = false;
685 }
686 return r;
681} 687}
682 688
683int rs690_suspend(struct radeon_device *rdev) 689int rs690_suspend(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 880637fd1946..959bf4483bea 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -424,6 +424,8 @@ static int rv515_startup(struct radeon_device *rdev)
424 424
425int rv515_resume(struct radeon_device *rdev) 425int rv515_resume(struct radeon_device *rdev)
426{ 426{
427 int r;
428
427 /* Make sur GART are not working */ 429 /* Make sur GART are not working */
428 if (rdev->flags & RADEON_IS_PCIE) 430 if (rdev->flags & RADEON_IS_PCIE)
429 rv370_pcie_gart_disable(rdev); 431 rv370_pcie_gart_disable(rdev);
@@ -443,7 +445,11 @@ int rv515_resume(struct radeon_device *rdev)
443 radeon_surface_init(rdev); 445 radeon_surface_init(rdev);
444 446
445 rdev->accel_working = true; 447 rdev->accel_working = true;
446 return rv515_startup(rdev); 448 r = rv515_startup(rdev);
449 if (r) {
450 rdev->accel_working = false;
451 }
452 return r;
447} 453}
448 454
449int rv515_suspend(struct radeon_device *rdev) 455int rv515_suspend(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index a1668b659ddd..c049c0c51841 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -1139,6 +1139,7 @@ int rv770_resume(struct radeon_device *rdev)
1139 r = rv770_startup(rdev); 1139 r = rv770_startup(rdev);
1140 if (r) { 1140 if (r) {
1141 DRM_ERROR("r600 startup failed on resume\n"); 1141 DRM_ERROR("r600 startup failed on resume\n");
1142 rdev->accel_working = false;
1142 return r; 1143 return r;
1143 } 1144 }
1144 1145