diff options
author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2013-06-14 07:02:53 -0400 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-07-01 05:14:52 -0400 |
commit | 4abb2c39811eb81a653461d5ed8c75c528cb2245 (patch) | |
tree | 01b76797ae69c391a2ab4c61c6f139020da42ba6 /drivers/gpu/drm | |
parent | 99750bd46f6ad3816fe2045a34fac432114c8196 (diff) |
drm/i915: s/LFP/LPF in DPIO PLL register names
LPF is short for "low pass filter".
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/i915/i915_debugfs.c | 8 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 4 |
3 files changed, 9 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index f72d5a3fdfba..04cf6c09710a 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
@@ -1862,10 +1862,10 @@ static int i915_dpio_info(struct seq_file *m, void *data) | |||
1862 | seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n", | 1862 | seq_printf(m, "DPIO_CORE_CLK_B: 0x%08x\n", |
1863 | vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_B)); | 1863 | vlv_dpio_read(dev_priv, _DPIO_CORE_CLK_B)); |
1864 | 1864 | ||
1865 | seq_printf(m, "DPIO_LFP_COEFF_A: 0x%08x\n", | 1865 | seq_printf(m, "DPIO_LPF_COEFF_A: 0x%08x\n", |
1866 | vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_A)); | 1866 | vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_A)); |
1867 | seq_printf(m, "DPIO_LFP_COEFF_B: 0x%08x\n", | 1867 | seq_printf(m, "DPIO_LPF_COEFF_B: 0x%08x\n", |
1868 | vlv_dpio_read(dev_priv, _DPIO_LFP_COEFF_B)); | 1868 | vlv_dpio_read(dev_priv, _DPIO_LPF_COEFF_B)); |
1869 | 1869 | ||
1870 | seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n", | 1870 | seq_printf(m, "DPIO_FASTCLK_DISABLE: 0x%08x\n", |
1871 | vlv_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE)); | 1871 | vlv_dpio_read(dev_priv, DPIO_FASTCLK_DISABLE)); |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 137be4c1abd1..b6f1fd988df5 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -448,9 +448,9 @@ | |||
448 | #define _DPIO_PLL_CML_B 0x806c | 448 | #define _DPIO_PLL_CML_B 0x806c |
449 | #define DPIO_PLL_CML(pipe) _PIPE(pipe, _DPIO_PLL_CML_A, _DPIO_PLL_CML_B) | 449 | #define DPIO_PLL_CML(pipe) _PIPE(pipe, _DPIO_PLL_CML_A, _DPIO_PLL_CML_B) |
450 | 450 | ||
451 | #define _DPIO_LFP_COEFF_A 0x8048 | 451 | #define _DPIO_LPF_COEFF_A 0x8048 |
452 | #define _DPIO_LFP_COEFF_B 0x8068 | 452 | #define _DPIO_LPF_COEFF_B 0x8068 |
453 | #define DPIO_LFP_COEFF(pipe) _PIPE(pipe, _DPIO_LFP_COEFF_A, _DPIO_LFP_COEFF_B) | 453 | #define DPIO_LPF_COEFF(pipe) _PIPE(pipe, _DPIO_LPF_COEFF_A, _DPIO_LPF_COEFF_B) |
454 | 454 | ||
455 | #define DPIO_CALIBRATION 0x80ac | 455 | #define DPIO_CALIBRATION 0x80ac |
456 | 456 | ||
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 749d4282f5ad..85f3eb74d2b7 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -4406,10 +4406,10 @@ static void vlv_update_pll(struct intel_crtc *crtc) | |||
4406 | if (crtc->config.port_clock == 162000 || | 4406 | if (crtc->config.port_clock == 162000 || |
4407 | intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_ANALOG) || | 4407 | intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_ANALOG) || |
4408 | intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_HDMI)) | 4408 | intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_HDMI)) |
4409 | vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe), | 4409 | vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe), |
4410 | 0x005f0021); | 4410 | 0x005f0021); |
4411 | else | 4411 | else |
4412 | vlv_dpio_write(dev_priv, DPIO_LFP_COEFF(pipe), | 4412 | vlv_dpio_write(dev_priv, DPIO_LPF_COEFF(pipe), |
4413 | 0x00d0000f); | 4413 | 0x00d0000f); |
4414 | 4414 | ||
4415 | if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP) || | 4415 | if (intel_pipe_has_type(&crtc->base, INTEL_OUTPUT_EDP) || |