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authorDaniel Vetter <daniel.vetter@ffwll.ch>2014-01-10 02:50:12 -0500
committerDaniel Vetter <daniel.vetter@ffwll.ch>2014-01-10 04:28:28 -0500
commit3a77c4c441d2bcc2b1e27d8aabee0c57aed66ed3 (patch)
tree23a5066fd03c3f3b6d05014fc13906f098ab865d /drivers/gpu/drm
parent38af6096781e2ed3d83b970218dedfe98e2f8f9c (diff)
drm/i915: Drop I915_ prefix from HAS_FBC
My OCD just couldn't let this slide. Spotted while reviewing Ville's patch to only flip planes when we have FBC. Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/i915/i915_debugfs.c2
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h2
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c4
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c4
-rw-r--r--drivers/gpu/drm/i915/intel_display.c2
-rw-r--r--drivers/gpu/drm/i915/intel_pm.c4
6 files changed, 9 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 16e8e09bbdd6..95c92c8e55b3 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1295,7 +1295,7 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
1295 struct drm_device *dev = node->minor->dev; 1295 struct drm_device *dev = node->minor->dev;
1296 drm_i915_private_t *dev_priv = dev->dev_private; 1296 drm_i915_private_t *dev_priv = dev->dev_private;
1297 1297
1298 if (!I915_HAS_FBC(dev)) { 1298 if (!HAS_FBC(dev)) {
1299 seq_puts(m, "FBC unsupported on this chipset\n"); 1299 seq_puts(m, "FBC unsupported on this chipset\n");
1300 return 0; 1300 return 0;
1301 } 1301 }
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 88901e5e1b7a..cf7922bdf87c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -1844,7 +1844,7 @@ struct drm_i915_file_private {
1844 1844
1845#define HAS_FW_BLC(dev) (INTEL_INFO(dev)->gen > 2) 1845#define HAS_FW_BLC(dev) (INTEL_INFO(dev)->gen > 2)
1846#define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr) 1846#define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
1847#define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc) 1847#define HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
1848 1848
1849#define HAS_IPS(dev) (IS_ULT(dev) || IS_BROADWELL(dev)) 1849#define HAS_IPS(dev) (IS_ULT(dev) || IS_BROADWELL(dev))
1850 1850
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 158cb3077ed6..261254a8a385 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3220,7 +3220,7 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg)
3220 3220
3221 for_each_pipe(pipe) { 3221 for_each_pipe(pipe) {
3222 int plane = pipe; 3222 int plane = pipe;
3223 if (I915_HAS_FBC(dev)) 3223 if (HAS_FBC(dev))
3224 plane = !plane; 3224 plane = !plane;
3225 3225
3226 if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS && 3226 if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS &&
@@ -3421,7 +3421,7 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
3421 3421
3422 for_each_pipe(pipe) { 3422 for_each_pipe(pipe) {
3423 int plane = pipe; 3423 int plane = pipe;
3424 if (I915_HAS_FBC(dev)) 3424 if (HAS_FBC(dev))
3425 plane = !plane; 3425 plane = !plane;
3426 3426
3427 if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS && 3427 if (pipe_stats[pipe] & PIPE_VBLANK_INTERRUPT_STATUS &&
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index 6b8fef7fb3bb..8150fdc08d49 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -237,7 +237,7 @@ static void i915_save_display(struct drm_device *dev)
237 } 237 }
238 238
239 /* Only regfile.save FBC state on the platform that supports FBC */ 239 /* Only regfile.save FBC state on the platform that supports FBC */
240 if (I915_HAS_FBC(dev)) { 240 if (HAS_FBC(dev)) {
241 if (HAS_PCH_SPLIT(dev)) { 241 if (HAS_PCH_SPLIT(dev)) {
242 dev_priv->regfile.saveDPFC_CB_BASE = I915_READ(ILK_DPFC_CB_BASE); 242 dev_priv->regfile.saveDPFC_CB_BASE = I915_READ(ILK_DPFC_CB_BASE);
243 } else if (IS_GM45(dev)) { 243 } else if (IS_GM45(dev)) {
@@ -300,7 +300,7 @@ static void i915_restore_display(struct drm_device *dev)
300 300
301 /* only restore FBC info on the platform that supports FBC*/ 301 /* only restore FBC info on the platform that supports FBC*/
302 intel_disable_fbc(dev); 302 intel_disable_fbc(dev);
303 if (I915_HAS_FBC(dev)) { 303 if (HAS_FBC(dev)) {
304 if (HAS_PCH_SPLIT(dev)) { 304 if (HAS_PCH_SPLIT(dev)) {
305 I915_WRITE(ILK_DPFC_CB_BASE, dev_priv->regfile.saveDPFC_CB_BASE); 305 I915_WRITE(ILK_DPFC_CB_BASE, dev_priv->regfile.saveDPFC_CB_BASE);
306 } else if (IS_GM45(dev)) { 306 } else if (IS_GM45(dev)) {
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index dd064faccb27..c4d3f4391686 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -10169,7 +10169,7 @@ static void intel_crtc_init(struct drm_device *dev, int pipe)
10169 */ 10169 */
10170 intel_crtc->pipe = pipe; 10170 intel_crtc->pipe = pipe;
10171 intel_crtc->plane = pipe; 10171 intel_crtc->plane = pipe;
10172 if (I915_HAS_FBC(dev) && INTEL_INFO(dev)->gen < 4) { 10172 if (HAS_FBC(dev) && INTEL_INFO(dev)->gen < 4) {
10173 DRM_DEBUG_KMS("swapping pipes & planes for FBC\n"); 10173 DRM_DEBUG_KMS("swapping pipes & planes for FBC\n");
10174 intel_crtc->plane = !pipe; 10174 intel_crtc->plane = !pipe;
10175 } 10175 }
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 534459944d70..26e6d1b5363f 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -461,7 +461,7 @@ void intel_update_fbc(struct drm_device *dev)
461 const struct drm_display_mode *adjusted_mode; 461 const struct drm_display_mode *adjusted_mode;
462 unsigned int max_width, max_height; 462 unsigned int max_width, max_height;
463 463
464 if (!I915_HAS_FBC(dev)) { 464 if (!HAS_FBC(dev)) {
465 set_no_fbc_reason(dev_priv, FBC_UNSUPPORTED); 465 set_no_fbc_reason(dev_priv, FBC_UNSUPPORTED);
466 return; 466 return;
467 } 467 }
@@ -5541,7 +5541,7 @@ void intel_init_pm(struct drm_device *dev)
5541{ 5541{
5542 struct drm_i915_private *dev_priv = dev->dev_private; 5542 struct drm_i915_private *dev_priv = dev->dev_private;
5543 5543
5544 if (I915_HAS_FBC(dev)) { 5544 if (HAS_FBC(dev)) {
5545 if (INTEL_INFO(dev)->gen >= 7) { 5545 if (INTEL_INFO(dev)->gen >= 7) {
5546 dev_priv->display.fbc_enabled = ironlake_fbc_enabled; 5546 dev_priv->display.fbc_enabled = ironlake_fbc_enabled;
5547 dev_priv->display.enable_fbc = gen7_enable_fbc; 5547 dev_priv->display.enable_fbc = gen7_enable_fbc;