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authorBen Skeggs <bskeggs@redhat.com>2011-07-04 02:25:18 -0400
committerBen Skeggs <bskeggs@redhat.com>2011-09-20 02:05:54 -0400
commit26f6d88b32706058866a74ecd6600b84fb82d09a (patch)
tree50d47a7d05455981dc9099e56206d415d2cd885f /drivers/gpu/drm
parent02e4f5877dc7b963b3dd2beaf9664cf29c12d728 (diff)
drm/nvd0/disp: very initial evo setup
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r--drivers/gpu/drm/nouveau/Makefile1
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_drv.h5
-rw-r--r--drivers/gpu/drm/nouveau/nouveau_state.c6
-rw-r--r--drivers/gpu/drm/nouveau/nvd0_display.c170
4 files changed, 179 insertions, 3 deletions
diff --git a/drivers/gpu/drm/nouveau/Makefile b/drivers/gpu/drm/nouveau/Makefile
index f65ade6ba451..2f621aef97f8 100644
--- a/drivers/gpu/drm/nouveau/Makefile
+++ b/drivers/gpu/drm/nouveau/Makefile
@@ -28,6 +28,7 @@ nouveau-y := nouveau_drv.o nouveau_state.o nouveau_channel.o nouveau_mem.o \
28 nv04_dac.o nv04_dfp.o nv04_tv.o nv17_tv.o nv17_tv_modes.o \ 28 nv04_dac.o nv04_dfp.o nv04_tv.o nv17_tv.o nv17_tv_modes.o \
29 nv04_crtc.o nv04_display.o nv04_cursor.o \ 29 nv04_crtc.o nv04_display.o nv04_cursor.o \
30 nv04_fbcon.o nv50_fbcon.o nvc0_fbcon.o \ 30 nv04_fbcon.o nv50_fbcon.o nvc0_fbcon.o \
31 nvd0_display.o \
31 nv10_gpio.o nv50_gpio.o \ 32 nv10_gpio.o nv50_gpio.o \
32 nv50_calc.o \ 33 nv50_calc.o \
33 nv04_pm.o nv50_pm.o nva3_pm.o nvc0_pm.o \ 34 nv04_pm.o nv50_pm.o nva3_pm.o nvc0_pm.o \
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 6469ffee6fc0..e5d4e7d291bc 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -1281,6 +1281,11 @@ extern int nv04_display_create(struct drm_device *);
1281extern int nv04_display_init(struct drm_device *); 1281extern int nv04_display_init(struct drm_device *);
1282extern void nv04_display_destroy(struct drm_device *); 1282extern void nv04_display_destroy(struct drm_device *);
1283 1283
1284/* nvd0_display.c */
1285extern int nvd0_display_create(struct drm_device *);
1286extern int nvd0_display_init(struct drm_device *);
1287extern void nvd0_display_destroy(struct drm_device *);
1288
1284/* nv04_crtc.c */ 1289/* nv04_crtc.c */
1285extern int nv04_crtc_create(struct drm_device *, int index); 1290extern int nv04_crtc_create(struct drm_device *, int index);
1286 1291
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index c4802eb3f9aa..0c990d6256c4 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -456,9 +456,9 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
456 engine->fifo.unload_context = nvc0_fifo_unload_context; 456 engine->fifo.unload_context = nvc0_fifo_unload_context;
457 engine->display.early_init = nouveau_stub_init; 457 engine->display.early_init = nouveau_stub_init;
458 engine->display.late_takedown = nouveau_stub_takedown; 458 engine->display.late_takedown = nouveau_stub_takedown;
459 engine->display.create = nouveau_stub_init; 459 engine->display.create = nvd0_display_create;
460 engine->display.init = nouveau_stub_init; 460 engine->display.init = nvd0_display_init;
461 engine->display.destroy = nouveau_stub_takedown; 461 engine->display.destroy = nvd0_display_destroy;
462 engine->gpio.init = nv50_gpio_init; 462 engine->gpio.init = nv50_gpio_init;
463 engine->gpio.takedown = nouveau_stub_takedown; 463 engine->gpio.takedown = nouveau_stub_takedown;
464 engine->gpio.get = nvd0_gpio_get; 464 engine->gpio.get = nvd0_gpio_get;
diff --git a/drivers/gpu/drm/nouveau/nvd0_display.c b/drivers/gpu/drm/nouveau/nvd0_display.c
new file mode 100644
index 000000000000..6ce1529aaa34
--- /dev/null
+++ b/drivers/gpu/drm/nouveau/nvd0_display.c
@@ -0,0 +1,170 @@
1/*
2 * Copyright 2011 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include "drmP.h"
26
27#include "nouveau_drv.h"
28#include "nouveau_connector.h"
29#include "nouveau_encoder.h"
30#include "nouveau_crtc.h"
31
32struct nvd0_display {
33 struct nouveau_gpuobj *mem;
34};
35
36static struct nvd0_display *
37nvd0_display(struct drm_device *dev)
38{
39 struct drm_nouveau_private *dev_priv = dev->dev_private;
40 return dev_priv->engine.display.priv;
41}
42
43/******************************************************************************
44 * DAC
45 *****************************************************************************/
46
47/******************************************************************************
48 * SOR
49 *****************************************************************************/
50
51/******************************************************************************
52 * IRQ
53 *****************************************************************************/
54
55/******************************************************************************
56 * Init
57 *****************************************************************************/
58static void
59nvd0_display_fini(struct drm_device *dev)
60{
61 int i;
62
63 /* fini cursors */
64 for (i = 14; i >= 13; i--) {
65 if (!(nv_rd32(dev, 0x610490 + (i * 0x10)) & 0x00000001))
66 continue;
67
68 nv_mask(dev, 0x610490 + (i * 0x10), 0x00000001, 0x00000000);
69 nv_wait(dev, 0x610490 + (i * 0x10), 0x00010000, 0x00000000);
70 nv_mask(dev, 0x610090, 1 << i, 0x00000000);
71 nv_mask(dev, 0x6100a0, 1 << i, 0x00000000);
72 }
73
74 /* fini master */
75 if (nv_rd32(dev, 0x610490) & 0x00000010) {
76 nv_mask(dev, 0x610490, 0x00000010, 0x00000000);
77 nv_mask(dev, 0x610490, 0x00000003, 0x00000000);
78 nv_wait(dev, 0x610490, 0x80000000, 0x00000000);
79 nv_mask(dev, 0x610090, 0x00000001, 0x00000000);
80 nv_mask(dev, 0x6100a0, 0x00000001, 0x00000000);
81 }
82}
83
84int
85nvd0_display_init(struct drm_device *dev)
86{
87 struct nvd0_display *disp = nvd0_display(dev);
88 int i;
89
90 if (nv_rd32(dev, 0x6100ac) & 0x00000100) {
91 nv_wr32(dev, 0x6100ac, 0x00000100);
92 nv_mask(dev, 0x6194e8, 0x00000001, 0x00000000);
93 if (!nv_wait(dev, 0x6194e8, 0x00000002, 0x00000000)) {
94 NV_ERROR(dev, "PDISP: 0x6194e8 0x%08x\n",
95 nv_rd32(dev, 0x6194e8));
96 return -EBUSY;
97 }
98 }
99
100 nv_wr32(dev, 0x610010, (disp->mem->vinst >> 8) | 9);
101
102 /* init master */
103 nv_wr32(dev, 0x610494, ((disp->mem->vinst + 0x1000) >> 8) | 1);
104 nv_wr32(dev, 0x610498, 0x00010000);
105 nv_wr32(dev, 0x61049c, 0x00000000);
106 nv_mask(dev, 0x610490, 0x00000010, 0x00000010);
107 nv_wr32(dev, 0x640000, 0x00000000);
108 nv_wr32(dev, 0x610490, 0x01000013);
109 if (!nv_wait(dev, 0x610490, 0x80000000, 0x00000000)) {
110 NV_ERROR(dev, "PDISP: master 0x%08x\n",
111 nv_rd32(dev, 0x610490));
112 return -EBUSY;
113 }
114 nv_mask(dev, 0x610090, 0x00000001, 0x00000001);
115 nv_mask(dev, 0x6100a0, 0x00000001, 0x00000001);
116
117 /* init cursors */
118 for (i = 13; i <= 14; i++) {
119 nv_wr32(dev, 0x610490 + (i * 0x10), 0x00000001);
120 if (!nv_wait(dev, 0x610490 + (i * 0x10), 0x00010000, 0x00010000)) {
121 NV_ERROR(dev, "PDISP: curs%d 0x%08x\n", i,
122 nv_rd32(dev, 0x610490 + (i * 0x10)));
123 return -EBUSY;
124 }
125
126 nv_mask(dev, 0x610090, 1 << i, 1 << i);
127 nv_mask(dev, 0x6100a0, 1 << i, 1 << i);
128 }
129
130 return 0;
131}
132
133void
134nvd0_display_destroy(struct drm_device *dev)
135{
136 struct drm_nouveau_private *dev_priv = dev->dev_private;
137 struct nvd0_display *disp = nvd0_display(dev);
138
139 nvd0_display_fini(dev);
140
141 dev_priv->engine.display.priv = NULL;
142 nouveau_gpuobj_ref(NULL, &disp->mem);
143 kfree(disp);
144}
145
146int
147nvd0_display_create(struct drm_device *dev)
148{
149 struct drm_nouveau_private *dev_priv = dev->dev_private;
150 struct nvd0_display *disp;
151 int ret;
152
153 disp = kzalloc(sizeof(*disp), GFP_KERNEL);
154 if (!disp)
155 return -ENOMEM;
156 dev_priv->engine.display.priv = disp;
157
158 ret = nouveau_gpuobj_new(dev, NULL, 8 * 1024, 0x1000, 0, &disp->mem);
159 if (ret)
160 goto out;
161
162 ret = nvd0_display_init(dev);
163 if (ret)
164 goto out;
165
166out:
167 if (ret)
168 nvd0_display_destroy(dev);
169 return ret;
170}