diff options
author | Christian König <christian.koenig@amd.com> | 2014-07-18 07:56:56 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2014-07-21 13:17:37 -0400 |
commit | 20b2656d7e644c8673f2b9944a0e65249e0ae555 (patch) | |
tree | 23d8f88cad2dfda038bd2370a9dddab4b0715eeb /drivers/gpu/drm | |
parent | e898c791e1a4c27fa1f221058b29b0ad06ddf8b0 (diff) |
drm/radeon: let's use GB for vm_size (v2)
VM sizes smaller than 1GB doesn't make much sense anyway.
v2: fix typo and grammer
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm')
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_device.c | 22 | ||||
-rw-r--r-- | drivers/gpu/drm/radeon/radeon_drv.c | 4 |
2 files changed, 13 insertions, 13 deletions
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 03686fab842d..697add2cd4e3 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -1056,36 +1056,36 @@ static void radeon_check_arguments(struct radeon_device *rdev) | |||
1056 | if (!radeon_check_pot_argument(radeon_vm_size)) { | 1056 | if (!radeon_check_pot_argument(radeon_vm_size)) { |
1057 | dev_warn(rdev->dev, "VM size (%d) must be a power of 2\n", | 1057 | dev_warn(rdev->dev, "VM size (%d) must be a power of 2\n", |
1058 | radeon_vm_size); | 1058 | radeon_vm_size); |
1059 | radeon_vm_size = 4096; | 1059 | radeon_vm_size = 4; |
1060 | } | 1060 | } |
1061 | 1061 | ||
1062 | if (radeon_vm_size < 4) { | 1062 | if (radeon_vm_size < 1) { |
1063 | dev_warn(rdev->dev, "VM size (%d) to small, min is 4MB\n", | 1063 | dev_warn(rdev->dev, "VM size (%d) to small, min is 1GB\n", |
1064 | radeon_vm_size); | 1064 | radeon_vm_size); |
1065 | radeon_vm_size = 4096; | 1065 | radeon_vm_size = 4; |
1066 | } | 1066 | } |
1067 | 1067 | ||
1068 | /* | 1068 | /* |
1069 | * Max GPUVM size for Cayman, SI and CI are 40 bits. | 1069 | * Max GPUVM size for Cayman, SI and CI are 40 bits. |
1070 | */ | 1070 | */ |
1071 | if (radeon_vm_size > 1024*1024) { | 1071 | if (radeon_vm_size > 1024) { |
1072 | dev_warn(rdev->dev, "VM size (%d) to large, max is 1TB\n", | 1072 | dev_warn(rdev->dev, "VM size (%d) too large, max is 1TB\n", |
1073 | radeon_vm_size); | 1073 | radeon_vm_size); |
1074 | radeon_vm_size = 4096; | 1074 | radeon_vm_size = 4; |
1075 | } | 1075 | } |
1076 | 1076 | ||
1077 | /* defines number of bits in page table versus page directory, | 1077 | /* defines number of bits in page table versus page directory, |
1078 | * a page is 4KB so we have 12 bits offset, minimum 9 bits in the | 1078 | * a page is 4KB so we have 12 bits offset, minimum 9 bits in the |
1079 | * page table and the remaining bits are in the page directory */ | 1079 | * page table and the remaining bits are in the page directory */ |
1080 | if (radeon_vm_block_size < 9) { | 1080 | if (radeon_vm_block_size < 9) { |
1081 | dev_warn(rdev->dev, "VM page table size (%d) to small\n", | 1081 | dev_warn(rdev->dev, "VM page table size (%d) too small\n", |
1082 | radeon_vm_block_size); | 1082 | radeon_vm_block_size); |
1083 | radeon_vm_block_size = 9; | 1083 | radeon_vm_block_size = 9; |
1084 | } | 1084 | } |
1085 | 1085 | ||
1086 | if (radeon_vm_block_size > 24 || | 1086 | if (radeon_vm_block_size > 24 || |
1087 | radeon_vm_size < (1ull << radeon_vm_block_size)) { | 1087 | (radeon_vm_size * 1024) < (1ull << radeon_vm_block_size)) { |
1088 | dev_warn(rdev->dev, "VM page table size (%d) to large\n", | 1088 | dev_warn(rdev->dev, "VM page table size (%d) too large\n", |
1089 | radeon_vm_block_size); | 1089 | radeon_vm_block_size); |
1090 | radeon_vm_block_size = 9; | 1090 | radeon_vm_block_size = 9; |
1091 | } | 1091 | } |
@@ -1238,7 +1238,7 @@ int radeon_device_init(struct radeon_device *rdev, | |||
1238 | /* Adjust VM size here. | 1238 | /* Adjust VM size here. |
1239 | * Max GPUVM size for cayman+ is 40 bits. | 1239 | * Max GPUVM size for cayman+ is 40 bits. |
1240 | */ | 1240 | */ |
1241 | rdev->vm_manager.max_pfn = radeon_vm_size << 8; | 1241 | rdev->vm_manager.max_pfn = radeon_vm_size << 18; |
1242 | 1242 | ||
1243 | /* Set asic functions */ | 1243 | /* Set asic functions */ |
1244 | r = radeon_asic_init(rdev); | 1244 | r = radeon_asic_init(rdev); |
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index cb1421369e3a..e9e361084249 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c | |||
@@ -173,7 +173,7 @@ int radeon_dpm = -1; | |||
173 | int radeon_aspm = -1; | 173 | int radeon_aspm = -1; |
174 | int radeon_runtime_pm = -1; | 174 | int radeon_runtime_pm = -1; |
175 | int radeon_hard_reset = 0; | 175 | int radeon_hard_reset = 0; |
176 | int radeon_vm_size = 4096; | 176 | int radeon_vm_size = 4; |
177 | int radeon_vm_block_size = 9; | 177 | int radeon_vm_block_size = 9; |
178 | int radeon_deep_color = 0; | 178 | int radeon_deep_color = 0; |
179 | 179 | ||
@@ -243,7 +243,7 @@ module_param_named(runpm, radeon_runtime_pm, int, 0444); | |||
243 | MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))"); | 243 | MODULE_PARM_DESC(hard_reset, "PCI config reset (1 = force enable, 0 = disable (default))"); |
244 | module_param_named(hard_reset, radeon_hard_reset, int, 0444); | 244 | module_param_named(hard_reset, radeon_hard_reset, int, 0444); |
245 | 245 | ||
246 | MODULE_PARM_DESC(vm_size, "VM address space size in megabytes (default 4GB)"); | 246 | MODULE_PARM_DESC(vm_size, "VM address space size in gigabytes (default 4GB)"); |
247 | module_param_named(vm_size, radeon_vm_size, int, 0444); | 247 | module_param_named(vm_size, radeon_vm_size, int, 0444); |
248 | 248 | ||
249 | MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default 9)"); | 249 | MODULE_PARM_DESC(vm_block_size, "VM page table size in bits (default 9)"); |