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authorThomas Hellstrom <thellstrom@vmware.com>2012-11-21 04:35:08 -0500
committerThomas Hellstrom <thellstrom@vmware.com>2014-01-17 01:52:17 -0500
commitc1234db74df0b5d9e8113294b2fa5dede3a960b2 (patch)
tree2f0f79cb88b1b659701a9b735ac5519782d76bbf /drivers/gpu/drm/vmwgfx
parentbc2d6508abefb3d6f3a2188dece555ce4108d3d3 (diff)
drm/vmwgfx: Update the svga register definition
Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com> Reviewed-by: Brian Paul <brianp@vmware.com> Reviewed-by: Zack Rusin <zackr@vmware.com>
Diffstat (limited to 'drivers/gpu/drm/vmwgfx')
-rw-r--r--drivers/gpu/drm/vmwgfx/svga_reg.h10
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_drv.c6
2 files changed, 14 insertions, 2 deletions
diff --git a/drivers/gpu/drm/vmwgfx/svga_reg.h b/drivers/gpu/drm/vmwgfx/svga_reg.h
index 01f63cb49678..71defa4d2d75 100644
--- a/drivers/gpu/drm/vmwgfx/svga_reg.h
+++ b/drivers/gpu/drm/vmwgfx/svga_reg.h
@@ -169,7 +169,10 @@ enum {
169 SVGA_REG_TRACES = 45, /* Enable trace-based updates even when FIFO is on */ 169 SVGA_REG_TRACES = 45, /* Enable trace-based updates even when FIFO is on */
170 SVGA_REG_GMRS_MAX_PAGES = 46, /* Maximum number of 4KB pages for all GMRs */ 170 SVGA_REG_GMRS_MAX_PAGES = 46, /* Maximum number of 4KB pages for all GMRs */
171 SVGA_REG_MEMORY_SIZE = 47, /* Total dedicated device memory excluding FIFO */ 171 SVGA_REG_MEMORY_SIZE = 47, /* Total dedicated device memory excluding FIFO */
172 SVGA_REG_TOP = 48, /* Must be 1 more than the last register */ 172 SVGA_REG_MAX_PRIMARY_BOUNDING_BOX_MEM = 50, /* Max primary memory */
173 SVGA_REG_SUGGESTED_GBOBJECT_MEM_SIZE_KB = 51, /* Suggested limit on mob mem */
174 SVGA_REG_DEV_CAP = 52, /* Write dev cap index, read value */
175 SVGA_REG_TOP = 53, /* Must be 1 more than the last register */
173 176
174 SVGA_PALETTE_BASE = 1024, /* Base of SVGA color map */ 177 SVGA_PALETTE_BASE = 1024, /* Base of SVGA color map */
175 /* Next 768 (== 256*3) registers exist for colormap */ 178 /* Next 768 (== 256*3) registers exist for colormap */
@@ -431,7 +434,10 @@ struct SVGASignedPoint {
431#define SVGA_CAP_TRACES 0x00200000 434#define SVGA_CAP_TRACES 0x00200000
432#define SVGA_CAP_GMR2 0x00400000 435#define SVGA_CAP_GMR2 0x00400000
433#define SVGA_CAP_SCREEN_OBJECT_2 0x00800000 436#define SVGA_CAP_SCREEN_OBJECT_2 0x00800000
434 437#define SVGA_CAP_COMMAND_BUFFERS 0x01000000
438#define SVGA_CAP_DEAD1 0x02000000
439#define SVGA_CAP_CMD_BUFFERS_2 0x04000000
440#define SVGA_CAP_GBOBJECTS 0x08000000
435 441
436/* 442/*
437 * FIFO register indices. 443 * FIFO register indices.
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index 67ac42dfe646..6e8cb1481376 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -243,6 +243,12 @@ static void vmw_print_capabilities(uint32_t capabilities)
243 DRM_INFO(" GMR2.\n"); 243 DRM_INFO(" GMR2.\n");
244 if (capabilities & SVGA_CAP_SCREEN_OBJECT_2) 244 if (capabilities & SVGA_CAP_SCREEN_OBJECT_2)
245 DRM_INFO(" Screen Object 2.\n"); 245 DRM_INFO(" Screen Object 2.\n");
246 if (capabilities & SVGA_CAP_COMMAND_BUFFERS)
247 DRM_INFO(" Command Buffers.\n");
248 if (capabilities & SVGA_CAP_CMD_BUFFERS_2)
249 DRM_INFO(" Command Buffers 2.\n");
250 if (capabilities & SVGA_CAP_GBOBJECTS)
251 DRM_INFO(" Guest Backed Resources.\n");
246} 252}
247 253
248 254