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authorDave Airlie <airlied@redhat.com>2014-01-19 19:03:27 -0500
committerDave Airlie <airlied@redhat.com>2014-01-19 19:03:27 -0500
commit9354eafd893f45320a37da360e1728104e49cc2f (patch)
tree8cd82ac2ff70ea3a9fd97b432f10c880b1d97a4c /drivers/gpu/drm/vmwgfx/svga3d_reg.h
parent53dac830537b51df555ba5e7ebb236705b7eaa7c (diff)
parent1985f99987ff04e1bb0405101dd8e25cf1b6b037 (diff)
Merge tag 'vmwgfx-next-2014-01-17' of git://people.freedesktop.org/~thomash/linux into drm-next
Pull request of 2014-01-17 Pull request for 3.14. One not so urgent fix, One huge device update. The pull request corresponds to the patches sent out on dri-devel, except: [PATCH 02/33], review tag typo pointed out by Matt Turner. [PATCH 04/33], dropped. The new surface formats are never used. The upcoming vmware svga2 hardware version 11 will introduce the concept of "guest backed objects" or -resources. The device will in principle get all of its memory from the guest, which has big advantages from the device point of view. This means that vmwgfx contexts, shaders and surfaces need to be backed by guest memory in the form of buffer objects called MOBs, presumably short for MemoryOBjects, which are bound to the device in a special way. This patch series introduces guest backed object support. Some new IOCTLs are added to allocate these new guest backed object, and to optionally provide them with a backing MOB. There is an update to the gallium driver that comes with this update, and it will be pushed in the near timeframe presumably to a separate mesa branch before merged to master. * tag 'vmwgfx-next-2014-01-17' of git://people.freedesktop.org/~thomash/linux: (33 commits) drm/vmwgfx: Invalidate surface on non-readback unbind drm/vmwgfx: Silence the device command verifier drm/vmwgfx: Implement 64-bit Otable- and MOB binding v2 drm/vmwgfx: Fix surface framebuffer check for guest-backed surfaces drm/vmwgfx: Update otable definitions drm/vmwgfx: Use the linux DMA api also for MOBs drm/vmwgfx: Ditch the vmw_dummy_query_bo_prepare function drm/vmwgfx: Persistent tracking of context bindings drm/vmwgfx: Track context bindings and scrub them upon exiting execbuf drm/vmwgfx: Block the BIND_SHADERCONSTS command drm/vmwgfx: Add a parameter to get max MOB memory size drm/vmwgfx: Implement a buffer object synccpu ioctl. drm/vmwgfx: Make sure that the multisampling is off drm/vmwgfx: Extend the command verifier to handle guest-backed on / off drm/vmwgfx: Fix up the vmwgfx_drv.h header for new files drm/vmwgfx: Enable 3D for new hardware version drm/vmwgfx: Add new unused (by user-space) commands to the verifier drm/vmwgfx: Validate guest-backed shader const commands drm/vmwgfx: Add guest-backed shaders drm/vmwgfx: Hook up guest-backed surfaces ...
Diffstat (limited to 'drivers/gpu/drm/vmwgfx/svga3d_reg.h')
-rw-r--r--drivers/gpu/drm/vmwgfx/svga3d_reg.h718
1 files changed, 704 insertions, 14 deletions
diff --git a/drivers/gpu/drm/vmwgfx/svga3d_reg.h b/drivers/gpu/drm/vmwgfx/svga3d_reg.h
index d0e085ee8249..d95335cb90bd 100644
--- a/drivers/gpu/drm/vmwgfx/svga3d_reg.h
+++ b/drivers/gpu/drm/vmwgfx/svga3d_reg.h
@@ -34,6 +34,8 @@
34 34
35#include "svga_reg.h" 35#include "svga_reg.h"
36 36
37typedef uint32 PPN;
38typedef __le64 PPN64;
37 39
38/* 40/*
39 * 3D Hardware Version 41 * 3D Hardware Version
@@ -71,6 +73,9 @@ typedef uint32 SVGA3dBool; /* 32-bit Bool definition */
71#define SVGA3D_MAX_CONTEXT_IDS 256 73#define SVGA3D_MAX_CONTEXT_IDS 256
72#define SVGA3D_MAX_SURFACE_IDS (32 * 1024) 74#define SVGA3D_MAX_SURFACE_IDS (32 * 1024)
73 75
76#define SVGA3D_NUM_TEXTURE_UNITS 32
77#define SVGA3D_NUM_LIGHTS 8
78
74/* 79/*
75 * Surface formats. 80 * Surface formats.
76 * 81 *
@@ -81,6 +86,7 @@ typedef uint32 SVGA3dBool; /* 32-bit Bool definition */
81 */ 86 */
82 87
83typedef enum SVGA3dSurfaceFormat { 88typedef enum SVGA3dSurfaceFormat {
89 SVGA3D_FORMAT_MIN = 0,
84 SVGA3D_FORMAT_INVALID = 0, 90 SVGA3D_FORMAT_INVALID = 0,
85 91
86 SVGA3D_X8R8G8B8 = 1, 92 SVGA3D_X8R8G8B8 = 1,
@@ -134,12 +140,6 @@ typedef enum SVGA3dSurfaceFormat {
134 SVGA3D_RG_S10E5 = 35, 140 SVGA3D_RG_S10E5 = 35,
135 SVGA3D_RG_S23E8 = 36, 141 SVGA3D_RG_S23E8 = 36,
136 142
137 /*
138 * Any surface can be used as a buffer object, but SVGA3D_BUFFER is
139 * the most efficient format to use when creating new surfaces
140 * expressly for index or vertex data.
141 */
142
143 SVGA3D_BUFFER = 37, 143 SVGA3D_BUFFER = 37,
144 144
145 SVGA3D_Z_D24X8 = 38, 145 SVGA3D_Z_D24X8 = 38,
@@ -159,15 +159,114 @@ typedef enum SVGA3dSurfaceFormat {
159 /* Video format with alpha */ 159 /* Video format with alpha */
160 SVGA3D_AYUV = 45, 160 SVGA3D_AYUV = 45,
161 161
162 SVGA3D_R32G32B32A32_TYPELESS = 46,
163 SVGA3D_R32G32B32A32_FLOAT = 25,
164 SVGA3D_R32G32B32A32_UINT = 47,
165 SVGA3D_R32G32B32A32_SINT = 48,
166 SVGA3D_R32G32B32_TYPELESS = 49,
167 SVGA3D_R32G32B32_FLOAT = 50,
168 SVGA3D_R32G32B32_UINT = 51,
169 SVGA3D_R32G32B32_SINT = 52,
170 SVGA3D_R16G16B16A16_TYPELESS = 53,
171 SVGA3D_R16G16B16A16_FLOAT = 24,
172 SVGA3D_R16G16B16A16_UNORM = 41,
173 SVGA3D_R16G16B16A16_UINT = 54,
174 SVGA3D_R16G16B16A16_SNORM = 55,
175 SVGA3D_R16G16B16A16_SINT = 56,
176 SVGA3D_R32G32_TYPELESS = 57,
177 SVGA3D_R32G32_FLOAT = 36,
178 SVGA3D_R32G32_UINT = 58,
179 SVGA3D_R32G32_SINT = 59,
180 SVGA3D_R32G8X24_TYPELESS = 60,
181 SVGA3D_D32_FLOAT_S8X24_UINT = 61,
182 SVGA3D_R32_FLOAT_X8X24_TYPELESS = 62,
183 SVGA3D_X32_TYPELESS_G8X24_UINT = 63,
184 SVGA3D_R10G10B10A2_TYPELESS = 64,
185 SVGA3D_R10G10B10A2_UNORM = 26,
186 SVGA3D_R10G10B10A2_UINT = 65,
187 SVGA3D_R11G11B10_FLOAT = 66,
188 SVGA3D_R8G8B8A8_TYPELESS = 67,
189 SVGA3D_R8G8B8A8_UNORM = 68,
190 SVGA3D_R8G8B8A8_UNORM_SRGB = 69,
191 SVGA3D_R8G8B8A8_UINT = 70,
192 SVGA3D_R8G8B8A8_SNORM = 28,
193 SVGA3D_R8G8B8A8_SINT = 71,
194 SVGA3D_R16G16_TYPELESS = 72,
195 SVGA3D_R16G16_FLOAT = 35,
196 SVGA3D_R16G16_UNORM = 40,
197 SVGA3D_R16G16_UINT = 73,
198 SVGA3D_R16G16_SNORM = 39,
199 SVGA3D_R16G16_SINT = 74,
200 SVGA3D_R32_TYPELESS = 75,
201 SVGA3D_D32_FLOAT = 76,
202 SVGA3D_R32_FLOAT = 34,
203 SVGA3D_R32_UINT = 77,
204 SVGA3D_R32_SINT = 78,
205 SVGA3D_R24G8_TYPELESS = 79,
206 SVGA3D_D24_UNORM_S8_UINT = 80,
207 SVGA3D_R24_UNORM_X8_TYPELESS = 81,
208 SVGA3D_X24_TYPELESS_G8_UINT = 82,
209 SVGA3D_R8G8_TYPELESS = 83,
210 SVGA3D_R8G8_UNORM = 84,
211 SVGA3D_R8G8_UINT = 85,
212 SVGA3D_R8G8_SNORM = 27,
213 SVGA3D_R8G8_SINT = 86,
214 SVGA3D_R16_TYPELESS = 87,
215 SVGA3D_R16_FLOAT = 33,
216 SVGA3D_D16_UNORM = 8,
217 SVGA3D_R16_UNORM = 88,
218 SVGA3D_R16_UINT = 89,
219 SVGA3D_R16_SNORM = 90,
220 SVGA3D_R16_SINT = 91,
221 SVGA3D_R8_TYPELESS = 92,
222 SVGA3D_R8_UNORM = 93,
223 SVGA3D_R8_UINT = 94,
224 SVGA3D_R8_SNORM = 95,
225 SVGA3D_R8_SINT = 96,
226 SVGA3D_A8_UNORM = 32,
227 SVGA3D_R1_UNORM = 97,
228 SVGA3D_R9G9B9E5_SHAREDEXP = 98,
229 SVGA3D_R8G8_B8G8_UNORM = 99,
230 SVGA3D_G8R8_G8B8_UNORM = 100,
231 SVGA3D_BC1_TYPELESS = 101,
232 SVGA3D_BC1_UNORM = 15,
233 SVGA3D_BC1_UNORM_SRGB = 102,
234 SVGA3D_BC2_TYPELESS = 103,
235 SVGA3D_BC2_UNORM = 17,
236 SVGA3D_BC2_UNORM_SRGB = 104,
237 SVGA3D_BC3_TYPELESS = 105,
238 SVGA3D_BC3_UNORM = 19,
239 SVGA3D_BC3_UNORM_SRGB = 106,
240 SVGA3D_BC4_TYPELESS = 107,
162 SVGA3D_BC4_UNORM = 108, 241 SVGA3D_BC4_UNORM = 108,
242 SVGA3D_BC4_SNORM = 109,
243 SVGA3D_BC5_TYPELESS = 110,
163 SVGA3D_BC5_UNORM = 111, 244 SVGA3D_BC5_UNORM = 111,
245 SVGA3D_BC5_SNORM = 112,
246 SVGA3D_B5G6R5_UNORM = 3,
247 SVGA3D_B5G5R5A1_UNORM = 5,
248 SVGA3D_B8G8R8A8_UNORM = 2,
249 SVGA3D_B8G8R8X8_UNORM = 1,
250 SVGA3D_R10G10B10_XR_BIAS_A2_UNORM = 113,
251 SVGA3D_B8G8R8A8_TYPELESS = 114,
252 SVGA3D_B8G8R8A8_UNORM_SRGB = 115,
253 SVGA3D_B8G8R8X8_TYPELESS = 116,
254 SVGA3D_B8G8R8X8_UNORM_SRGB = 117,
164 255
165 /* Advanced D3D9 depth formats. */ 256 /* Advanced D3D9 depth formats. */
166 SVGA3D_Z_DF16 = 118, 257 SVGA3D_Z_DF16 = 118,
167 SVGA3D_Z_DF24 = 119, 258 SVGA3D_Z_DF24 = 119,
168 SVGA3D_Z_D24S8_INT = 120, 259 SVGA3D_Z_D24S8_INT = 120,
169 260
170 SVGA3D_FORMAT_MAX 261 /* Planar video formats. */
262 SVGA3D_YV12 = 121,
263
264 /* Shader constant formats. */
265 SVGA3D_SURFACE_SHADERCONST_FLOAT = 122,
266 SVGA3D_SURFACE_SHADERCONST_INT = 123,
267 SVGA3D_SURFACE_SHADERCONST_BOOL = 124,
268
269 SVGA3D_FORMAT_MAX = 125,
171} SVGA3dSurfaceFormat; 270} SVGA3dSurfaceFormat;
172 271
173typedef uint32 SVGA3dColor; /* a, r, g, b */ 272typedef uint32 SVGA3dColor; /* a, r, g, b */
@@ -957,15 +1056,21 @@ typedef enum {
957} SVGA3dCubeFace; 1056} SVGA3dCubeFace;
958 1057
959typedef enum { 1058typedef enum {
1059 SVGA3D_SHADERTYPE_INVALID = 0,
1060 SVGA3D_SHADERTYPE_MIN = 1,
960 SVGA3D_SHADERTYPE_VS = 1, 1061 SVGA3D_SHADERTYPE_VS = 1,
961 SVGA3D_SHADERTYPE_PS = 2, 1062 SVGA3D_SHADERTYPE_PS = 2,
962 SVGA3D_SHADERTYPE_MAX 1063 SVGA3D_SHADERTYPE_MAX = 3,
1064 SVGA3D_SHADERTYPE_GS = 3,
963} SVGA3dShaderType; 1065} SVGA3dShaderType;
964 1066
1067#define SVGA3D_NUM_SHADERTYPE (SVGA3D_SHADERTYPE_MAX - SVGA3D_SHADERTYPE_MIN)
1068
965typedef enum { 1069typedef enum {
966 SVGA3D_CONST_TYPE_FLOAT = 0, 1070 SVGA3D_CONST_TYPE_FLOAT = 0,
967 SVGA3D_CONST_TYPE_INT = 1, 1071 SVGA3D_CONST_TYPE_INT = 1,
968 SVGA3D_CONST_TYPE_BOOL = 2, 1072 SVGA3D_CONST_TYPE_BOOL = 2,
1073 SVGA3D_CONST_TYPE_MAX
969} SVGA3dShaderConstType; 1074} SVGA3dShaderConstType;
970 1075
971#define SVGA3D_MAX_SURFACE_FACES 6 1076#define SVGA3D_MAX_SURFACE_FACES 6
@@ -1056,9 +1161,74 @@ typedef enum {
1056#define SVGA_3D_CMD_GENERATE_MIPMAPS SVGA_3D_CMD_BASE + 31 1161#define SVGA_3D_CMD_GENERATE_MIPMAPS SVGA_3D_CMD_BASE + 31
1057#define SVGA_3D_CMD_ACTIVATE_SURFACE SVGA_3D_CMD_BASE + 40 1162#define SVGA_3D_CMD_ACTIVATE_SURFACE SVGA_3D_CMD_BASE + 40
1058#define SVGA_3D_CMD_DEACTIVATE_SURFACE SVGA_3D_CMD_BASE + 41 1163#define SVGA_3D_CMD_DEACTIVATE_SURFACE SVGA_3D_CMD_BASE + 41
1059#define SVGA_3D_CMD_MAX SVGA_3D_CMD_BASE + 42 1164#define SVGA_3D_CMD_SCREEN_DMA 1082
1060 1165#define SVGA_3D_CMD_SET_UNITY_SURFACE_COOKIE 1083
1061#define SVGA_3D_CMD_FUTURE_MAX 2000 1166#define SVGA_3D_CMD_OPEN_CONTEXT_SURFACE 1084
1167
1168#define SVGA_3D_CMD_LOGICOPS_BITBLT 1085
1169#define SVGA_3D_CMD_LOGICOPS_TRANSBLT 1086
1170#define SVGA_3D_CMD_LOGICOPS_STRETCHBLT 1087
1171#define SVGA_3D_CMD_LOGICOPS_COLORFILL 1088
1172#define SVGA_3D_CMD_LOGICOPS_ALPHABLEND 1089
1173#define SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND 1090
1174
1175#define SVGA_3D_CMD_SET_OTABLE_BASE 1091
1176#define SVGA_3D_CMD_READBACK_OTABLE 1092
1177
1178#define SVGA_3D_CMD_DEFINE_GB_MOB 1093
1179#define SVGA_3D_CMD_DESTROY_GB_MOB 1094
1180#define SVGA_3D_CMD_REDEFINE_GB_MOB 1095
1181#define SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING 1096
1182
1183#define SVGA_3D_CMD_DEFINE_GB_SURFACE 1097
1184#define SVGA_3D_CMD_DESTROY_GB_SURFACE 1098
1185#define SVGA_3D_CMD_BIND_GB_SURFACE 1099
1186#define SVGA_3D_CMD_COND_BIND_GB_SURFACE 1100
1187#define SVGA_3D_CMD_UPDATE_GB_IMAGE 1101
1188#define SVGA_3D_CMD_UPDATE_GB_SURFACE 1102
1189#define SVGA_3D_CMD_READBACK_GB_IMAGE 1103
1190#define SVGA_3D_CMD_READBACK_GB_SURFACE 1104
1191#define SVGA_3D_CMD_INVALIDATE_GB_IMAGE 1105
1192#define SVGA_3D_CMD_INVALIDATE_GB_SURFACE 1106
1193
1194#define SVGA_3D_CMD_DEFINE_GB_CONTEXT 1107
1195#define SVGA_3D_CMD_DESTROY_GB_CONTEXT 1108
1196#define SVGA_3D_CMD_BIND_GB_CONTEXT 1109
1197#define SVGA_3D_CMD_READBACK_GB_CONTEXT 1110
1198#define SVGA_3D_CMD_INVALIDATE_GB_CONTEXT 1111
1199
1200#define SVGA_3D_CMD_DEFINE_GB_SHADER 1112
1201#define SVGA_3D_CMD_DESTROY_GB_SHADER 1113
1202#define SVGA_3D_CMD_BIND_GB_SHADER 1114
1203
1204#define SVGA_3D_CMD_SET_OTABLE_BASE64 1115
1205
1206#define SVGA_3D_CMD_BEGIN_GB_QUERY 1116
1207#define SVGA_3D_CMD_END_GB_QUERY 1117
1208#define SVGA_3D_CMD_WAIT_FOR_GB_QUERY 1118
1209
1210#define SVGA_3D_CMD_NOP 1119
1211
1212#define SVGA_3D_CMD_ENABLE_GART 1120
1213#define SVGA_3D_CMD_DISABLE_GART 1121
1214#define SVGA_3D_CMD_MAP_MOB_INTO_GART 1122
1215#define SVGA_3D_CMD_UNMAP_GART_RANGE 1123
1216
1217#define SVGA_3D_CMD_DEFINE_GB_SCREENTARGET 1124
1218#define SVGA_3D_CMD_DESTROY_GB_SCREENTARGET 1125
1219#define SVGA_3D_CMD_BIND_GB_SCREENTARGET 1126
1220#define SVGA_3D_CMD_UPDATE_GB_SCREENTARGET 1127
1221
1222#define SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL 1128
1223#define SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL 1129
1224
1225#define SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE 1130
1226
1227#define SVGA_3D_CMD_DEFINE_GB_MOB64 1135
1228#define SVGA_3D_CMD_REDEFINE_GB_MOB64 1136
1229
1230#define SVGA_3D_CMD_MAX 1142
1231#define SVGA_3D_CMD_FUTURE_MAX 3000
1062 1232
1063/* 1233/*
1064 * Common substructures used in multiple FIFO commands: 1234 * Common substructures used in multiple FIFO commands:
@@ -1750,6 +1920,495 @@ struct {
1750 1920
1751 1921
1752/* 1922/*
1923 * Guest-backed surface definitions.
1924 */
1925
1926typedef uint32 SVGAMobId;
1927
1928typedef enum SVGAMobFormat {
1929 SVGA3D_MOBFMT_INVALID = SVGA3D_INVALID_ID,
1930 SVGA3D_MOBFMT_PTDEPTH_0 = 0,
1931 SVGA3D_MOBFMT_PTDEPTH_1 = 1,
1932 SVGA3D_MOBFMT_PTDEPTH_2 = 2,
1933 SVGA3D_MOBFMT_RANGE = 3,
1934 SVGA3D_MOBFMT_PTDEPTH64_0 = 4,
1935 SVGA3D_MOBFMT_PTDEPTH64_1 = 5,
1936 SVGA3D_MOBFMT_PTDEPTH64_2 = 6,
1937 SVGA3D_MOBFMT_MAX,
1938} SVGAMobFormat;
1939
1940/*
1941 * Sizes of opaque types.
1942 */
1943
1944#define SVGA3D_OTABLE_MOB_ENTRY_SIZE 16
1945#define SVGA3D_OTABLE_CONTEXT_ENTRY_SIZE 8
1946#define SVGA3D_OTABLE_SURFACE_ENTRY_SIZE 64
1947#define SVGA3D_OTABLE_SHADER_ENTRY_SIZE 16
1948#define SVGA3D_OTABLE_SCREEN_TARGET_ENTRY_SIZE 64
1949#define SVGA3D_CONTEXT_DATA_SIZE 16384
1950
1951/*
1952 * SVGA3dCmdSetOTableBase --
1953 *
1954 * This command allows the guest to specify the base PPN of the
1955 * specified object table.
1956 */
1957
1958typedef enum {
1959 SVGA_OTABLE_MOB = 0,
1960 SVGA_OTABLE_MIN = 0,
1961 SVGA_OTABLE_SURFACE = 1,
1962 SVGA_OTABLE_CONTEXT = 2,
1963 SVGA_OTABLE_SHADER = 3,
1964 SVGA_OTABLE_SCREEN_TARGET = 4,
1965 SVGA_OTABLE_DX9_MAX = 5,
1966 SVGA_OTABLE_MAX = 8
1967} SVGAOTableType;
1968
1969typedef
1970struct {
1971 SVGAOTableType type;
1972 PPN baseAddress;
1973 uint32 sizeInBytes;
1974 uint32 validSizeInBytes;
1975 SVGAMobFormat ptDepth;
1976}
1977__attribute__((__packed__))
1978SVGA3dCmdSetOTableBase; /* SVGA_3D_CMD_SET_OTABLE_BASE */
1979
1980typedef
1981struct {
1982 SVGAOTableType type;
1983 PPN64 baseAddress;
1984 uint32 sizeInBytes;
1985 uint32 validSizeInBytes;
1986 SVGAMobFormat ptDepth;
1987}
1988__attribute__((__packed__))
1989SVGA3dCmdSetOTableBase64; /* SVGA_3D_CMD_SET_OTABLE_BASE64 */
1990
1991typedef
1992struct {
1993 SVGAOTableType type;
1994}
1995__attribute__((__packed__))
1996SVGA3dCmdReadbackOTable; /* SVGA_3D_CMD_READBACK_OTABLE */
1997
1998/*
1999 * Define a memory object (Mob) in the OTable.
2000 */
2001
2002typedef
2003struct SVGA3dCmdDefineGBMob {
2004 SVGAMobId mobid;
2005 SVGAMobFormat ptDepth;
2006 PPN base;
2007 uint32 sizeInBytes;
2008}
2009__attribute__((__packed__))
2010SVGA3dCmdDefineGBMob; /* SVGA_3D_CMD_DEFINE_GB_MOB */
2011
2012
2013/*
2014 * Destroys an object in the OTable.
2015 */
2016
2017typedef
2018struct SVGA3dCmdDestroyGBMob {
2019 SVGAMobId mobid;
2020}
2021__attribute__((__packed__))
2022SVGA3dCmdDestroyGBMob; /* SVGA_3D_CMD_DESTROY_GB_MOB */
2023
2024/*
2025 * Redefine an object in the OTable.
2026 */
2027
2028typedef
2029struct SVGA3dCmdRedefineGBMob {
2030 SVGAMobId mobid;
2031 SVGAMobFormat ptDepth;
2032 PPN base;
2033 uint32 sizeInBytes;
2034}
2035__attribute__((__packed__))
2036SVGA3dCmdRedefineGBMob; /* SVGA_3D_CMD_REDEFINE_GB_MOB */
2037
2038/*
2039 * Define a memory object (Mob) in the OTable with a PPN64 base.
2040 */
2041
2042typedef
2043struct SVGA3dCmdDefineGBMob64 {
2044 SVGAMobId mobid;
2045 SVGAMobFormat ptDepth;
2046 PPN64 base;
2047 uint32 sizeInBytes;
2048}
2049__attribute__((__packed__))
2050SVGA3dCmdDefineGBMob64; /* SVGA_3D_CMD_DEFINE_GB_MOB64 */
2051
2052/*
2053 * Redefine an object in the OTable with PPN64 base.
2054 */
2055
2056typedef
2057struct SVGA3dCmdRedefineGBMob64 {
2058 SVGAMobId mobid;
2059 SVGAMobFormat ptDepth;
2060 PPN64 base;
2061 uint32 sizeInBytes;
2062}
2063__attribute__((__packed__))
2064SVGA3dCmdRedefineGBMob64; /* SVGA_3D_CMD_REDEFINE_GB_MOB64 */
2065
2066/*
2067 * Notification that the page tables have been modified.
2068 */
2069
2070typedef
2071struct SVGA3dCmdUpdateGBMobMapping {
2072 SVGAMobId mobid;
2073}
2074__attribute__((__packed__))
2075SVGA3dCmdUpdateGBMobMapping; /* SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING */
2076
2077/*
2078 * Define a guest-backed surface.
2079 */
2080
2081typedef
2082struct SVGA3dCmdDefineGBSurface {
2083 uint32 sid;
2084 SVGA3dSurfaceFlags surfaceFlags;
2085 SVGA3dSurfaceFormat format;
2086 uint32 numMipLevels;
2087 uint32 multisampleCount;
2088 SVGA3dTextureFilter autogenFilter;
2089 SVGA3dSize size;
2090} SVGA3dCmdDefineGBSurface; /* SVGA_3D_CMD_DEFINE_GB_SURFACE */
2091
2092/*
2093 * Destroy a guest-backed surface.
2094 */
2095
2096typedef
2097struct SVGA3dCmdDestroyGBSurface {
2098 uint32 sid;
2099} SVGA3dCmdDestroyGBSurface; /* SVGA_3D_CMD_DESTROY_GB_SURFACE */
2100
2101/*
2102 * Bind a guest-backed surface to an object.
2103 */
2104
2105typedef
2106struct SVGA3dCmdBindGBSurface {
2107 uint32 sid;
2108 SVGAMobId mobid;
2109} SVGA3dCmdBindGBSurface; /* SVGA_3D_CMD_BIND_GB_SURFACE */
2110
2111/*
2112 * Conditionally bind a mob to a guest backed surface if testMobid
2113 * matches the currently bound mob. Optionally issue a readback on
2114 * the surface while it is still bound to the old mobid if the mobid
2115 * is changed by this command.
2116 */
2117
2118#define SVGA3D_COND_BIND_GB_SURFACE_FLAG_READBACK (1 << 0)
2119
2120typedef
2121struct{
2122 uint32 sid;
2123 SVGAMobId testMobid;
2124 SVGAMobId mobid;
2125 uint32 flags;
2126}
2127SVGA3dCmdCondBindGBSurface; /* SVGA_3D_CMD_COND_BIND_GB_SURFACE */
2128
2129/*
2130 * Update an image in a guest-backed surface.
2131 * (Inform the device that the guest-contents have been updated.)
2132 */
2133
2134typedef
2135struct SVGA3dCmdUpdateGBImage {
2136 SVGA3dSurfaceImageId image;
2137 SVGA3dBox box;
2138} SVGA3dCmdUpdateGBImage; /* SVGA_3D_CMD_UPDATE_GB_IMAGE */
2139
2140/*
2141 * Update an entire guest-backed surface.
2142 * (Inform the device that the guest-contents have been updated.)
2143 */
2144
2145typedef
2146struct SVGA3dCmdUpdateGBSurface {
2147 uint32 sid;
2148} SVGA3dCmdUpdateGBSurface; /* SVGA_3D_CMD_UPDATE_GB_SURFACE */
2149
2150/*
2151 * Readback an image in a guest-backed surface.
2152 * (Request the device to flush the dirty contents into the guest.)
2153 */
2154
2155typedef
2156struct SVGA3dCmdReadbackGBImage {
2157 SVGA3dSurfaceImageId image;
2158} SVGA3dCmdReadbackGBImage; /* SVGA_3D_CMD_READBACK_GB_IMAGE*/
2159
2160/*
2161 * Readback an entire guest-backed surface.
2162 * (Request the device to flush the dirty contents into the guest.)
2163 */
2164
2165typedef
2166struct SVGA3dCmdReadbackGBSurface {
2167 uint32 sid;
2168} SVGA3dCmdReadbackGBSurface; /* SVGA_3D_CMD_READBACK_GB_SURFACE */
2169
2170/*
2171 * Readback a sub rect of an image in a guest-backed surface. After
2172 * issuing this command the driver is required to issue an update call
2173 * of the same region before issuing any other commands that reference
2174 * this surface or rendering is not guaranteed.
2175 */
2176
2177typedef
2178struct SVGA3dCmdReadbackGBImagePartial {
2179 SVGA3dSurfaceImageId image;
2180 SVGA3dBox box;
2181 uint32 invertBox;
2182}
2183SVGA3dCmdReadbackGBImagePartial; /* SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL */
2184
2185/*
2186 * Invalidate an image in a guest-backed surface.
2187 * (Notify the device that the contents can be lost.)
2188 */
2189
2190typedef
2191struct SVGA3dCmdInvalidateGBImage {
2192 SVGA3dSurfaceImageId image;
2193} SVGA3dCmdInvalidateGBImage; /* SVGA_3D_CMD_INVALIDATE_GB_IMAGE */
2194
2195/*
2196 * Invalidate an entire guest-backed surface.
2197 * (Notify the device that the contents if all images can be lost.)
2198 */
2199
2200typedef
2201struct SVGA3dCmdInvalidateGBSurface {
2202 uint32 sid;
2203} SVGA3dCmdInvalidateGBSurface; /* SVGA_3D_CMD_INVALIDATE_GB_SURFACE */
2204
2205/*
2206 * Invalidate a sub rect of an image in a guest-backed surface. After
2207 * issuing this command the driver is required to issue an update call
2208 * of the same region before issuing any other commands that reference
2209 * this surface or rendering is not guaranteed.
2210 */
2211
2212typedef
2213struct SVGA3dCmdInvalidateGBImagePartial {
2214 SVGA3dSurfaceImageId image;
2215 SVGA3dBox box;
2216 uint32 invertBox;
2217}
2218SVGA3dCmdInvalidateGBImagePartial; /* SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL */
2219
2220/*
2221 * Define a guest-backed context.
2222 */
2223
2224typedef
2225struct SVGA3dCmdDefineGBContext {
2226 uint32 cid;
2227} SVGA3dCmdDefineGBContext; /* SVGA_3D_CMD_DEFINE_GB_CONTEXT */
2228
2229/*
2230 * Destroy a guest-backed context.
2231 */
2232
2233typedef
2234struct SVGA3dCmdDestroyGBContext {
2235 uint32 cid;
2236} SVGA3dCmdDestroyGBContext; /* SVGA_3D_CMD_DESTROY_GB_CONTEXT */
2237
2238/*
2239 * Bind a guest-backed context.
2240 *
2241 * validContents should be set to 0 for new contexts,
2242 * and 1 if this is an old context which is getting paged
2243 * back on to the device.
2244 *
2245 * For new contexts, it is recommended that the driver
2246 * issue commands to initialize all interesting state
2247 * prior to rendering.
2248 */
2249
2250typedef
2251struct SVGA3dCmdBindGBContext {
2252 uint32 cid;
2253 SVGAMobId mobid;
2254 uint32 validContents;
2255} SVGA3dCmdBindGBContext; /* SVGA_3D_CMD_BIND_GB_CONTEXT */
2256
2257/*
2258 * Readback a guest-backed context.
2259 * (Request that the device flush the contents back into guest memory.)
2260 */
2261
2262typedef
2263struct SVGA3dCmdReadbackGBContext {
2264 uint32 cid;
2265} SVGA3dCmdReadbackGBContext; /* SVGA_3D_CMD_READBACK_GB_CONTEXT */
2266
2267/*
2268 * Invalidate a guest-backed context.
2269 */
2270typedef
2271struct SVGA3dCmdInvalidateGBContext {
2272 uint32 cid;
2273} SVGA3dCmdInvalidateGBContext; /* SVGA_3D_CMD_INVALIDATE_GB_CONTEXT */
2274
2275/*
2276 * Define a guest-backed shader.
2277 */
2278
2279typedef
2280struct SVGA3dCmdDefineGBShader {
2281 uint32 shid;
2282 SVGA3dShaderType type;
2283 uint32 sizeInBytes;
2284} SVGA3dCmdDefineGBShader; /* SVGA_3D_CMD_DEFINE_GB_SHADER */
2285
2286/*
2287 * Bind a guest-backed shader.
2288 */
2289
2290typedef struct SVGA3dCmdBindGBShader {
2291 uint32 shid;
2292 SVGAMobId mobid;
2293 uint32 offsetInBytes;
2294} SVGA3dCmdBindGBShader; /* SVGA_3D_CMD_BIND_GB_SHADER */
2295
2296/*
2297 * Destroy a guest-backed shader.
2298 */
2299
2300typedef struct SVGA3dCmdDestroyGBShader {
2301 uint32 shid;
2302} SVGA3dCmdDestroyGBShader; /* SVGA_3D_CMD_DESTROY_GB_SHADER */
2303
2304typedef
2305struct {
2306 uint32 cid;
2307 uint32 regStart;
2308 SVGA3dShaderType shaderType;
2309 SVGA3dShaderConstType constType;
2310
2311 /*
2312 * Followed by a variable number of shader constants.
2313 *
2314 * Note that FLOAT and INT constants are 4-dwords in length, while
2315 * BOOL constants are 1-dword in length.
2316 */
2317} SVGA3dCmdSetGBShaderConstInline;
2318/* SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE */
2319
2320typedef
2321struct {
2322 uint32 cid;
2323 SVGA3dQueryType type;
2324} SVGA3dCmdBeginGBQuery; /* SVGA_3D_CMD_BEGIN_GB_QUERY */
2325
2326typedef
2327struct {
2328 uint32 cid;
2329 SVGA3dQueryType type;
2330 SVGAMobId mobid;
2331 uint32 offset;
2332} SVGA3dCmdEndGBQuery; /* SVGA_3D_CMD_END_GB_QUERY */
2333
2334
2335/*
2336 * SVGA_3D_CMD_WAIT_FOR_GB_QUERY --
2337 *
2338 * The semantics of this command are identical to the
2339 * SVGA_3D_CMD_WAIT_FOR_QUERY except that the results are written
2340 * to a Mob instead of a GMR.
2341 */
2342
2343typedef
2344struct {
2345 uint32 cid;
2346 SVGA3dQueryType type;
2347 SVGAMobId mobid;
2348 uint32 offset;
2349} SVGA3dCmdWaitForGBQuery; /* SVGA_3D_CMD_WAIT_FOR_GB_QUERY */
2350
2351typedef
2352struct {
2353 SVGAMobId mobid;
2354 uint32 fbOffset;
2355 uint32 initalized;
2356}
2357SVGA3dCmdEnableGart; /* SVGA_3D_CMD_ENABLE_GART */
2358
2359typedef
2360struct {
2361 SVGAMobId mobid;
2362 uint32 gartOffset;
2363}
2364SVGA3dCmdMapMobIntoGart; /* SVGA_3D_CMD_MAP_MOB_INTO_GART */
2365
2366
2367typedef
2368struct {
2369 uint32 gartOffset;
2370 uint32 numPages;
2371}
2372SVGA3dCmdUnmapGartRange; /* SVGA_3D_CMD_UNMAP_GART_RANGE */
2373
2374
2375/*
2376 * Screen Targets
2377 */
2378#define SVGA_STFLAG_PRIMARY (1 << 0)
2379
2380typedef
2381struct {
2382 uint32 stid;
2383 uint32 width;
2384 uint32 height;
2385 int32 xRoot;
2386 int32 yRoot;
2387 uint32 flags;
2388}
2389SVGA3dCmdDefineGBScreenTarget; /* SVGA_3D_CMD_DEFINE_GB_SCREENTARGET */
2390
2391typedef
2392struct {
2393 uint32 stid;
2394}
2395SVGA3dCmdDestroyGBScreenTarget; /* SVGA_3D_CMD_DESTROY_GB_SCREENTARGET */
2396
2397typedef
2398struct {
2399 uint32 stid;
2400 SVGA3dSurfaceImageId image;
2401}
2402SVGA3dCmdBindGBScreenTarget; /* SVGA_3D_CMD_BIND_GB_SCREENTARGET */
2403
2404typedef
2405struct {
2406 uint32 stid;
2407 SVGA3dBox box;
2408}
2409SVGA3dCmdUpdateGBScreenTarget; /* SVGA_3D_CMD_UPDATE_GB_SCREENTARGET */
2410
2411/*
1753 * Capability query index. 2412 * Capability query index.
1754 * 2413 *
1755 * Notes: 2414 * Notes:
@@ -1879,10 +2538,41 @@ typedef enum {
1879 SVGA3D_DEVCAP_SURFACEFMT_BC5_UNORM = 83, 2538 SVGA3D_DEVCAP_SURFACEFMT_BC5_UNORM = 83,
1880 2539
1881 /* 2540 /*
1882 * Don't add new caps into the previous section; the values in this 2541 * Deprecated.
1883 * enumeration must not change. You can put new values right before
1884 * SVGA3D_DEVCAP_MAX.
1885 */ 2542 */
2543 SVGA3D_DEVCAP_VGPU10 = 84,
2544
2545 /*
2546 * This contains several SVGA_3D_CAPS_VIDEO_DECODE elements
2547 * ored together, one for every type of video decoding supported.
2548 */
2549 SVGA3D_DEVCAP_VIDEO_DECODE = 85,
2550
2551 /*
2552 * This contains several SVGA_3D_CAPS_VIDEO_PROCESS elements
2553 * ored together, one for every type of video processing supported.
2554 */
2555 SVGA3D_DEVCAP_VIDEO_PROCESS = 86,
2556
2557 SVGA3D_DEVCAP_LINE_AA = 87, /* boolean */
2558 SVGA3D_DEVCAP_LINE_STIPPLE = 88, /* boolean */
2559 SVGA3D_DEVCAP_MAX_LINE_WIDTH = 89, /* float */
2560 SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH = 90, /* float */
2561
2562 SVGA3D_DEVCAP_SURFACEFMT_YV12 = 91,
2563
2564 /*
2565 * Does the host support the SVGA logic ops commands?
2566 */
2567 SVGA3D_DEVCAP_LOGICOPS = 92,
2568
2569 /*
2570 * What support does the host have for screen targets?
2571 *
2572 * See the SVGA3D_SCREENTARGET_CAP bits below.
2573 */
2574 SVGA3D_DEVCAP_SCREENTARGETS = 93,
2575
1886 SVGA3D_DEVCAP_MAX /* This must be the last index. */ 2576 SVGA3D_DEVCAP_MAX /* This must be the last index. */
1887} SVGA3dDevCapIndex; 2577} SVGA3dDevCapIndex;
1888 2578