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authorDave Airlie <airlied@redhat.com>2012-06-26 09:53:07 -0400
committerDave Airlie <airlied@redhat.com>2012-07-19 22:30:41 -0400
commit5bd42f69fbedfc12cd8161323a9ffab0b2586a2a (patch)
tree4f93c5ea1b0cee258669d60fce900b5b92f31dea /drivers/gpu/drm/udl
parent197bbb3d464f33eac1b458e83c1929d2f268d4c9 (diff)
drm/udl: port over blanking code from udlfb.
This ports over the dpms code from udlfb, and should mean a better chance of turning on some udl devices. Signed-off-by: Dave Airlie <airlied@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/udl')
-rw-r--r--drivers/gpu/drm/udl/udl_modeset.c44
1 files changed, 37 insertions, 7 deletions
diff --git a/drivers/gpu/drm/udl/udl_modeset.c b/drivers/gpu/drm/udl/udl_modeset.c
index ac2d717714ce..f5dd89e891de 100644
--- a/drivers/gpu/drm/udl/udl_modeset.c
+++ b/drivers/gpu/drm/udl/udl_modeset.c
@@ -45,12 +45,25 @@ static char *udl_vidreg_unlock(char *buf)
45 * 0x01 H and V sync off (screen blank but powered) 45 * 0x01 H and V sync off (screen blank but powered)
46 * 0x07 DPMS powerdown (requires modeset to come back) 46 * 0x07 DPMS powerdown (requires modeset to come back)
47 */ 47 */
48static char *udl_enable_hvsync(char *buf, bool enable) 48static char *udl_set_blank(char *buf, int dpms_mode)
49{ 49{
50 if (enable) 50 u8 reg;
51 return udl_set_register(buf, 0x1F, 0x00); 51 switch (dpms_mode) {
52 else 52 case DRM_MODE_DPMS_OFF:
53 return udl_set_register(buf, 0x1F, 0x07); 53 reg = 0x07;
54 break;
55 case DRM_MODE_DPMS_STANDBY:
56 reg = 0x05;
57 break;
58 case DRM_MODE_DPMS_SUSPEND:
59 reg = 0x01;
60 break;
61 case DRM_MODE_DPMS_ON:
62 reg = 0x00;
63 break;
64 }
65
66 return udl_set_register(buf, 0x1f, reg);
54} 67}
55 68
56static char *udl_set_color_depth(char *buf, u8 selection) 69static char *udl_set_color_depth(char *buf, u8 selection)
@@ -199,6 +212,20 @@ static char *udl_set_vid_cmds(char *wrptr, struct drm_display_mode *mode)
199 return wrptr; 212 return wrptr;
200} 213}
201 214
215static char *udl_dummy_render(char *wrptr)
216{
217 *wrptr++ = 0xAF;
218 *wrptr++ = 0x6A; /* copy */
219 *wrptr++ = 0x00; /* from addr */
220 *wrptr++ = 0x00;
221 *wrptr++ = 0x00;
222 *wrptr++ = 0x01; /* one pixel */
223 *wrptr++ = 0x00; /* to address */
224 *wrptr++ = 0x00;
225 *wrptr++ = 0x00;
226 return wrptr;
227}
228
202static int udl_crtc_write_mode_to_hw(struct drm_crtc *crtc) 229static int udl_crtc_write_mode_to_hw(struct drm_crtc *crtc)
203{ 230{
204 struct drm_device *dev = crtc->dev; 231 struct drm_device *dev = crtc->dev;
@@ -235,9 +262,10 @@ static void udl_crtc_dpms(struct drm_crtc *crtc, int mode)
235 262
236 buf = (char *)urb->transfer_buffer; 263 buf = (char *)urb->transfer_buffer;
237 buf = udl_vidreg_lock(buf); 264 buf = udl_vidreg_lock(buf);
238 buf = udl_enable_hvsync(buf, false); 265 buf = udl_set_blank(buf, mode);
239 buf = udl_vidreg_unlock(buf); 266 buf = udl_vidreg_unlock(buf);
240 267
268 buf = udl_dummy_render(buf);
241 retval = udl_submit_urb(dev, urb, buf - (char *) 269 retval = udl_submit_urb(dev, urb, buf - (char *)
242 urb->transfer_buffer); 270 urb->transfer_buffer);
243 } else { 271 } else {
@@ -306,9 +334,11 @@ static int udl_crtc_mode_set(struct drm_crtc *crtc,
306 wrptr = udl_set_base8bpp(wrptr, 2 * mode->vdisplay * mode->hdisplay); 334 wrptr = udl_set_base8bpp(wrptr, 2 * mode->vdisplay * mode->hdisplay);
307 335
308 wrptr = udl_set_vid_cmds(wrptr, adjusted_mode); 336 wrptr = udl_set_vid_cmds(wrptr, adjusted_mode);
309 wrptr = udl_enable_hvsync(wrptr, true); 337 wrptr = udl_set_blank(wrptr, DRM_MODE_DPMS_ON);
310 wrptr = udl_vidreg_unlock(wrptr); 338 wrptr = udl_vidreg_unlock(wrptr);
311 339
340 wrptr = udl_dummy_render(wrptr);
341
312 ufb->active_16 = true; 342 ufb->active_16 = true;
313 if (old_fb) { 343 if (old_fb) {
314 struct udl_framebuffer *uold_fb = to_udl_fb(old_fb); 344 struct udl_framebuffer *uold_fb = to_udl_fb(old_fb);