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authorDmitry Osipenko <digetx@gmail.com>2014-02-11 12:12:27 -0500
committerThierry Reding <treding@nvidia.com>2014-02-12 01:50:38 -0500
commitb18915379071b31ea819a36ca67761620decba06 (patch)
tree78e1cda52853460cbec67248092516f4dcc687cf /drivers/gpu/drm/tegra/rgb.c
parent89e6e8c85f21555a763d0e47841b515ede6278d1 (diff)
drm/tegra: Add guard to avoid double disable/enable of RGB outputs
Add guard to check whether RGB output is already enabled in the way it's done for HDMI output. Fixes possible hang on trying to disable output twice (first time during driver probe and second on fb registering). Signed-off-by: Dmitry Osipenko <digetx@gmail.com> Signed-off-by: Thierry Reding <treding@nvidia.com>
Diffstat (limited to 'drivers/gpu/drm/tegra/rgb.c')
-rw-r--r--drivers/gpu/drm/tegra/rgb.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/gpu/drm/tegra/rgb.c b/drivers/gpu/drm/tegra/rgb.c
index 338f7f6561d7..0266fb40479e 100644
--- a/drivers/gpu/drm/tegra/rgb.c
+++ b/drivers/gpu/drm/tegra/rgb.c
@@ -15,6 +15,7 @@
15struct tegra_rgb { 15struct tegra_rgb {
16 struct tegra_output output; 16 struct tegra_output output;
17 struct tegra_dc *dc; 17 struct tegra_dc *dc;
18 bool enabled;
18 19
19 struct clk *clk_parent; 20 struct clk *clk_parent;
20 struct clk *clk; 21 struct clk *clk;
@@ -89,6 +90,9 @@ static int tegra_output_rgb_enable(struct tegra_output *output)
89 struct tegra_rgb *rgb = to_rgb(output); 90 struct tegra_rgb *rgb = to_rgb(output);
90 unsigned long value; 91 unsigned long value;
91 92
93 if (rgb->enabled)
94 return 0;
95
92 tegra_dc_write_regs(rgb->dc, rgb_enable, ARRAY_SIZE(rgb_enable)); 96 tegra_dc_write_regs(rgb->dc, rgb_enable, ARRAY_SIZE(rgb_enable));
93 97
94 value = DE_SELECT_ACTIVE | DE_CONTROL_NORMAL; 98 value = DE_SELECT_ACTIVE | DE_CONTROL_NORMAL;
@@ -122,6 +126,8 @@ static int tegra_output_rgb_enable(struct tegra_output *output)
122 tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL); 126 tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ << 8, DC_CMD_STATE_CONTROL);
123 tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL); 127 tegra_dc_writel(rgb->dc, GENERAL_ACT_REQ, DC_CMD_STATE_CONTROL);
124 128
129 rgb->enabled = true;
130
125 return 0; 131 return 0;
126} 132}
127 133
@@ -130,6 +136,9 @@ static int tegra_output_rgb_disable(struct tegra_output *output)
130 struct tegra_rgb *rgb = to_rgb(output); 136 struct tegra_rgb *rgb = to_rgb(output);
131 unsigned long value; 137 unsigned long value;
132 138
139 if (!rgb->enabled)
140 return 0;
141
133 value = tegra_dc_readl(rgb->dc, DC_CMD_DISPLAY_POWER_CONTROL); 142 value = tegra_dc_readl(rgb->dc, DC_CMD_DISPLAY_POWER_CONTROL);
134 value &= ~(PW0_ENABLE | PW1_ENABLE | PW2_ENABLE | PW3_ENABLE | 143 value &= ~(PW0_ENABLE | PW1_ENABLE | PW2_ENABLE | PW3_ENABLE |
135 PW4_ENABLE | PM0_ENABLE | PM1_ENABLE); 144 PW4_ENABLE | PM0_ENABLE | PM1_ENABLE);
@@ -144,6 +153,8 @@ static int tegra_output_rgb_disable(struct tegra_output *output)
144 153
145 tegra_dc_write_regs(rgb->dc, rgb_disable, ARRAY_SIZE(rgb_disable)); 154 tegra_dc_write_regs(rgb->dc, rgb_disable, ARRAY_SIZE(rgb_disable));
146 155
156 rgb->enabled = false;
157
147 return 0; 158 return 0;
148} 159}
149 160