drm/ttm: restructure to allow driver to plug in alternate memory manager

Nouveau will need this on GeForce 8 and up to account for the GPU
reordering physical VRAM for some memory types.

Reviewed-by: Jerome Glisse <jglisse@redhat.com>
Acked-by: Thomas Hellström <thellstrom@vmware.com>
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>

2 files changed, 12 insertions, 10 deletions

diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index 0afd1e62347d..c26106066ec2 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -435,7 +435,7 @@ int radeon_bo_get_surface_reg(struct radeon_bo *bo)
 
 out:
         radeon_set_surface_reg(rdev, i, bo->tiling_flags, bo->pitch,
-                               bo->tbo.mem.mm_node->start << PAGE_SHIFT,
+                               bo->tbo.mem.start << PAGE_SHIFT,
                                bo->tbo.num_pages << PAGE_SHIFT);
         return 0;
 }
@@ -532,7 +532,7 @@ int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
         rdev = rbo->rdev;
         if (bo->mem.mem_type == TTM_PL_VRAM) {
                 size = bo->mem.num_pages << PAGE_SHIFT;
-                offset = bo->mem.mm_node->start << PAGE_SHIFT;
+                offset = bo->mem.start << PAGE_SHIFT;
                 if ((offset + size) > rdev->mc.visible_vram_size) {
                         /* hurrah the memory is not visible ! */
                         radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM);
@@ -540,7 +540,7 @@ int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
                         r = ttm_bo_validate(bo, &rbo->placement, false, true, false);
                         if (unlikely(r != 0))
                                 return r;
-                        offset = bo->mem.mm_node->start << PAGE_SHIFT;
+                        offset = bo->mem.start << PAGE_SHIFT;
                         /* this should not happen */
                         if ((offset + size) > rdev->mc.visible_vram_size)
                                 return -EINVAL;
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index cc19aba9bb74..0921910698d4 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -152,6 +152,7 @@ static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
                 man->default_caching = TTM_PL_FLAG_CACHED;
                 break;
         case TTM_PL_TT:
+                man->func = &ttm_bo_manager_func;
                 man->gpu_offset = rdev->mc.gtt_start;
                 man->available_caching = TTM_PL_MASK_CACHING;
                 man->default_caching = TTM_PL_FLAG_CACHED;
@@ -173,6 +174,7 @@ static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
                 break;
         case TTM_PL_VRAM:
                 /* "On-card" video ram */
+                man->func = &ttm_bo_manager_func;
                 man->gpu_offset = rdev->mc.vram_start;
                 man->flags = TTM_MEMTYPE_FLAG_FIXED |
                              TTM_MEMTYPE_FLAG_MAPPABLE;
@@ -246,8 +248,8 @@ static int radeon_move_blit(struct ttm_buffer_object *bo,
         if (unlikely(r)) {
                 return r;
         }
-        old_start = old_mem->mm_node->start << PAGE_SHIFT;
-        new_start = new_mem->mm_node->start << PAGE_SHIFT;
+        old_start = old_mem->start << PAGE_SHIFT;
+        new_start = new_mem->start << PAGE_SHIFT;
 
         switch (old_mem->mem_type) {
         case TTM_PL_VRAM:
@@ -435,14 +437,14 @@ static int radeon_ttm_io_mem_reserve(struct ttm_bo_device *bdev, struct ttm_mem_
 #if __OS_HAS_AGP
                 if (rdev->flags & RADEON_IS_AGP) {
                         /* RADEON_IS_AGP is set only if AGP is active */
-                        mem->bus.offset = mem->mm_node->start << PAGE_SHIFT;
+                        mem->bus.offset = mem->start << PAGE_SHIFT;
                         mem->bus.base = rdev->mc.agp_base;
                         mem->bus.is_iomem = !rdev->ddev->agp->cant_use_aperture;
                 }
 #endif
                 break;
         case TTM_PL_VRAM:
-                mem->bus.offset = mem->mm_node->start << PAGE_SHIFT;
+                mem->bus.offset = mem->start << PAGE_SHIFT;
                 /* check if it's visible */
                 if ((mem->bus.offset + mem->bus.size) > rdev->mc.visible_vram_size)
                         return -EINVAL;
@@ -685,7 +687,7 @@ static int radeon_ttm_backend_bind(struct ttm_backend *backend,
         int r;
 
         gtt = container_of(backend, struct radeon_ttm_backend, backend);
-        gtt->offset = bo_mem->mm_node->start << PAGE_SHIFT;
+        gtt->offset = bo_mem->start << PAGE_SHIFT;
         if (!gtt->num_pages) {
                 WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n", gtt->num_pages, bo_mem, backend);
         }
@@ -784,9 +786,9 @@ static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
                 radeon_mem_types_list[i].show = &radeon_mm_dump_table;
                 radeon_mem_types_list[i].driver_features = 0;
                 if (i == 0)
-                        radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_VRAM].manager;
+                        radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_VRAM].priv;
                 else
-                        radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_TT].manager;
+                        radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_TT].priv;
 
         }
         /* Add ttm page pool to debugfs */