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authorDave Airlie <airlied@gmail.com>2015-01-28 20:45:31 -0500
committerDave Airlie <airlied@gmail.com>2015-01-28 20:45:31 -0500
commitb3869b17fd63bacb53ac4db4ff4ba093701e17be (patch)
tree073873d62957033f317bc413d9ea9fd5d5ff5a50 /drivers/gpu/drm/radeon
parent7b83741bf76caad72bc8a701c26dde8d6751ff0f (diff)
parentc59c961ca511dc7ee2f4f7e9c224d16f5c76ca6e (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux into drm-next
This backmerges drm-fixes into drm-next mainly for the amdkfd stuff, I'm not 100% confident, but it builds and the amdkfd folks can fix anything up. Signed-off-by: Dave Airlie <airlied@redhat.com> Conflicts: drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
Diffstat (limited to 'drivers/gpu/drm/radeon')
-rw-r--r--drivers/gpu/drm/radeon/cik_sdma.c1
-rw-r--r--drivers/gpu/drm/radeon/ni_dma.c1
-rw-r--r--drivers/gpu/drm/radeon/r100.c10
-rw-r--r--drivers/gpu/drm/radeon/r300.c16
-rw-r--r--drivers/gpu/drm/radeon/radeon.h9
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.c24
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h12
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_gart.c54
-rw-r--r--drivers/gpu/drm/radeon/radeon_kfd.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_vm.c6
-rw-r--r--drivers/gpu/drm/radeon/rs400.c14
-rw-r--r--drivers/gpu/drm/radeon/rs600.c14
-rw-r--r--drivers/gpu/drm/radeon/si_dma.c1
14 files changed, 112 insertions, 54 deletions
diff --git a/drivers/gpu/drm/radeon/cik_sdma.c b/drivers/gpu/drm/radeon/cik_sdma.c
index 7d2ff31c35a5..f86eb54e7763 100644
--- a/drivers/gpu/drm/radeon/cik_sdma.c
+++ b/drivers/gpu/drm/radeon/cik_sdma.c
@@ -845,7 +845,6 @@ void cik_sdma_vm_write_pages(struct radeon_device *rdev,
845 for (; ndw > 0; ndw -= 2, --count, pe += 8) { 845 for (; ndw > 0; ndw -= 2, --count, pe += 8) {
846 if (flags & R600_PTE_SYSTEM) { 846 if (flags & R600_PTE_SYSTEM) {
847 value = radeon_vm_map_gart(rdev, addr); 847 value = radeon_vm_map_gart(rdev, addr);
848 value &= 0xFFFFFFFFFFFFF000ULL;
849 } else if (flags & R600_PTE_VALID) { 848 } else if (flags & R600_PTE_VALID) {
850 value = addr; 849 value = addr;
851 } else { 850 } else {
diff --git a/drivers/gpu/drm/radeon/ni_dma.c b/drivers/gpu/drm/radeon/ni_dma.c
index 4be2bb7cbef3..ce787a9f12c0 100644
--- a/drivers/gpu/drm/radeon/ni_dma.c
+++ b/drivers/gpu/drm/radeon/ni_dma.c
@@ -372,7 +372,6 @@ void cayman_dma_vm_write_pages(struct radeon_device *rdev,
372 for (; ndw > 0; ndw -= 2, --count, pe += 8) { 372 for (; ndw > 0; ndw -= 2, --count, pe += 8) {
373 if (flags & R600_PTE_SYSTEM) { 373 if (flags & R600_PTE_SYSTEM) {
374 value = radeon_vm_map_gart(rdev, addr); 374 value = radeon_vm_map_gart(rdev, addr);
375 value &= 0xFFFFFFFFFFFFF000ULL;
376 } else if (flags & R600_PTE_VALID) { 375 } else if (flags & R600_PTE_VALID) {
377 value = addr; 376 value = addr;
378 } else { 377 } else {
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 74f06d540591..279801ca5110 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -644,6 +644,7 @@ int r100_pci_gart_init(struct radeon_device *rdev)
644 return r; 644 return r;
645 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; 645 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4;
646 rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush; 646 rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush;
647 rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry;
647 rdev->asic->gart.set_page = &r100_pci_gart_set_page; 648 rdev->asic->gart.set_page = &r100_pci_gart_set_page;
648 return radeon_gart_table_ram_alloc(rdev); 649 return radeon_gart_table_ram_alloc(rdev);
649} 650}
@@ -681,11 +682,16 @@ void r100_pci_gart_disable(struct radeon_device *rdev)
681 WREG32(RADEON_AIC_HI_ADDR, 0); 682 WREG32(RADEON_AIC_HI_ADDR, 0);
682} 683}
683 684
685uint64_t r100_pci_gart_get_page_entry(uint64_t addr, uint32_t flags)
686{
687 return addr;
688}
689
684void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i, 690void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i,
685 uint64_t addr, uint32_t flags) 691 uint64_t entry)
686{ 692{
687 u32 *gtt = rdev->gart.ptr; 693 u32 *gtt = rdev->gart.ptr;
688 gtt[i] = cpu_to_le32(lower_32_bits(addr)); 694 gtt[i] = cpu_to_le32(lower_32_bits(entry));
689} 695}
690 696
691void r100_pci_gart_fini(struct radeon_device *rdev) 697void r100_pci_gart_fini(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 064ad5569cca..08d68f3e13e9 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -73,11 +73,8 @@ void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev)
73#define R300_PTE_WRITEABLE (1 << 2) 73#define R300_PTE_WRITEABLE (1 << 2)
74#define R300_PTE_READABLE (1 << 3) 74#define R300_PTE_READABLE (1 << 3)
75 75
76void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i, 76uint64_t rv370_pcie_gart_get_page_entry(uint64_t addr, uint32_t flags)
77 uint64_t addr, uint32_t flags)
78{ 77{
79 void __iomem *ptr = rdev->gart.ptr;
80
81 addr = (lower_32_bits(addr) >> 8) | 78 addr = (lower_32_bits(addr) >> 8) |
82 ((upper_32_bits(addr) & 0xff) << 24); 79 ((upper_32_bits(addr) & 0xff) << 24);
83 if (flags & RADEON_GART_PAGE_READ) 80 if (flags & RADEON_GART_PAGE_READ)
@@ -86,10 +83,18 @@ void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i,
86 addr |= R300_PTE_WRITEABLE; 83 addr |= R300_PTE_WRITEABLE;
87 if (!(flags & RADEON_GART_PAGE_SNOOP)) 84 if (!(flags & RADEON_GART_PAGE_SNOOP))
88 addr |= R300_PTE_UNSNOOPED; 85 addr |= R300_PTE_UNSNOOPED;
86 return addr;
87}
88
89void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i,
90 uint64_t entry)
91{
92 void __iomem *ptr = rdev->gart.ptr;
93
89 /* on x86 we want this to be CPU endian, on powerpc 94 /* on x86 we want this to be CPU endian, on powerpc
90 * on powerpc without HW swappers, it'll get swapped on way 95 * on powerpc without HW swappers, it'll get swapped on way
91 * into VRAM - so no need for cpu_to_le32 on VRAM tables */ 96 * into VRAM - so no need for cpu_to_le32 on VRAM tables */
92 writel(addr, ((void __iomem *)ptr) + (i * 4)); 97 writel(entry, ((void __iomem *)ptr) + (i * 4));
93} 98}
94 99
95int rv370_pcie_gart_init(struct radeon_device *rdev) 100int rv370_pcie_gart_init(struct radeon_device *rdev)
@@ -109,6 +114,7 @@ int rv370_pcie_gart_init(struct radeon_device *rdev)
109 DRM_ERROR("Failed to register debugfs file for PCIE gart !\n"); 114 DRM_ERROR("Failed to register debugfs file for PCIE gart !\n");
110 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; 115 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4;
111 rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush; 116 rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush;
117 rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry;
112 rdev->asic->gart.set_page = &rv370_pcie_gart_set_page; 118 rdev->asic->gart.set_page = &rv370_pcie_gart_set_page;
113 return radeon_gart_table_vram_alloc(rdev); 119 return radeon_gart_table_vram_alloc(rdev);
114} 120}
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 93e407b7e7a7..5587603b4a89 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -242,6 +242,7 @@ bool radeon_get_bios(struct radeon_device *rdev);
242 * Dummy page 242 * Dummy page
243 */ 243 */
244struct radeon_dummy_page { 244struct radeon_dummy_page {
245 uint64_t entry;
245 struct page *page; 246 struct page *page;
246 dma_addr_t addr; 247 dma_addr_t addr;
247}; 248};
@@ -645,7 +646,7 @@ struct radeon_gart {
645 unsigned num_cpu_pages; 646 unsigned num_cpu_pages;
646 unsigned table_size; 647 unsigned table_size;
647 struct page **pages; 648 struct page **pages;
648 dma_addr_t *pages_addr; 649 uint64_t *pages_entry;
649 bool ready; 650 bool ready;
650}; 651};
651 652
@@ -1858,8 +1859,9 @@ struct radeon_asic {
1858 /* gart */ 1859 /* gart */
1859 struct { 1860 struct {
1860 void (*tlb_flush)(struct radeon_device *rdev); 1861 void (*tlb_flush)(struct radeon_device *rdev);
1862 uint64_t (*get_page_entry)(uint64_t addr, uint32_t flags);
1861 void (*set_page)(struct radeon_device *rdev, unsigned i, 1863 void (*set_page)(struct radeon_device *rdev, unsigned i,
1862 uint64_t addr, uint32_t flags); 1864 uint64_t entry);
1863 } gart; 1865 } gart;
1864 struct { 1866 struct {
1865 int (*init)(struct radeon_device *rdev); 1867 int (*init)(struct radeon_device *rdev);
@@ -2867,7 +2869,8 @@ static inline void radeon_ring_write(struct radeon_ring *ring, uint32_t v)
2867#define radeon_vga_set_state(rdev, state) (rdev)->asic->vga_set_state((rdev), (state)) 2869#define radeon_vga_set_state(rdev, state) (rdev)->asic->vga_set_state((rdev), (state))
2868#define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev)) 2870#define radeon_asic_reset(rdev) (rdev)->asic->asic_reset((rdev))
2869#define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart.tlb_flush((rdev)) 2871#define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart.tlb_flush((rdev))
2870#define radeon_gart_set_page(rdev, i, p, f) (rdev)->asic->gart.set_page((rdev), (i), (p), (f)) 2872#define radeon_gart_get_page_entry(a, f) (rdev)->asic->gart.get_page_entry((a), (f))
2873#define radeon_gart_set_page(rdev, i, e) (rdev)->asic->gart.set_page((rdev), (i), (e))
2871#define radeon_asic_vm_init(rdev) (rdev)->asic->vm.init((rdev)) 2874#define radeon_asic_vm_init(rdev) (rdev)->asic->vm.init((rdev))
2872#define radeon_asic_vm_fini(rdev) (rdev)->asic->vm.fini((rdev)) 2875#define radeon_asic_vm_fini(rdev) (rdev)->asic->vm.fini((rdev))
2873#define radeon_asic_vm_copy_pages(rdev, ib, pe, src, count) ((rdev)->asic->vm.copy_pages((rdev), (ib), (pe), (src), (count))) 2876#define radeon_asic_vm_copy_pages(rdev, ib, pe, src, count) ((rdev)->asic->vm.copy_pages((rdev), (ib), (pe), (src), (count)))
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c
index f811ee14a237..c0ecd128b14b 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.c
+++ b/drivers/gpu/drm/radeon/radeon_asic.c
@@ -159,11 +159,13 @@ void radeon_agp_disable(struct radeon_device *rdev)
159 DRM_INFO("Forcing AGP to PCIE mode\n"); 159 DRM_INFO("Forcing AGP to PCIE mode\n");
160 rdev->flags |= RADEON_IS_PCIE; 160 rdev->flags |= RADEON_IS_PCIE;
161 rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush; 161 rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush;
162 rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry;
162 rdev->asic->gart.set_page = &rv370_pcie_gart_set_page; 163 rdev->asic->gart.set_page = &rv370_pcie_gart_set_page;
163 } else { 164 } else {
164 DRM_INFO("Forcing AGP to PCI mode\n"); 165 DRM_INFO("Forcing AGP to PCI mode\n");
165 rdev->flags |= RADEON_IS_PCI; 166 rdev->flags |= RADEON_IS_PCI;
166 rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush; 167 rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush;
168 rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry;
167 rdev->asic->gart.set_page = &r100_pci_gart_set_page; 169 rdev->asic->gart.set_page = &r100_pci_gart_set_page;
168 } 170 }
169 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024; 171 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
@@ -199,6 +201,7 @@ static struct radeon_asic r100_asic = {
199 .mc_wait_for_idle = &r100_mc_wait_for_idle, 201 .mc_wait_for_idle = &r100_mc_wait_for_idle,
200 .gart = { 202 .gart = {
201 .tlb_flush = &r100_pci_gart_tlb_flush, 203 .tlb_flush = &r100_pci_gart_tlb_flush,
204 .get_page_entry = &r100_pci_gart_get_page_entry,
202 .set_page = &r100_pci_gart_set_page, 205 .set_page = &r100_pci_gart_set_page,
203 }, 206 },
204 .ring = { 207 .ring = {
@@ -265,6 +268,7 @@ static struct radeon_asic r200_asic = {
265 .mc_wait_for_idle = &r100_mc_wait_for_idle, 268 .mc_wait_for_idle = &r100_mc_wait_for_idle,
266 .gart = { 269 .gart = {
267 .tlb_flush = &r100_pci_gart_tlb_flush, 270 .tlb_flush = &r100_pci_gart_tlb_flush,
271 .get_page_entry = &r100_pci_gart_get_page_entry,
268 .set_page = &r100_pci_gart_set_page, 272 .set_page = &r100_pci_gart_set_page,
269 }, 273 },
270 .ring = { 274 .ring = {
@@ -359,6 +363,7 @@ static struct radeon_asic r300_asic = {
359 .mc_wait_for_idle = &r300_mc_wait_for_idle, 363 .mc_wait_for_idle = &r300_mc_wait_for_idle,
360 .gart = { 364 .gart = {
361 .tlb_flush = &r100_pci_gart_tlb_flush, 365 .tlb_flush = &r100_pci_gart_tlb_flush,
366 .get_page_entry = &r100_pci_gart_get_page_entry,
362 .set_page = &r100_pci_gart_set_page, 367 .set_page = &r100_pci_gart_set_page,
363 }, 368 },
364 .ring = { 369 .ring = {
@@ -425,6 +430,7 @@ static struct radeon_asic r300_asic_pcie = {
425 .mc_wait_for_idle = &r300_mc_wait_for_idle, 430 .mc_wait_for_idle = &r300_mc_wait_for_idle,
426 .gart = { 431 .gart = {
427 .tlb_flush = &rv370_pcie_gart_tlb_flush, 432 .tlb_flush = &rv370_pcie_gart_tlb_flush,
433 .get_page_entry = &rv370_pcie_gart_get_page_entry,
428 .set_page = &rv370_pcie_gart_set_page, 434 .set_page = &rv370_pcie_gart_set_page,
429 }, 435 },
430 .ring = { 436 .ring = {
@@ -491,6 +497,7 @@ static struct radeon_asic r420_asic = {
491 .mc_wait_for_idle = &r300_mc_wait_for_idle, 497 .mc_wait_for_idle = &r300_mc_wait_for_idle,
492 .gart = { 498 .gart = {
493 .tlb_flush = &rv370_pcie_gart_tlb_flush, 499 .tlb_flush = &rv370_pcie_gart_tlb_flush,
500 .get_page_entry = &rv370_pcie_gart_get_page_entry,
494 .set_page = &rv370_pcie_gart_set_page, 501 .set_page = &rv370_pcie_gart_set_page,
495 }, 502 },
496 .ring = { 503 .ring = {
@@ -557,6 +564,7 @@ static struct radeon_asic rs400_asic = {
557 .mc_wait_for_idle = &rs400_mc_wait_for_idle, 564 .mc_wait_for_idle = &rs400_mc_wait_for_idle,
558 .gart = { 565 .gart = {
559 .tlb_flush = &rs400_gart_tlb_flush, 566 .tlb_flush = &rs400_gart_tlb_flush,
567 .get_page_entry = &rs400_gart_get_page_entry,
560 .set_page = &rs400_gart_set_page, 568 .set_page = &rs400_gart_set_page,
561 }, 569 },
562 .ring = { 570 .ring = {
@@ -623,6 +631,7 @@ static struct radeon_asic rs600_asic = {
623 .mc_wait_for_idle = &rs600_mc_wait_for_idle, 631 .mc_wait_for_idle = &rs600_mc_wait_for_idle,
624 .gart = { 632 .gart = {
625 .tlb_flush = &rs600_gart_tlb_flush, 633 .tlb_flush = &rs600_gart_tlb_flush,
634 .get_page_entry = &rs600_gart_get_page_entry,
626 .set_page = &rs600_gart_set_page, 635 .set_page = &rs600_gart_set_page,
627 }, 636 },
628 .ring = { 637 .ring = {
@@ -689,6 +698,7 @@ static struct radeon_asic rs690_asic = {
689 .mc_wait_for_idle = &rs690_mc_wait_for_idle, 698 .mc_wait_for_idle = &rs690_mc_wait_for_idle,
690 .gart = { 699 .gart = {
691 .tlb_flush = &rs400_gart_tlb_flush, 700 .tlb_flush = &rs400_gart_tlb_flush,
701 .get_page_entry = &rs400_gart_get_page_entry,
692 .set_page = &rs400_gart_set_page, 702 .set_page = &rs400_gart_set_page,
693 }, 703 },
694 .ring = { 704 .ring = {
@@ -755,6 +765,7 @@ static struct radeon_asic rv515_asic = {
755 .mc_wait_for_idle = &rv515_mc_wait_for_idle, 765 .mc_wait_for_idle = &rv515_mc_wait_for_idle,
756 .gart = { 766 .gart = {
757 .tlb_flush = &rv370_pcie_gart_tlb_flush, 767 .tlb_flush = &rv370_pcie_gart_tlb_flush,
768 .get_page_entry = &rv370_pcie_gart_get_page_entry,
758 .set_page = &rv370_pcie_gart_set_page, 769 .set_page = &rv370_pcie_gart_set_page,
759 }, 770 },
760 .ring = { 771 .ring = {
@@ -821,6 +832,7 @@ static struct radeon_asic r520_asic = {
821 .mc_wait_for_idle = &r520_mc_wait_for_idle, 832 .mc_wait_for_idle = &r520_mc_wait_for_idle,
822 .gart = { 833 .gart = {
823 .tlb_flush = &rv370_pcie_gart_tlb_flush, 834 .tlb_flush = &rv370_pcie_gart_tlb_flush,
835 .get_page_entry = &rv370_pcie_gart_get_page_entry,
824 .set_page = &rv370_pcie_gart_set_page, 836 .set_page = &rv370_pcie_gart_set_page,
825 }, 837 },
826 .ring = { 838 .ring = {
@@ -915,6 +927,7 @@ static struct radeon_asic r600_asic = {
915 .get_gpu_clock_counter = &r600_get_gpu_clock_counter, 927 .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
916 .gart = { 928 .gart = {
917 .tlb_flush = &r600_pcie_gart_tlb_flush, 929 .tlb_flush = &r600_pcie_gart_tlb_flush,
930 .get_page_entry = &rs600_gart_get_page_entry,
918 .set_page = &rs600_gart_set_page, 931 .set_page = &rs600_gart_set_page,
919 }, 932 },
920 .ring = { 933 .ring = {
@@ -998,6 +1011,7 @@ static struct radeon_asic rv6xx_asic = {
998 .get_gpu_clock_counter = &r600_get_gpu_clock_counter, 1011 .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
999 .gart = { 1012 .gart = {
1000 .tlb_flush = &r600_pcie_gart_tlb_flush, 1013 .tlb_flush = &r600_pcie_gart_tlb_flush,
1014 .get_page_entry = &rs600_gart_get_page_entry,
1001 .set_page = &rs600_gart_set_page, 1015 .set_page = &rs600_gart_set_page,
1002 }, 1016 },
1003 .ring = { 1017 .ring = {
@@ -1087,6 +1101,7 @@ static struct radeon_asic rs780_asic = {
1087 .get_gpu_clock_counter = &r600_get_gpu_clock_counter, 1101 .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
1088 .gart = { 1102 .gart = {
1089 .tlb_flush = &r600_pcie_gart_tlb_flush, 1103 .tlb_flush = &r600_pcie_gart_tlb_flush,
1104 .get_page_entry = &rs600_gart_get_page_entry,
1090 .set_page = &rs600_gart_set_page, 1105 .set_page = &rs600_gart_set_page,
1091 }, 1106 },
1092 .ring = { 1107 .ring = {
@@ -1189,6 +1204,7 @@ static struct radeon_asic rv770_asic = {
1189 .get_gpu_clock_counter = &r600_get_gpu_clock_counter, 1204 .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
1190 .gart = { 1205 .gart = {
1191 .tlb_flush = &r600_pcie_gart_tlb_flush, 1206 .tlb_flush = &r600_pcie_gart_tlb_flush,
1207 .get_page_entry = &rs600_gart_get_page_entry,
1192 .set_page = &rs600_gart_set_page, 1208 .set_page = &rs600_gart_set_page,
1193 }, 1209 },
1194 .ring = { 1210 .ring = {
@@ -1305,6 +1321,7 @@ static struct radeon_asic evergreen_asic = {
1305 .get_gpu_clock_counter = &r600_get_gpu_clock_counter, 1321 .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
1306 .gart = { 1322 .gart = {
1307 .tlb_flush = &evergreen_pcie_gart_tlb_flush, 1323 .tlb_flush = &evergreen_pcie_gart_tlb_flush,
1324 .get_page_entry = &rs600_gart_get_page_entry,
1308 .set_page = &rs600_gart_set_page, 1325 .set_page = &rs600_gart_set_page,
1309 }, 1326 },
1310 .ring = { 1327 .ring = {
@@ -1395,6 +1412,7 @@ static struct radeon_asic sumo_asic = {
1395 .get_gpu_clock_counter = &r600_get_gpu_clock_counter, 1412 .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
1396 .gart = { 1413 .gart = {
1397 .tlb_flush = &evergreen_pcie_gart_tlb_flush, 1414 .tlb_flush = &evergreen_pcie_gart_tlb_flush,
1415 .get_page_entry = &rs600_gart_get_page_entry,
1398 .set_page = &rs600_gart_set_page, 1416 .set_page = &rs600_gart_set_page,
1399 }, 1417 },
1400 .ring = { 1418 .ring = {
@@ -1484,6 +1502,7 @@ static struct radeon_asic btc_asic = {
1484 .get_gpu_clock_counter = &r600_get_gpu_clock_counter, 1502 .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
1485 .gart = { 1503 .gart = {
1486 .tlb_flush = &evergreen_pcie_gart_tlb_flush, 1504 .tlb_flush = &evergreen_pcie_gart_tlb_flush,
1505 .get_page_entry = &rs600_gart_get_page_entry,
1487 .set_page = &rs600_gart_set_page, 1506 .set_page = &rs600_gart_set_page,
1488 }, 1507 },
1489 .ring = { 1508 .ring = {
@@ -1617,6 +1636,7 @@ static struct radeon_asic cayman_asic = {
1617 .get_gpu_clock_counter = &r600_get_gpu_clock_counter, 1636 .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
1618 .gart = { 1637 .gart = {
1619 .tlb_flush = &cayman_pcie_gart_tlb_flush, 1638 .tlb_flush = &cayman_pcie_gart_tlb_flush,
1639 .get_page_entry = &rs600_gart_get_page_entry,
1620 .set_page = &rs600_gart_set_page, 1640 .set_page = &rs600_gart_set_page,
1621 }, 1641 },
1622 .vm = { 1642 .vm = {
@@ -1718,6 +1738,7 @@ static struct radeon_asic trinity_asic = {
1718 .get_gpu_clock_counter = &r600_get_gpu_clock_counter, 1738 .get_gpu_clock_counter = &r600_get_gpu_clock_counter,
1719 .gart = { 1739 .gart = {
1720 .tlb_flush = &cayman_pcie_gart_tlb_flush, 1740 .tlb_flush = &cayman_pcie_gart_tlb_flush,
1741 .get_page_entry = &rs600_gart_get_page_entry,
1721 .set_page = &rs600_gart_set_page, 1742 .set_page = &rs600_gart_set_page,
1722 }, 1743 },
1723 .vm = { 1744 .vm = {
@@ -1849,6 +1870,7 @@ static struct radeon_asic si_asic = {
1849 .get_gpu_clock_counter = &si_get_gpu_clock_counter, 1870 .get_gpu_clock_counter = &si_get_gpu_clock_counter,
1850 .gart = { 1871 .gart = {
1851 .tlb_flush = &si_pcie_gart_tlb_flush, 1872 .tlb_flush = &si_pcie_gart_tlb_flush,
1873 .get_page_entry = &rs600_gart_get_page_entry,
1852 .set_page = &rs600_gart_set_page, 1874 .set_page = &rs600_gart_set_page,
1853 }, 1875 },
1854 .vm = { 1876 .vm = {
@@ -2012,6 +2034,7 @@ static struct radeon_asic ci_asic = {
2012 .get_gpu_clock_counter = &cik_get_gpu_clock_counter, 2034 .get_gpu_clock_counter = &cik_get_gpu_clock_counter,
2013 .gart = { 2035 .gart = {
2014 .tlb_flush = &cik_pcie_gart_tlb_flush, 2036 .tlb_flush = &cik_pcie_gart_tlb_flush,
2037 .get_page_entry = &rs600_gart_get_page_entry,
2015 .set_page = &rs600_gart_set_page, 2038 .set_page = &rs600_gart_set_page,
2016 }, 2039 },
2017 .vm = { 2040 .vm = {
@@ -2121,6 +2144,7 @@ static struct radeon_asic kv_asic = {
2121 .get_gpu_clock_counter = &cik_get_gpu_clock_counter, 2144 .get_gpu_clock_counter = &cik_get_gpu_clock_counter,
2122 .gart = { 2145 .gart = {
2123 .tlb_flush = &cik_pcie_gart_tlb_flush, 2146 .tlb_flush = &cik_pcie_gart_tlb_flush,
2147 .get_page_entry = &rs600_gart_get_page_entry,
2124 .set_page = &rs600_gart_set_page, 2148 .set_page = &rs600_gart_set_page,
2125 }, 2149 },
2126 .vm = { 2150 .vm = {
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 4045a320a424..72bdd3bf0d8e 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -67,8 +67,9 @@ bool r100_gpu_is_lockup(struct radeon_device *rdev, struct radeon_ring *cp);
67int r100_asic_reset(struct radeon_device *rdev); 67int r100_asic_reset(struct radeon_device *rdev);
68u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc); 68u32 r100_get_vblank_counter(struct radeon_device *rdev, int crtc);
69void r100_pci_gart_tlb_flush(struct radeon_device *rdev); 69void r100_pci_gart_tlb_flush(struct radeon_device *rdev);
70uint64_t r100_pci_gart_get_page_entry(uint64_t addr, uint32_t flags);
70void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i, 71void r100_pci_gart_set_page(struct radeon_device *rdev, unsigned i,
71 uint64_t addr, uint32_t flags); 72 uint64_t entry);
72void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring); 73void r100_ring_start(struct radeon_device *rdev, struct radeon_ring *ring);
73int r100_irq_set(struct radeon_device *rdev); 74int r100_irq_set(struct radeon_device *rdev);
74int r100_irq_process(struct radeon_device *rdev); 75int r100_irq_process(struct radeon_device *rdev);
@@ -172,8 +173,9 @@ extern void r300_fence_ring_emit(struct radeon_device *rdev,
172 struct radeon_fence *fence); 173 struct radeon_fence *fence);
173extern int r300_cs_parse(struct radeon_cs_parser *p); 174extern int r300_cs_parse(struct radeon_cs_parser *p);
174extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev); 175extern void rv370_pcie_gart_tlb_flush(struct radeon_device *rdev);
176extern uint64_t rv370_pcie_gart_get_page_entry(uint64_t addr, uint32_t flags);
175extern void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i, 177extern void rv370_pcie_gart_set_page(struct radeon_device *rdev, unsigned i,
176 uint64_t addr, uint32_t flags); 178 uint64_t entry);
177extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes); 179extern void rv370_set_pcie_lanes(struct radeon_device *rdev, int lanes);
178extern int rv370_get_pcie_lanes(struct radeon_device *rdev); 180extern int rv370_get_pcie_lanes(struct radeon_device *rdev);
179extern void r300_set_reg_safe(struct radeon_device *rdev); 181extern void r300_set_reg_safe(struct radeon_device *rdev);
@@ -208,8 +210,9 @@ extern void rs400_fini(struct radeon_device *rdev);
208extern int rs400_suspend(struct radeon_device *rdev); 210extern int rs400_suspend(struct radeon_device *rdev);
209extern int rs400_resume(struct radeon_device *rdev); 211extern int rs400_resume(struct radeon_device *rdev);
210void rs400_gart_tlb_flush(struct radeon_device *rdev); 212void rs400_gart_tlb_flush(struct radeon_device *rdev);
213uint64_t rs400_gart_get_page_entry(uint64_t addr, uint32_t flags);
211void rs400_gart_set_page(struct radeon_device *rdev, unsigned i, 214void rs400_gart_set_page(struct radeon_device *rdev, unsigned i,
212 uint64_t addr, uint32_t flags); 215 uint64_t entry);
213uint32_t rs400_mc_rreg(struct radeon_device *rdev, uint32_t reg); 216uint32_t rs400_mc_rreg(struct radeon_device *rdev, uint32_t reg);
214void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 217void rs400_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
215int rs400_gart_init(struct radeon_device *rdev); 218int rs400_gart_init(struct radeon_device *rdev);
@@ -232,8 +235,9 @@ int rs600_irq_process(struct radeon_device *rdev);
232void rs600_irq_disable(struct radeon_device *rdev); 235void rs600_irq_disable(struct radeon_device *rdev);
233u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc); 236u32 rs600_get_vblank_counter(struct radeon_device *rdev, int crtc);
234void rs600_gart_tlb_flush(struct radeon_device *rdev); 237void rs600_gart_tlb_flush(struct radeon_device *rdev);
238uint64_t rs600_gart_get_page_entry(uint64_t addr, uint32_t flags);
235void rs600_gart_set_page(struct radeon_device *rdev, unsigned i, 239void rs600_gart_set_page(struct radeon_device *rdev, unsigned i,
236 uint64_t addr, uint32_t flags); 240 uint64_t entry);
237uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg); 241uint32_t rs600_mc_rreg(struct radeon_device *rdev, uint32_t reg);
238void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v); 242void rs600_mc_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
239void rs600_bandwidth_update(struct radeon_device *rdev); 243void rs600_bandwidth_update(struct radeon_device *rdev);
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 0ec65168f331..bd7519fdd3f4 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -774,6 +774,8 @@ int radeon_dummy_page_init(struct radeon_device *rdev)
774 rdev->dummy_page.page = NULL; 774 rdev->dummy_page.page = NULL;
775 return -ENOMEM; 775 return -ENOMEM;
776 } 776 }
777 rdev->dummy_page.entry = radeon_gart_get_page_entry(rdev->dummy_page.addr,
778 RADEON_GART_PAGE_DUMMY);
777 return 0; 779 return 0;
778} 780}
779 781
diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c
index 84146d5901aa..5450fa95a47e 100644
--- a/drivers/gpu/drm/radeon/radeon_gart.c
+++ b/drivers/gpu/drm/radeon/radeon_gart.c
@@ -165,6 +165,19 @@ int radeon_gart_table_vram_pin(struct radeon_device *rdev)
165 radeon_bo_unpin(rdev->gart.robj); 165 radeon_bo_unpin(rdev->gart.robj);
166 radeon_bo_unreserve(rdev->gart.robj); 166 radeon_bo_unreserve(rdev->gart.robj);
167 rdev->gart.table_addr = gpu_addr; 167 rdev->gart.table_addr = gpu_addr;
168
169 if (!r) {
170 int i;
171
172 /* We might have dropped some GART table updates while it wasn't
173 * mapped, restore all entries
174 */
175 for (i = 0; i < rdev->gart.num_gpu_pages; i++)
176 radeon_gart_set_page(rdev, i, rdev->gart.pages_entry[i]);
177 mb();
178 radeon_gart_tlb_flush(rdev);
179 }
180
168 return r; 181 return r;
169} 182}
170 183
@@ -228,7 +241,6 @@ void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
228 unsigned t; 241 unsigned t;
229 unsigned p; 242 unsigned p;
230 int i, j; 243 int i, j;
231 u64 page_base;
232 244
233 if (!rdev->gart.ready) { 245 if (!rdev->gart.ready) {
234 WARN(1, "trying to unbind memory from uninitialized GART !\n"); 246 WARN(1, "trying to unbind memory from uninitialized GART !\n");
@@ -239,14 +251,12 @@ void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
239 for (i = 0; i < pages; i++, p++) { 251 for (i = 0; i < pages; i++, p++) {
240 if (rdev->gart.pages[p]) { 252 if (rdev->gart.pages[p]) {
241 rdev->gart.pages[p] = NULL; 253 rdev->gart.pages[p] = NULL;
242 rdev->gart.pages_addr[p] = rdev->dummy_page.addr;
243 page_base = rdev->gart.pages_addr[p];
244 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) { 254 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
255 rdev->gart.pages_entry[t] = rdev->dummy_page.entry;
245 if (rdev->gart.ptr) { 256 if (rdev->gart.ptr) {
246 radeon_gart_set_page(rdev, t, page_base, 257 radeon_gart_set_page(rdev, t,
247 RADEON_GART_PAGE_DUMMY); 258 rdev->dummy_page.entry);
248 } 259 }
249 page_base += RADEON_GPU_PAGE_SIZE;
250 } 260 }
251 } 261 }
252 } 262 }
@@ -274,7 +284,7 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
274{ 284{
275 unsigned t; 285 unsigned t;
276 unsigned p; 286 unsigned p;
277 uint64_t page_base; 287 uint64_t page_base, page_entry;
278 int i, j; 288 int i, j;
279 289
280 if (!rdev->gart.ready) { 290 if (!rdev->gart.ready) {
@@ -285,14 +295,15 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
285 p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); 295 p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
286 296
287 for (i = 0; i < pages; i++, p++) { 297 for (i = 0; i < pages; i++, p++) {
288 rdev->gart.pages_addr[p] = dma_addr[i];
289 rdev->gart.pages[p] = pagelist[i]; 298 rdev->gart.pages[p] = pagelist[i];
290 if (rdev->gart.ptr) { 299 page_base = dma_addr[i];
291 page_base = rdev->gart.pages_addr[p]; 300 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
292 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) { 301 page_entry = radeon_gart_get_page_entry(page_base, flags);
293 radeon_gart_set_page(rdev, t, page_base, flags); 302 rdev->gart.pages_entry[t] = page_entry;
294 page_base += RADEON_GPU_PAGE_SIZE; 303 if (rdev->gart.ptr) {
304 radeon_gart_set_page(rdev, t, page_entry);
295 } 305 }
306 page_base += RADEON_GPU_PAGE_SIZE;
296 } 307 }
297 } 308 }
298 mb(); 309 mb();
@@ -334,16 +345,15 @@ int radeon_gart_init(struct radeon_device *rdev)
334 radeon_gart_fini(rdev); 345 radeon_gart_fini(rdev);
335 return -ENOMEM; 346 return -ENOMEM;
336 } 347 }
337 rdev->gart.pages_addr = vzalloc(sizeof(dma_addr_t) * 348 rdev->gart.pages_entry = vmalloc(sizeof(uint64_t) *
338 rdev->gart.num_cpu_pages); 349 rdev->gart.num_gpu_pages);
339 if (rdev->gart.pages_addr == NULL) { 350 if (rdev->gart.pages_entry == NULL) {
340 radeon_gart_fini(rdev); 351 radeon_gart_fini(rdev);
341 return -ENOMEM; 352 return -ENOMEM;
342 } 353 }
343 /* set GART entry to point to the dummy page by default */ 354 /* set GART entry to point to the dummy page by default */
344 for (i = 0; i < rdev->gart.num_cpu_pages; i++) { 355 for (i = 0; i < rdev->gart.num_gpu_pages; i++)
345 rdev->gart.pages_addr[i] = rdev->dummy_page.addr; 356 rdev->gart.pages_entry[i] = rdev->dummy_page.entry;
346 }
347 return 0; 357 return 0;
348} 358}
349 359
@@ -356,15 +366,15 @@ int radeon_gart_init(struct radeon_device *rdev)
356 */ 366 */
357void radeon_gart_fini(struct radeon_device *rdev) 367void radeon_gart_fini(struct radeon_device *rdev)
358{ 368{
359 if (rdev->gart.pages && rdev->gart.pages_addr && rdev->gart.ready) { 369 if (rdev->gart.ready) {
360 /* unbind pages */ 370 /* unbind pages */
361 radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages); 371 radeon_gart_unbind(rdev, 0, rdev->gart.num_cpu_pages);
362 } 372 }
363 rdev->gart.ready = false; 373 rdev->gart.ready = false;
364 vfree(rdev->gart.pages); 374 vfree(rdev->gart.pages);
365 vfree(rdev->gart.pages_addr); 375 vfree(rdev->gart.pages_entry);
366 rdev->gart.pages = NULL; 376 rdev->gart.pages = NULL;
367 rdev->gart.pages_addr = NULL; 377 rdev->gart.pages_entry = NULL;
368 378
369 radeon_dummy_page_fini(rdev); 379 radeon_dummy_page_fini(rdev);
370} 380}
diff --git a/drivers/gpu/drm/radeon/radeon_kfd.c b/drivers/gpu/drm/radeon/radeon_kfd.c
index 7b274205eeaf..061eaa9c19c7 100644
--- a/drivers/gpu/drm/radeon/radeon_kfd.c
+++ b/drivers/gpu/drm/radeon/radeon_kfd.c
@@ -392,7 +392,7 @@ static int kgd_set_pasid_vmid_mapping(struct kgd_dev *kgd, unsigned int pasid,
392static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id, 392static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id,
393 uint32_t hpd_size, uint64_t hpd_gpu_addr) 393 uint32_t hpd_size, uint64_t hpd_gpu_addr)
394{ 394{
395 uint32_t mec = (++pipe_id / CIK_PIPE_PER_MEC) + 1; 395 uint32_t mec = (pipe_id / CIK_PIPE_PER_MEC) + 1;
396 uint32_t pipe = (pipe_id % CIK_PIPE_PER_MEC); 396 uint32_t pipe = (pipe_id % CIK_PIPE_PER_MEC);
397 397
398 lock_srbm(kgd, mec, pipe, 0, 0); 398 lock_srbm(kgd, mec, pipe, 0, 0);
diff --git a/drivers/gpu/drm/radeon/radeon_vm.c b/drivers/gpu/drm/radeon/radeon_vm.c
index cde48c42b30a..06d2246d07f1 100644
--- a/drivers/gpu/drm/radeon/radeon_vm.c
+++ b/drivers/gpu/drm/radeon/radeon_vm.c
@@ -587,10 +587,8 @@ uint64_t radeon_vm_map_gart(struct radeon_device *rdev, uint64_t addr)
587 uint64_t result; 587 uint64_t result;
588 588
589 /* page table offset */ 589 /* page table offset */
590 result = rdev->gart.pages_addr[addr >> PAGE_SHIFT]; 590 result = rdev->gart.pages_entry[addr >> RADEON_GPU_PAGE_SHIFT];
591 591 result &= ~RADEON_GPU_PAGE_MASK;
592 /* in case cpu page size != gpu page size*/
593 result |= addr & (~PAGE_MASK);
594 592
595 return result; 593 return result;
596} 594}
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index c5799f16aa4b..34e3235f41d2 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -212,11 +212,9 @@ void rs400_gart_fini(struct radeon_device *rdev)
212#define RS400_PTE_WRITEABLE (1 << 2) 212#define RS400_PTE_WRITEABLE (1 << 2)
213#define RS400_PTE_READABLE (1 << 3) 213#define RS400_PTE_READABLE (1 << 3)
214 214
215void rs400_gart_set_page(struct radeon_device *rdev, unsigned i, 215uint64_t rs400_gart_get_page_entry(uint64_t addr, uint32_t flags)
216 uint64_t addr, uint32_t flags)
217{ 216{
218 uint32_t entry; 217 uint32_t entry;
219 u32 *gtt = rdev->gart.ptr;
220 218
221 entry = (lower_32_bits(addr) & PAGE_MASK) | 219 entry = (lower_32_bits(addr) & PAGE_MASK) |
222 ((upper_32_bits(addr) & 0xff) << 4); 220 ((upper_32_bits(addr) & 0xff) << 4);
@@ -226,8 +224,14 @@ void rs400_gart_set_page(struct radeon_device *rdev, unsigned i,
226 entry |= RS400_PTE_WRITEABLE; 224 entry |= RS400_PTE_WRITEABLE;
227 if (!(flags & RADEON_GART_PAGE_SNOOP)) 225 if (!(flags & RADEON_GART_PAGE_SNOOP))
228 entry |= RS400_PTE_UNSNOOPED; 226 entry |= RS400_PTE_UNSNOOPED;
229 entry = cpu_to_le32(entry); 227 return entry;
230 gtt[i] = entry; 228}
229
230void rs400_gart_set_page(struct radeon_device *rdev, unsigned i,
231 uint64_t entry)
232{
233 u32 *gtt = rdev->gart.ptr;
234 gtt[i] = cpu_to_le32(lower_32_bits(entry));
231} 235}
232 236
233int rs400_mc_wait_for_idle(struct radeon_device *rdev) 237int rs400_mc_wait_for_idle(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 68f154a451c0..d81182ad53ec 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -626,11 +626,8 @@ static void rs600_gart_fini(struct radeon_device *rdev)
626 radeon_gart_table_vram_free(rdev); 626 radeon_gart_table_vram_free(rdev);
627} 627}
628 628
629void rs600_gart_set_page(struct radeon_device *rdev, unsigned i, 629uint64_t rs600_gart_get_page_entry(uint64_t addr, uint32_t flags)
630 uint64_t addr, uint32_t flags)
631{ 630{
632 void __iomem *ptr = (void *)rdev->gart.ptr;
633
634 addr = addr & 0xFFFFFFFFFFFFF000ULL; 631 addr = addr & 0xFFFFFFFFFFFFF000ULL;
635 addr |= R600_PTE_SYSTEM; 632 addr |= R600_PTE_SYSTEM;
636 if (flags & RADEON_GART_PAGE_VALID) 633 if (flags & RADEON_GART_PAGE_VALID)
@@ -641,7 +638,14 @@ void rs600_gart_set_page(struct radeon_device *rdev, unsigned i,
641 addr |= R600_PTE_WRITEABLE; 638 addr |= R600_PTE_WRITEABLE;
642 if (flags & RADEON_GART_PAGE_SNOOP) 639 if (flags & RADEON_GART_PAGE_SNOOP)
643 addr |= R600_PTE_SNOOPED; 640 addr |= R600_PTE_SNOOPED;
644 writeq(addr, ptr + (i * 8)); 641 return addr;
642}
643
644void rs600_gart_set_page(struct radeon_device *rdev, unsigned i,
645 uint64_t entry)
646{
647 void __iomem *ptr = (void *)rdev->gart.ptr;
648 writeq(entry, ptr + (i * 8));
645} 649}
646 650
647int rs600_irq_set(struct radeon_device *rdev) 651int rs600_irq_set(struct radeon_device *rdev)
diff --git a/drivers/gpu/drm/radeon/si_dma.c b/drivers/gpu/drm/radeon/si_dma.c
index aa7b872b2c43..83207929fc62 100644
--- a/drivers/gpu/drm/radeon/si_dma.c
+++ b/drivers/gpu/drm/radeon/si_dma.c
@@ -123,7 +123,6 @@ void si_dma_vm_write_pages(struct radeon_device *rdev,
123 for (; ndw > 0; ndw -= 2, --count, pe += 8) { 123 for (; ndw > 0; ndw -= 2, --count, pe += 8) {
124 if (flags & R600_PTE_SYSTEM) { 124 if (flags & R600_PTE_SYSTEM) {
125 value = radeon_vm_map_gart(rdev, addr); 125 value = radeon_vm_map_gart(rdev, addr);
126 value &= 0xFFFFFFFFFFFFF000ULL;
127 } else if (flags & R600_PTE_VALID) { 126 } else if (flags & R600_PTE_VALID) {
128 value = addr; 127 value = addr;
129 } else { 128 } else {