diff options
| author | Christian König <christian.koenig@amd.com> | 2013-04-29 04:20:23 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2013-05-02 10:09:48 -0400 |
| commit | 092fbc4ca29a3d78895673479f794ee162a13ac5 (patch) | |
| tree | 58f910ab32440d55a876edcfe90e335309e53dc5 /drivers/gpu/drm/radeon | |
| parent | 409851f48939dffdd9f19a43830f54eac2c19a53 (diff) | |
drm/radeon: fix UPLL_REF_DIV_MASK definition
Stupid copy & paste error over all generations.
Signed-off-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon')
| -rw-r--r-- | drivers/gpu/drm/radeon/evergreend.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/rv770d.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/sid.h | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h index d9a005431087..75c05631146d 100644 --- a/drivers/gpu/drm/radeon/evergreend.h +++ b/drivers/gpu/drm/radeon/evergreend.h | |||
| @@ -59,7 +59,7 @@ | |||
| 59 | # define UPLL_SLEEP_MASK 0x00000002 | 59 | # define UPLL_SLEEP_MASK 0x00000002 |
| 60 | # define UPLL_BYPASS_EN_MASK 0x00000004 | 60 | # define UPLL_BYPASS_EN_MASK 0x00000004 |
| 61 | # define UPLL_CTLREQ_MASK 0x00000008 | 61 | # define UPLL_CTLREQ_MASK 0x00000008 |
| 62 | # define UPLL_REF_DIV_MASK 0x001F0000 | 62 | # define UPLL_REF_DIV_MASK 0x003F0000 |
| 63 | # define UPLL_VCO_MODE_MASK 0x00000200 | 63 | # define UPLL_VCO_MODE_MASK 0x00000200 |
| 64 | # define UPLL_CTLACK_MASK 0x40000000 | 64 | # define UPLL_CTLACK_MASK 0x40000000 |
| 65 | # define UPLL_CTLACK2_MASK 0x80000000 | 65 | # define UPLL_CTLACK2_MASK 0x80000000 |
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h index 6a52b2054f32..85b16266f748 100644 --- a/drivers/gpu/drm/radeon/rv770d.h +++ b/drivers/gpu/drm/radeon/rv770d.h | |||
| @@ -45,7 +45,7 @@ | |||
| 45 | # define UPLL_BYPASS_EN_MASK 0x00000004 | 45 | # define UPLL_BYPASS_EN_MASK 0x00000004 |
| 46 | # define UPLL_CTLREQ_MASK 0x00000008 | 46 | # define UPLL_CTLREQ_MASK 0x00000008 |
| 47 | # define UPLL_REF_DIV(x) ((x) << 16) | 47 | # define UPLL_REF_DIV(x) ((x) << 16) |
| 48 | # define UPLL_REF_DIV_MASK 0x001F0000 | 48 | # define UPLL_REF_DIV_MASK 0x003F0000 |
| 49 | # define UPLL_CTLACK_MASK 0x40000000 | 49 | # define UPLL_CTLACK_MASK 0x40000000 |
| 50 | # define UPLL_CTLACK2_MASK 0x80000000 | 50 | # define UPLL_CTLACK2_MASK 0x80000000 |
| 51 | #define CG_UPLL_FUNC_CNTL_2 0x71c | 51 | #define CG_UPLL_FUNC_CNTL_2 0x71c |
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h index 042b91d6c941..222877ba6cf5 100644 --- a/drivers/gpu/drm/radeon/sid.h +++ b/drivers/gpu/drm/radeon/sid.h | |||
| @@ -36,7 +36,7 @@ | |||
| 36 | # define UPLL_BYPASS_EN_MASK 0x00000004 | 36 | # define UPLL_BYPASS_EN_MASK 0x00000004 |
| 37 | # define UPLL_CTLREQ_MASK 0x00000008 | 37 | # define UPLL_CTLREQ_MASK 0x00000008 |
| 38 | # define UPLL_VCO_MODE_MASK 0x00000600 | 38 | # define UPLL_VCO_MODE_MASK 0x00000600 |
| 39 | # define UPLL_REF_DIV_MASK 0x001F0000 | 39 | # define UPLL_REF_DIV_MASK 0x003F0000 |
| 40 | # define UPLL_CTLACK_MASK 0x40000000 | 40 | # define UPLL_CTLACK_MASK 0x40000000 |
| 41 | # define UPLL_CTLACK2_MASK 0x80000000 | 41 | # define UPLL_CTLACK2_MASK 0x80000000 |
| 42 | #define CG_UPLL_FUNC_CNTL_2 0x638 | 42 | #define CG_UPLL_FUNC_CNTL_2 0x638 |