drm/radeon: add si tile mode array query v3

Allow userspace to query for the tile mode array so userspace can properly
compute surface pitch and alignment requirement depending on tiling.

v2: Make strict aliasing safer by casting to char when copying
v3: merge fix from Christian

Signed-off-by: Jerome Glisse <jglisse@redhat.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

1 files changed, 2 insertions, 0 deletions

diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 7eda8303379f..aa2c555ba877 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -1211,6 +1211,7 @@ static void si_tiling_mode_table_init(struct radeon_device *rdev)
                                 gb_tile_moden = 0;
                                 break;
                         }
+                        rdev->config.si.tile_mode_array[reg_offset] = gb_tile_moden;
                         WREG32(GB_TILE_MODE0 + (reg_offset * 4), gb_tile_moden);
                 }
         } else if ((rdev->family == CHIP_VERDE) ||
@@ -1451,6 +1452,7 @@ static void si_tiling_mode_table_init(struct radeon_device *rdev)
                                 gb_tile_moden = 0;
                                 break;
                         }
+                        rdev->config.si.tile_mode_array[reg_offset] = gb_tile_moden;
                         WREG32(GB_TILE_MODE0 + (reg_offset * 4), gb_tile_moden);
                 }
         } else